JPH07106270A - Heat treatment equipment - Google Patents
Heat treatment equipmentInfo
- Publication number
- JPH07106270A JPH07106270A JP5268274A JP26827493A JPH07106270A JP H07106270 A JPH07106270 A JP H07106270A JP 5268274 A JP5268274 A JP 5268274A JP 26827493 A JP26827493 A JP 26827493A JP H07106270 A JPH07106270 A JP H07106270A
- Authority
- JP
- Japan
- Prior art keywords
- boat
- heat treatment
- cover
- boat cover
- semiconductor wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は熱処理装置に関するもの
である。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat treatment apparatus.
【０００２】[0002]
【従来の技術】減圧ＣＶＤ装置において、ボ−トに収容
した複数の半導体ウエハに成膜処理を行った際、各半導
体ウエハ周縁の膜厚が半導体ウエハの中心部に比較して
厚く成膜されてしまい、面内の膜厚均一性を良好に成膜
処理することができないため、上記ボ−トを囲むように
石英の筒状体のカバ−を設けて反応の活発なガス成分は
このカバ−に膜付させ、反応の穏やかな残りのガス成分
をカバ−内に導入してボ−トに収容された半導体ウエハ
の面内に均一成膜する技術が特開平４−２０６６２９
号、実開平２−１３１５４９号公報に記載されている。2. Description of the Related Art In a low pressure CVD apparatus, when a plurality of semiconductor wafers housed in a boat are subjected to a film forming process, the film thickness at the peripheral edge of each semiconductor wafer is thicker than that at the center of the semiconductor wafer. Since it is impossible to form a film with good uniformity of film thickness within the plane, a quartz cylindrical cover is provided so as to surround the boat, and the gas component in which the reaction is active is A technique for forming a film on the substrate and introducing the remaining gas components, which undergo a mild reaction, into the cover to form a uniform film on the surface of the semiconductor wafer housed in the boat is disclosed in Japanese Patent Laid-Open No. 4-206629.
Japanese Utility Model Publication No. 2-131549.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、上記公
報に記載された技術を用いて半導体ウエハに所定の成膜
処理を行った場合、半導体ウエハに設けられたオリエン
テ−ションフラット部（以下オリフラ部と呼ぶ）付近の
膜厚がウエハ面内の他の部分と比べて厚くなったり、薄
くなったりして面内均一性の改善を妨げており、半導体
集積回路を製造した場合、半導体チップの歩留りが低下
するという欠点があった。そのため、オリフラ部におけ
るわずかな成膜の不均一性についても改善することが要
望されていた。本発明は以上の点に鑑みなされたもの
で、オリフラ部における成膜均一性を改善することので
きる熱処理装置を提供することを目的とするものであ
る。However, when the semiconductor wafer is subjected to a predetermined film forming process using the technique described in the above publication, an orientation flat portion (hereinafter referred to as an orientation flat portion) provided on the semiconductor wafer is formed. The film thickness in the vicinity is thicker or thinner than other parts in the wafer surface, which hinders the improvement of in-plane uniformity. When a semiconductor integrated circuit is manufactured, the yield of semiconductor chips is increased. It had the drawback of falling. Therefore, it has been demanded to improve even a slight non-uniformity of film formation in the orientation flat portion. The present invention has been made in view of the above points, and an object of the present invention is to provide a heat treatment apparatus capable of improving film formation uniformity in the orientation flat portion.
【０００４】[0004]
【課題を解決するための手段】本発明は複数の半導体ウ
エハのオリフラ部を整列させて所定の間隔で同軸的にボ
−トに収容して熱処理容器内に設けて熱処理する熱処理
装置において、前記ボ−トを覆うとともに複数のガス流
通孔が設けられた筒状ボ−トカバ−と、前記複数の半導
体ウエハのオリフラ部列に対向して前記ボ−トカバ−内
壁面に位置するよう設けられた平板部とから構成された
ことを特徴とする熱処理装置。である。According to the present invention, there is provided a heat treatment apparatus for aligning orientation flat portions of a plurality of semiconductor wafers, coaxially accommodating them in a boat at predetermined intervals, and providing them in a heat treatment container for heat treatment. A cylindrical boat cover which covers the boat and is provided with a plurality of gas flow holes, and is provided so as to be located on the inner wall surface of the boat facing the orientation flat portion row of the plurality of semiconductor wafers. A heat treatment apparatus comprising a flat plate portion. Is.
【０００５】[0005]
【作用】本発明によれば、以上のように熱処理装置を構
成したので、ボ−トカバ−内に入ってきた成膜ガスによ
り半導体ウエハに成膜するとき、ボ−トカバ−と半導体
ウエハのオリフラ部列の間隔が一定となるようボ−トカ
バ−に平板部を設けてあるので、半導体ウエハ周縁のど
の部分から見てもボ−トカバ−との距離が一定であるの
で、処理ガスの半導体ウエハ面内に対する成膜作用も一
定となる。According to the present invention, since the heat treatment apparatus is constructed as described above, when the film is formed on the semiconductor wafer by the film forming gas which has entered the boat cover, the orientation cover of the boat cover and the semiconductor wafer is formed. Since the flat plate portion is provided on the boat cover so that the intervals between the rows are constant, the distance from the boat cover is constant from any part of the peripheral edge of the semiconductor wafer. The film forming action on the surface is also constant.
【０００６】処理ガスはボ−トカバ−と衝突して跳ね返
るものと、ボ−トカバ−に付着して成膜するものとがあ
り、跳ね返るものの場合ボ−トカバ−の近くほど跳ね返
る量が多くなるし、又ボ−トカバ−に付着して成膜する
場合、ボ−トカバ−に近いほど成膜ガス成分が少なくな
るが、半導体ウエハ周縁のどの部分から見てもボ−トカ
バ−との距離が一定であるので、半導体ウエハへの処理
ガスの成膜作用も半導体ウエハ周縁全周で略同一とな
る。There are two types of processing gas, one that collides with the boat cover and bounces, and the other that deposits on the boat cover to form a film. Further, in the case of depositing a film on the boat cover, the film-forming gas component decreases as it is closer to the boat cover, but the distance from the boat cover is constant from any part of the peripheral edge of the semiconductor wafer. Therefore, the film forming action of the processing gas on the semiconductor wafer is substantially the same over the entire periphery of the semiconductor wafer.
【０００７】[0007]
【実施例】以下、本発明装置を縦型熱処理装置に適用し
た第１の実施例を図面に基づいて説明する。図１に示す
ように、円筒状で上端部が閉じており下端部に開口部が
設けられて反応容器を形成する耐熱性材料例えば石英か
らなる反応管１が設けられ、この反応管１の内部には上
端部と下端部がそれぞれ開口された耐熱性材料例えば石
英からなる内管２が同軸的に設けられている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment in which the apparatus of the present invention is applied to a vertical heat treatment apparatus will be described below with reference to the drawings. As shown in FIG. 1, a reaction tube 1 made of a heat-resistant material such as quartz, which is cylindrical and has an upper end closed and an opening provided at the lower end to form a reaction vessel, is provided. An inner tube 2 made of a heat-resistant material, for example, quartz, having an open upper end and a lower end, is provided coaxially therewith.
【０００８】上記反応管１の下部には弾性シ−ル部材例
えばＯリング３を介して耐食性金属例えばステンレスス
チ−ルからなるマニホ−ルド４が設けられており、この
マニホ−ルド４の側面部には処理ガス導入管５、６が接
続されており、さらに上記側面部には排気管７が接続さ
れ図示しない排気ポンプにより前記反応管１内を所定の
真空度に排気することが可能なように構成されている。A manifold 4 made of a corrosion-resistant metal such as stainless steel is provided below the reaction tube 1 via an elastic seal member such as an O-ring 3, and a side surface portion of the manifold 4 is provided. Is connected to processing gas introduction pipes 5 and 6, and an exhaust pipe 7 is connected to the side surface so that the inside of the reaction pipe 1 can be exhausted to a predetermined vacuum degree by an exhaust pump (not shown). Is configured.
【０００９】また、上記反応管１の周囲を覆って加熱手
段、例えば少なくとも３ゾ−ン構成からなる円筒状の抵
抗加熱式のヒ−タ８が設けられ、上記反応管１内を所望
の熱処理温度例えば５００〜１０００℃の範囲に適宜設
定可能に構成されている。上記反応管１内で所定の熱処
理がほどこされる複数の被処理体例えば半導体ウエハ１
０は、所定の間隔でボ−ト１１に積層して収容され、こ
のボ−ト１１は保温筒１２に載置され、この保温筒１２
は上記反応管１を蓋する蓋体１３に設けられた回転機構
１４に設けられ、上記反応管１内で上記半導体ウエハ１
０を予め定められた速度で回転しながら所定の熱処理を
することが可能なように構成されている。Further, a heating means, for example, a cylindrical resistance heating type heater 8 having at least 3 zones is provided so as to cover the periphery of the reaction tube 1, and the inside of the reaction tube 1 is subjected to a desired heat treatment. The temperature can be set appropriately within a range of 500 to 1000 ° C., for example. A plurality of objects to be processed, such as semiconductor wafers 1, which are subjected to a predetermined heat treatment in the reaction tube 1.
0 is stacked and accommodated in a boat 11 at a predetermined interval, and this boat 11 is placed on a heat retaining cylinder 12, and this heat retaining cylinder 12
Is provided on a rotation mechanism 14 provided on a lid 13 that covers the reaction tube 1, and the semiconductor wafer 1 is provided inside the reaction tube 1.
It is configured so that a predetermined heat treatment can be performed while rotating 0 at a predetermined speed.
【００１０】そして、上記蓋体１３とともに上記半導体
ウエハ１０列を上記ボ−トに収容した状態で昇降して、
上記反応管１内に搬入搬出する昇降機構１５が設けられ
ている。上記内管２の内側には、図２に示すように上記
ボ−ト１１を少なくとも覆う筒状、例えば円筒状の耐熱
性材料例えば石英からなるボ−トカバ−２０が配置さ
れ、このボ−トカバ−２０の上端部は閉じられ、そして
天井部が設けられており、下端部は開口しており、この
開口した下端部側から上記ボ−ト１１が搬入搬出するこ
とができるよう構成されている。Then, the semiconductor wafer 10 row together with the lid 13 is raised and lowered in a state of being housed in the boat,
An elevating mechanism 15 for loading and unloading the reaction tube 1 is provided. As shown in FIG. 2, a cylindrical, for example, cylindrical, boat-shaped cover 20 made of a heat-resistant material, such as quartz, is arranged inside the inner pipe 2 and the boat 11 is covered with this boat cover. An upper end portion of -20 is closed, a ceiling portion is provided, and a lower end portion is opened, and the boat 11 can be carried in and out from the opened lower end portion side. .
【００１１】そして、上記ボ−トカバ−２０の側壁およ
び天井部には、ガスを流通させるためのスリットや例え
ば複数の孔部２１が予め定められた位置に設けられてお
り、またこのボ−トカバ−２０の上部４箇所には係合部
２２が設けられており、上記内管２に設けられた４箇所
の凸部２３に係合して保持されるように構成されてい
る。上記孔部２１の形状、大きさ、位置は、ガスの種類
や熱処理温度などにより適宜選択するものとする。上記
ボ−トカバ−２０の上記係合部２２と上記内管２の上記
凸部２３の係合位置を相対的に離間すことにより取り外
しができる様に構成されている。The side wall and the ceiling of the boat cover 20 are provided with slits or a plurality of holes 21 for allowing gas to flow therethrough at predetermined positions, and the boat cover 20 has a predetermined position. Engagement portions 22 are provided at four locations on the upper portion of −20, and are configured to be engaged with and retained by the projections 23 provided at four locations on the inner pipe 2. The shape, size, and position of the hole 21 are appropriately selected depending on the type of gas, the heat treatment temperature, and the like. The engaging portion 22 of the boat cover 20 and the engaging position of the convex portion 23 of the inner tube 2 are relatively separated from each other so that they can be removed.
【００１２】また、上記保温筒１２の上部には環状支持
部２４が設けられており、上記搬入搬出機構により上記
半導体ウエハを収容したボ−ト１１を上記反応管１内に
搬入する際、上記環状支持部２４によって、上記ボ−ト
カバ−２０の下端部を支持することにより、上記ボ−ト
カバ−２０を上記内管２と離間して、上記回転機構１４
を駆動することにより、上記ボ−ト１１と上記ボ−トカ
バ−２０を一体にして回転することが可能なようにに構
成されている。Further, an annular support portion 24 is provided on the upper portion of the heat retaining cylinder 12, and when the boat 11 containing the semiconductor wafer is loaded into the reaction tube 1 by the loading / unloading mechanism, By supporting the lower end portion of the boat cover 20 by the annular support portion 24, the boat cover 20 is separated from the inner pipe 2, and the rotation mechanism 14 is provided.
Is driven, the boat 11 and the boat cover 20 can be integrally rotated.
【００１３】上記ボ−ト１１に収容された複数の半導体
ウエハ１０は図３に示すようにオリフラ部２５が一定方
向にそろえて積層収容されており、このオリフラ部２５
と対向した上記ボ−トカバ−２０の内壁面には上記半導
体ウエハ１０周縁との間隔が等しくなるような平板部２
６が設けられている。そして、この平板部２６が設けら
れていることにより、上記半導体ウエハ１０の全周縁と
上記ボ−トカバ−２０内壁面間との間隔は、半導体ウエ
ハ１０の全周縁のどの位置においても等しくなるように
構成されている。As shown in FIG. 3, the plurality of semiconductor wafers 10 housed in the boat 11 are stacked and housed with the orientation flat portions 25 aligned in a certain direction.
On the inner wall surface of the boat cover 20 opposed to the flat plate portion 2 such that the distance from the peripheral edge of the semiconductor wafer 10 is equal.
6 is provided. Since the flat plate portion 26 is provided, the distance between the entire peripheral edge of the semiconductor wafer 10 and the inner wall surface of the boat cover 20 is equal at any position of the entire peripheral edge of the semiconductor wafer 10. Is configured.
【００１４】上記ボ−トカバ−２０及び上記平板部２６
の内壁面と、半導体ウエハ１０の全周縁との間隔は５ｍ
ｍ以上、２０ｍｍ未満であることが好ましく、成膜均一
性、成膜再現性等が良好な例えば１０ｍｍに設定するも
のとする。上記間隔が５ｍｍ未満の場合、上記ボ−トカ
バ−２０内で処理ガスの流通が十分行われず、上記間隔
が２０ｍｍ以上の場合、上記ボ−トカバ−２０内で再び
反応の活発な処理ガス成分が発生し、いずれの場合も成
膜処理均一性が劣化する。以上のように熱処理装置は構
成されている。The boat cover 20 and the flat plate portion 26.
The distance between the inner wall surface of the wafer and the entire periphery of the semiconductor wafer 10 is 5 m
It is preferably m or more and less than 20 mm, and is set to, for example, 10 mm, which has good film formation uniformity, film formation reproducibility, and the like. When the distance is less than 5 mm, the processing gas is not sufficiently circulated in the boat cover 20, and when the distance is 20 mm or more, the active processing gas component of the reaction is again generated in the boat cover 20. Occurs, and in both cases, the uniformity of the film forming process deteriorates. The heat treatment apparatus is configured as described above.
【００１５】次に、８２０℃でＣＶＤによりシリコン酸
化膜を成膜処理する場合について以下に説明する。３ゾ
−ンヒ−タ８の各ゾ−ンに印加する電力を適宜制御する
ことにより、反応管１内の少なくとも半導体ウエハ１０
を配列する領域の温度を８２０℃±１℃以内に設定す
る。Next, the case of forming a silicon oxide film by CVD at 820 ° C. will be described below. By appropriately controlling the electric power applied to each zone of the three-zone heater 8, at least the semiconductor wafer 10 in the reaction tube 1 is controlled.
Set the temperature of the region where is arranged within 820 ° C ± 1 ° C.
【００１６】ガス導入管５、６から亜酸化窒素（Ｎ
2 Ｏ）１０００ｓｃｃｍ，モノシラン（ＳｉＨ4 ）１２
５ｓｃｃｍを反応管１内に導入し、図示しない排気ポン
プにより排気して反応管１内を０．８Ｔｏｒｒの圧力に
設定して所定時間成膜処理する。この時、半導体ウエハ
１０の周囲はボ−トカバ−２０で覆われており、オリフ
ラ部２５と対向する位置に平板部２６が位置するように
設定されている。そして、回転機構１４を回転すること
により、半導体ウエハ１０が収容されたボ−ト１１とボ
−トカバ−２０を一体にして内管２内で回転することに
より処理ガス導入管５、６から放出された処理ガスを、
ボ−トカバ−２０内に均一に取り込むことができ、成膜
処理の不均一性を大幅に改善することができる。From the gas introduction pipes 5 and 6, nitrous oxide (N
2 O) 1000 sccm, monosilane (SiH 4 ) 12
5 sccm is introduced into the reaction tube 1, exhausted by an exhaust pump (not shown), the pressure inside the reaction tube 1 is set to 0.8 Torr, and a film formation process is performed for a predetermined time. At this time, the periphery of the semiconductor wafer 10 is covered with the boat cover 20, and the flat plate portion 26 is set at a position facing the orientation flat portion 25. Then, by rotating the rotating mechanism 14, the boat 11 in which the semiconductor wafer 10 is accommodated and the boat cover 20 are integrally rotated in the inner pipe 2 to release from the processing gas introduction pipes 5 and 6. The processed gas
It can be uniformly taken into the boat cover 20, and the nonuniformity of the film forming process can be greatly improved.
【００１７】例えばボ−トカバ−２０を用いた場合で、
オリフラ部２５に対向する平板部２６がない場合、上記
条件でシリコン酸化膜をバッチ処理でＣＶＤ成膜処理し
た半導体ウエハ１０の面内均一性が±４％以内であった
のに対して、オリフラ部２５に対向する平板部２６があ
る場合の半導体ウエハ１０の面内均一性は±３％以内と
良好なものであった。尚、成膜処理均一性を向上させる
ため上記平板部２６に複数のスリットや上記孔部２１を
設けても良い。For example, when the boat cover 20 is used,
When the flat plate portion 26 facing the orientation flat portion 25 is not provided, the in-plane uniformity of the semiconductor wafer 10 on which the silicon oxide film is subjected to the CVD film formation by the batch processing under the above conditions is within ± 4%. The in-plane uniformity of the semiconductor wafer 10 when the flat plate portion 26 facing the portion 25 was favorable was within ± 3%. A plurality of slits or the holes 21 may be provided in the flat plate portion 26 in order to improve the uniformity of the film forming process.
【００１８】次に、第２の実施例について説明すると、
図４に示すようにボ−トカバ−を複数に分割して構成し
たものがある。この例ではボ−トカバ−部材は、ボ−ト
１１の支柱部に溶着して設けられた２枚のボ−トカバ−
部材３０と、上記内管２に装着されるボ−トカバ−部材
３１、３２とに分割して構成されている。Next, the second embodiment will be described.
As shown in FIG. 4, there is a boat cover divided into a plurality of parts. In this example, the boat cover member is composed of two boat covers which are welded to the support columns of the boat 11.
The member 30 and the boat cover members 31 and 32 mounted on the inner pipe 2 are divided and configured.
【００１９】そして、上記ボ−トカバ−部材３０、３
１、３２には、縦方向に幅８ｍｍのスリット３３が複数
設けられている。これらのボ−トカバ−部材３１、３２
の上端部に設けられた半月部材３４を上記内管２の上部
に載置してボ−トカバ−部材３１、３２を上記内管２内
の所定の位置に配置するように構成されている。そし
て、上記ボ−トカバ−部材３０を備えたボ−ト１１を昇
降機構１５によって、上記内管２の所定の熱処理領域に
搬入すると、上記ボ−トカバ−部材３０、３１、３２に
より、上記半導体ウエハ１０を所定の間隔で覆うことが
できるように構成されている。The boat cover members 30, 3
1, 32 are provided with a plurality of slits 33 having a width of 8 mm in the vertical direction. These boat cover members 31, 32
The meniscus member 34 provided at the upper end of the inner pipe 2 is placed on the upper portion of the inner pipe 2 to arrange the boat cover members 31, 32 at predetermined positions in the inner pipe 2. Then, when the boat 11 having the boat cover member 30 is carried into the predetermined heat treatment region of the inner pipe 2 by the elevating mechanism 15, the semiconductor is made by the boat cover members 30, 31, 32. The wafer 10 is configured so that it can be covered at a predetermined interval.
【００２０】図５に示すように、上記半導体ウエハ１０
のオリフラ部２５と対向する位置に上記ボ−トカバ−部
材３２が配置され、このボ−トカバ−部材３２は平板状
であり、上記半導体ウエハ１０の周縁部は上記ボ−トカ
バ−部材３０、３１、３２と略同一の距離に配置され、
上記半導体ウエハ１０を均一成膜処理することができる
ように構成されている。尚、第１実施例と同一部分には
同一符号を付けて説明は省略した。As shown in FIG. 5, the semiconductor wafer 10 is
The boat cover member 32 is arranged at a position facing the orientation flat portion 25 of the semiconductor wafer 10. The boat cover member 32 has a flat plate shape, and the peripheral edge portion of the semiconductor wafer 10 is the boat cover members 30, 31. , 32 are arranged at approximately the same distance,
The semiconductor wafer 10 is configured to be uniformly deposited. The same parts as those in the first embodiment are designated by the same reference numerals and their description is omitted.
【００２１】また、第３の実施例について説明すると、
図６に示すようにボ−トカバ−部材３１、３２の上端部
にそれぞれ半月部材３５を設け、この半月部材３５を上
記ボ−ト１１の上部に係合して、上記ボ−ト１１と一体
となって上記ボ−トカバ−部材３０、３１、３２がボ−
トカバ−を構成するようにしてもよい。Further, the third embodiment will be described.
As shown in FIG. 6, half-moon members 35 are provided on the upper ends of the boat cover members 31, 32, respectively, and the half-moon members 35 are engaged with the upper portion of the boat 11 to be integrated with the boat 11. As a result, the boat cover members 30, 31, 32 are mounted on the boat.
You may make it comprise a cover.
【００２２】本発明は、上記実施例に限られるものでな
く、リン添加ポリシリコン膜、ボロン添加シリケ−トガ
ラス膜等、半導体ウエハの面内均一性を向上させること
が難しいＣＶＤによる成膜処理に用いることができる。
ボ−トカバ−を分割して構成する際、分割は２以上いく
つあってもかまわない。The present invention is not limited to the above-described embodiment, but is applicable to a film formation process by CVD, such as a phosphorus-added polysilicon film, a boron-added silicate glass film, which is difficult to improve the in-plane uniformity of a semiconductor wafer. Can be used.
When the boat cover is divided and configured, there may be two or more divisions.
【００２３】また、ボ−トカバ−やボ−トカバ−部材に
は、成膜処理の均一性向上のため、必要に応じ適宜スリ
ットや孔部を複数設けることが好ましい。成膜処理はＣ
ＶＤに限らず、酸化膜の形成や拡散処理であってもよい
し、またエッチング処理等、ガス流を扱う処理であれば
どの様な処理に適用してもかまわない。In order to improve the uniformity of the film forming process, it is preferable to provide a plurality of slits or holes in the boat cover and the boat cover member as needed. Film formation process is C
The process is not limited to VD, and may be an oxide film formation process or a diffusion process, or may be applied to any process that handles a gas flow, such as an etching process.
【００２４】[0024]
【発明の効果】以上説明したように、本発明によれば半
導体ウエハの面内成膜均一性が向上され、もって半導体
素子の歩留りを向上することができる。As described above, according to the present invention, the in-plane film formation uniformity of a semiconductor wafer can be improved, and the yield of semiconductor devices can be improved.
【図１】本発明の第１の実施例による熱処理装置を説明
する、縦断面図である。FIG. 1 is a vertical sectional view for explaining a heat treatment apparatus according to a first embodiment of the present invention.
【図２】図１のボ−トカバ−の斜視図である。FIG. 2 is a perspective view of the boat cover shown in FIG.
【図３】図１の横断面図である。3 is a cross-sectional view of FIG.
【図４】第２の実施例でボ−トカバ−を複数に分割した
ものである。FIG. 4 is a diagram in which a boat cover is divided into a plurality of parts in the second embodiment.
【図５】図４に関する横断面図である。5 is a cross-sectional view with respect to FIG.
【図６】第３の実施例でボ−トカバ−を複数に分割した
ものである。FIG. 6 shows a boat cover divided into a plurality of parts in the third embodiment.
１ 反応管 １０ 半導体ウエハ １１ ボ−ト ２０ ボ−トカバ− ２１ スリット ２５ オリフラ部 ２６ 平板部 1 Reaction Tube 10 Semiconductor Wafer 11 Boat 20 Boat Cover 21 Slit 25 Orientation Flat Part 26 Flat Plate Part
───────────────────────────────────────────────────── フロントページの続き (72)発明者 多胡 研治 神奈川県津久井郡城山町町屋１丁目２番41 号 東京エレクトロン東北株式会社相模事 業所内 (72)発明者 水上 光雄 神奈川県津久井郡城山町町屋１丁目２番41 号 東京エレクトロン東北株式会社相模事 業所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kenji Tago 1-24-1 Machiya, Shiroyama-machi, Tsukui-gun, Kanagawa Prefecture, Tokyo Electron Tohoku Co., Ltd. Sagami Business Office (72) Mitsuo Mizukami In-house, Shiroyama-machi, Tsukui-gun, Kanagawa Prefecture 1-24-141 Tokyo Electron Tohoku Co., Ltd. Sagami Office
Claims (4)
させて所定の間隔で同軸的にボ−トに収容して熱処理容
器内に設けて熱処理する熱処理装置において、 前記ボ−トを覆うとともに複数のガス流通孔が設けられ
た筒状ボ−トカバ−と、 前記複数の半導体ウエハのオリフラ部列に対向して前記
ボ−トカバ−内壁面に位置するよう設けられた平板部と
から構成されたことを特徴とする熱処理装置。1. A heat treatment apparatus for aligning orientation flat portions of a plurality of semiconductor wafers, coaxially accommodating the same at a predetermined interval in a boat, and providing the heat treatment in a heat treatment container. And a flat plate portion provided so as to be located on the inner wall surface of the boat cover so as to face the orientation flat portion row of the plurality of semiconductor wafers. A heat treatment apparatus characterized by the above.
いることを特徴とする請求項１記載の熱処理装置。2. The heat treatment apparatus according to claim 1, wherein the boat cover is divided into a plurality of pieces.
ち少なくとも一つのボ−トカバ−部材は前記ボ−トと一
体に設けられ、その他のボ−トカバ−部材は前記熱処理
装置に保持されていることを特徴とする請求項２記載の
熱処理装置。3. At least one boat cover member of the plurality of divided boat covers is integrally provided with the boat, and the other boat cover members are held by the heat treatment apparatus. The heat treatment apparatus according to claim 2, wherein:
ち少なくとも一つのボ−トカバ−部材は前記ボ−トと一
体に設けられ、その他のボ−トカバ−部材は前記ボ−ト
に保持されていることを特徴とする請求項２記載の熱処
理装置。4. At least one boat cover member of the plurality of divided boat covers is integrally provided with the boat, and the other boat cover members are held by the boat. The heat treatment apparatus according to claim 2, wherein the heat treatment apparatus is provided.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5268274A JPH07106270A (en) | 1993-09-30 | 1993-09-30 | Heat treatment equipment |
| KR1019940025028A KR100260120B1 (en) | 1993-09-30 | 1994-09-30 | Heat treatment apparatus |
| US08/317,653 US5556275A (en) | 1993-09-30 | 1994-09-30 | Heat treatment apparatus |
| TW083109198A TW271488B (en) | 1993-09-30 | 1994-10-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5268274A JPH07106270A (en) | 1993-09-30 | 1993-09-30 | Heat treatment equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07106270A true JPH07106270A (en) | 1995-04-21 |
Family
ID=17456290
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5268274A Pending JPH07106270A (en) | 1993-09-30 | 1993-09-30 | Heat treatment equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07106270A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012182458A (en) * | 2011-02-18 | 2012-09-20 | Asm Internatl Nv | Wafer boat assembly, loading apparatus comprising such wafer boat assembly and method for loading in vertical furnace |
| WO2016046947A1 (en) * | 2014-09-25 | 2016-03-31 | 株式会社日立国際電気 | Substrate holder, substrate-processing apparatus, and semiconductor device manufacturing method |
-
1993
- 1993-09-30 JP JP5268274A patent/JPH07106270A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012182458A (en) * | 2011-02-18 | 2012-09-20 | Asm Internatl Nv | Wafer boat assembly, loading apparatus comprising such wafer boat assembly and method for loading in vertical furnace |
| WO2016046947A1 (en) * | 2014-09-25 | 2016-03-31 | 株式会社日立国際電気 | Substrate holder, substrate-processing apparatus, and semiconductor device manufacturing method |
| JPWO2016046947A1 (en) * | 2014-09-25 | 2017-08-31 | 株式会社日立国際電気 | Substrate holder, substrate processing apparatus, and semiconductor device manufacturing method |
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