JPH0687505B2 - Field effect transistor for high power - Google Patents
Field effect transistor for high powerInfo
- Publication number
- JPH0687505B2 JPH0687505B2 JP32648687A JP32648687A JPH0687505B2 JP H0687505 B2 JPH0687505 B2 JP H0687505B2 JP 32648687 A JP32648687 A JP 32648687A JP 32648687 A JP32648687 A JP 32648687A JP H0687505 B2 JPH0687505 B2 JP H0687505B2
- Authority
- JP
- Japan
- Prior art keywords
- gate
- effect transistor
- field effect
- electrode
- high power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Junction Field-Effect Transistors (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置分野に利用される。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention is used in the field of semiconductor devices.
本発明は、大電力用電界効果トランジスタに関し、特に
単一の動作領域内に複数のトランジスタ動作を行う電界
効果トランジスタ素子を有する大電力用電界効果トラン
ジスタに関する。The present invention relates to a high power field effect transistor, and more particularly to a high power field effect transistor having a field effect transistor element that performs a plurality of transistor operations in a single operation region.
本発明は、同一動作領域内に形成され、各ゲート電極が
ゲート引出し電極部を介してゲート接続部に接続された
複数の電界効果トランジスタ素子を有する大電力用電界
効果トランジスタにおいて、 前記各ゲート電極と前記ゲート引出し電極部との間に、
前記ゲート接続部と前記各ゲート電極間の距離に応じて
小となる抵抗値を有する安定化抵抗をそれぞれ接続する
ことにより、 特性の向上と動作の安定化を図ったものである。The present invention relates to a high-power field-effect transistor having a plurality of field-effect transistor elements formed in the same operation region, each gate electrode being connected to a gate connecting portion via a gate extraction electrode portion, wherein each gate electrode Between the gate extraction electrode portion and
By connecting stabilizing resistors each having a resistance value that becomes smaller according to the distance between the gate connection portion and each of the gate electrodes, the characteristics are improved and the operation is stabilized.
第3図は従来の大電力用電界効果トランジスタの一例の
要部を示す電極のパターン図である。第3図において、
1は電界効果トランジスタ素子のゲート電極、2はゲー
ト引出し電極部および3はゲート接続部としてのゲート
ボンディングパッドである。この従来例は、ゲート電極
1がG1〜Gnのn個がゲート引出し電極部2に接続された
様子を示し、同様にして各ゲート電極1間に挟まれた
(n−1)個のゲート電極が図外の図の右側に設けられ
たゲート引出し部に接続される。FIG. 3 is a pattern diagram of an electrode showing a main part of an example of a conventional high power field effect transistor. In FIG.
Reference numeral 1 is a gate electrode of a field effect transistor element, 2 is a gate extraction electrode portion, and 3 is a gate bonding pad as a gate connection portion. This conventional example shows a state in which n gate electrodes 1 of G 1 to G n are connected to the gate lead electrode portion 2, and (n-1) gate electrodes 1 are similarly sandwiched between the gate electrodes 1. The gate electrode is connected to a gate lead-out portion provided on the right side of the drawing (not shown).
図から明らかなように、従来のこの種の大電力用電界効
果トランジスタは、ゲート抵抗を低減するための安定化
抵抗は入っていなかった。As is apparent from the figure, the conventional high-power field effect transistor of this type does not include a stabilizing resistor for reducing the gate resistance.
前述した従来の大電力用電界効果トランジスタは、単一
の動作領域内に複数のトランジスタ動作を行う電界効果
トランジスタ素子があり、各電界効果トランジスタ素子
のゲート電極1からゲートボンディングパッド3までの
距離が一定でないため、各々の配線経路で生じる抵抗値
が異る。このため各電界効果トランジスタ素子でのゲー
ト抵抗が一定でなくなり、動作が不均一になり、全体の
特性が低下したり動作が不安定になる欠点があった。The conventional high-power field effect transistor described above has field effect transistor elements that perform a plurality of transistor operations within a single operation region, and the distance from the gate electrode 1 to the gate bonding pad 3 of each field effect transistor element is small. Since they are not constant, the resistance value generated in each wiring path is different. For this reason, the gate resistance in each field effect transistor element is not constant, the operation becomes non-uniform, and there is a drawback that the overall characteristics are deteriorated or the operation becomes unstable.
本発明の目的は、前記の欠点を除去することにより、各
電界効果トランジスタ素子の動作を均一化させ、特性の
向上と動作の安定化を図った大電力用電界効果トランジ
スタを提供することにある。An object of the present invention is to provide a high power field effect transistor in which the above-mentioned drawbacks are eliminated to make the operation of each field effect transistor element uniform, improve the characteristics and stabilize the operation. .
本発明は、同一動作領域内に形成され、各ゲート電極が
ゲート引出し電極部を介してゲート接続部に接続された
複数の電界効果トランジスタ素子を有する大電力用電界
効果トランジスタにおいて、前記各ゲート電極と前記ゲ
ート引出し電極部との間に、前記ゲート接続部と前記各
ゲート電極間の距離に応じて小となる抵抗値を有する安
定化抵抗がそれぞれ接続されたことを特徴とする。The present invention relates to a high-power field effect transistor having a plurality of field effect transistor elements formed in the same operation region, each gate electrode being connected to a gate connecting portion via a gate lead electrode portion, And a stabilizing resistor having a resistance value which becomes small according to the distance between the gate connecting portion and each of the gate electrodes, respectively.
各電界効果トランジスタ素子の各ゲート電極とゲート引
出し電極部との間にそれぞれ接続された安定化抵抗は、
それぞれ各ゲート電極とゲート接続部間の距離が大にな
るに従い小となる抵抗値を有している。The stabilizing resistors connected between the gate electrode and the gate extraction electrode portion of each field effect transistor element are
Each has a resistance value that becomes smaller as the distance between each gate electrode and the gate connection portion becomes larger.
従って、各電界効果トランジスタ素子の各ゲート電極と
ゲート接続部間の距離の差によるゲート抵抗値の差は補
償され、各電界効果トランジスタ素子の動作は均一化さ
れ、全体の特性の向上と動作の安定性が図られる。Therefore, the difference in the gate resistance value due to the difference in the distance between each gate electrode and the gate connection portion of each field effect transistor element is compensated, the operation of each field effect transistor element is made uniform, and the overall characteristics are improved and the operation is improved. Stability is achieved.
以下、本発明の実施例について図面を参照して説明す
る。Hereinafter, embodiments of the present invention will be described with reference to the drawings.
第1図は本発明の第一実施例の要部を示す電極のパター
ン図である。本第一実施例は同一動作領域内に形成さ
れ、各ゲート電極(G1〜Gn)1がゲート引出し電極部2
を介してゲート接続部としてのゲートボンディングパッ
ド3に接続された(2n−1)個(nは正の整数)の電界
効果トランジスタ素子を有する大電力用電界効果トラン
ジスタにおいて、 各ゲート電極1とゲート引出し電極部2との間に、ゲー
トボンディングパッド3と各ゲート電極1間の距離に応
じて小となる抵抗値を有する安定化抵抗(R1〜Rn)4を
それぞれ接続したものである。なお、第1図は、(2n−
1)個の電界効果トランジスタ素子のうち、ゲート電極
(G1〜Gn)1を有するn個の素子について示したもの
で、G1〜Gnのゲート電極1に挟まれた(n−1)個のゲ
ート電極は同様にして右側に設けられた図外のゲート引
出し電極部を介しゲートボンディングパッドに接続され
る。FIG. 1 is a pattern diagram of an electrode showing a main part of the first embodiment of the present invention. In the first embodiment, the gate electrodes (G 1 to G n ) 1 are formed in the same operation region and the gate lead electrode portion 2
In a high-power field-effect transistor having (2n-1) (n is a positive integer) field-effect transistor elements connected to a gate bonding pad 3 as a gate connecting portion via a gate electrode 1 and a gate Stabilizing resistors (R 1 to R n ) 4 each having a resistance value that becomes small according to the distance between the gate bonding pad 3 and each gate electrode 1 are connected between the lead electrode portion 2. Note that FIG. 1 shows (2n−
1) Of n field effect transistor elements, n elements having gate electrodes (G 1 to G n ) 1 are shown and sandwiched between the gate electrodes 1 of G 1 to G n (n-1 The gate electrodes are similarly connected to the gate bonding pad through a gate lead electrode portion (not shown) provided on the right side.
ここで、安定化抵抗4の長さは、ゲートボンディングパ
ッド3から遠い位置にあるほど短くなっており、その結
果抵抗値は小さくなる。従って、ゲートボンディングパ
ッド3から各ゲート電極1までの抵抗値がほぼ等しくな
り、均一動作が可能になる。Here, the length of the stabilizing resistor 4 becomes shorter as it is farther from the gate bonding pad 3, and as a result, the resistance value becomes smaller. Therefore, the resistance values from the gate bonding pad 3 to each gate electrode 1 become substantially equal, and uniform operation becomes possible.
第2図は本発明の第二実施例の要部を示す電極のパター
ン図である。本第二実施例は第1図の第一実施例におい
て、各安定化抵抗(R1〜Rn)4の幅をゲートボンディン
グパッド3から遠い位置にあるほど大きくすることで、
各安定化抵抗4の抵抗値を変えたもので、第一実施例と
同様の効果が得られる。さらに、本第二実施例では、電
界効果トランジスタ素子部の形状が長方形または正方形
となるため、マスク設計が容易になるという利点があ
る。FIG. 2 is a pattern diagram of an electrode showing a main part of the second embodiment of the present invention. In the second embodiment, the width of each stabilizing resistor (R 1 to R n ) 4 in the first embodiment of FIG. 1 is increased as the position is farther from the gate bonding pad 3,
By changing the resistance value of each stabilizing resistor 4, the same effect as that of the first embodiment can be obtained. Further, in the second embodiment, since the shape of the field effect transistor element portion is rectangular or square, there is an advantage that the mask design becomes easy.
本発明の特徴は、第1図および第2図において、安定化
抵抗4を設けたことにある。The feature of the present invention is that the stabilizing resistor 4 is provided in FIGS. 1 and 2.
以上説明したように、本発明は、ゲート引出し電極部と
電界効果トランジスタ素子のゲート電極との間に安定化
抵抗を挿入し、かつ、ゲート接続部と各ゲート電極間の
距離に応じて安定化抵抗の抵抗値を小さくすることによ
り、各電界効果トランジスタ素子の動作を均一化でき、
全体の特性の向上および動作の安定化を図ることができ
る効果がある。As described above, according to the present invention, the stabilizing resistor is inserted between the gate extraction electrode portion and the gate electrode of the field effect transistor element, and the stabilization is performed according to the distance between the gate connecting portion and each gate electrode. By reducing the resistance value of the resistor, the operation of each field effect transistor element can be made uniform,
This has the effect of improving the overall characteristics and stabilizing the operation.
第1図は本発明の第一実施例の要部を示す電極のパター
ン図。 第2図は本発明の第二実施例の要部を示す電極のパター
ン図。 第3図は従来例の要部を示す電極のパターン図。 1……ゲート電極(G1〜Gn)、2……ゲート引出し電極
部、3……ゲートボンディングパッド、4……安定化抵
抗(R1〜Rn)。FIG. 1 is a pattern diagram of an electrode showing a main part of the first embodiment of the present invention. FIG. 2 is a pattern diagram of an electrode showing a main part of the second embodiment of the present invention. FIG. 3 is a pattern diagram of an electrode showing a main part of a conventional example. 1 ... Gate electrode (G 1 to G n ), 2 ... Gate extraction electrode section, 3 ... Gate bonding pad, 4 ... Stabilizing resistance (R 1 to R n ).
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 7376−4M H01L 29/80 L ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Office reference number FI technical display location 7376-4M H01L 29/80 L
Claims (1)
(1)がゲート引出し電極部(2)を介してゲート接続
部(3)に接続された複数の電界効果トランジスタ素子
を有する大電力用電界効果トランジスタにおいて、 前記各ゲート電極と前記ゲート引出し電極部との間に、
前記ゲート接続部と前記各ゲート電極間の距離に応じて
小となる抵抗値を有する安定化抵抗(4)がそれぞれ接
続された ことを特徴とする大電力用電界効果トランジスタ。1. A high power device having a plurality of field effect transistor elements formed in the same operation region, each gate electrode (1) being connected to a gate connecting portion (3) through a gate extraction electrode portion (2). In the field effect transistor for use, between each of the gate electrodes and the gate extraction electrode portion,
A high-power field effect transistor, characterized in that stabilizing resistors (4) each having a resistance value that becomes smaller according to the distance between the gate connection portion and each of the gate electrodes are connected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32648687A JPH0687505B2 (en) | 1987-12-22 | 1987-12-22 | Field effect transistor for high power |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32648687A JPH0687505B2 (en) | 1987-12-22 | 1987-12-22 | Field effect transistor for high power |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01166564A JPH01166564A (en) | 1989-06-30 |
JPH0687505B2 true JPH0687505B2 (en) | 1994-11-02 |
Family
ID=18188358
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP32648687A Expired - Fee Related JPH0687505B2 (en) | 1987-12-22 | 1987-12-22 | Field effect transistor for high power |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0687505B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9859411B2 (en) | 2014-05-21 | 2018-01-02 | Sharp Kabushiki Kaisha | Field effect transistor |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3515886B2 (en) * | 1997-09-29 | 2004-04-05 | 三菱電機株式会社 | Semiconductor device and manufacturing method thereof |
US6738032B1 (en) | 1999-11-24 | 2004-05-18 | Lg Electronics Inc. | Plasma display panel having pads of different length |
JP4032622B2 (en) * | 2000-09-06 | 2008-01-16 | 株式会社日立製作所 | Semiconductor element and semiconductor device and converter using the same |
JP5138274B2 (en) | 2007-05-25 | 2013-02-06 | 三菱電機株式会社 | Semiconductor device |
JP6025295B2 (en) * | 2010-06-24 | 2016-11-16 | 富士通株式会社 | Compound semiconductor device |
US9570553B2 (en) | 2013-08-19 | 2017-02-14 | Infineon Technologies Austria Ag | Semiconductor chip with integrated series resistances |
EP3619738A4 (en) * | 2017-05-05 | 2021-01-13 | Cree, Inc. | High power mmic devices having bypassed gate transistors |
-
1987
- 1987-12-22 JP JP32648687A patent/JPH0687505B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9859411B2 (en) | 2014-05-21 | 2018-01-02 | Sharp Kabushiki Kaisha | Field effect transistor |
Also Published As
Publication number | Publication date |
---|---|
JPH01166564A (en) | 1989-06-30 |
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