JPH066679A - Image processor - Google Patents
Image processorInfo
- Publication number
- JPH066679A JPH066679A JP4156785A JP15678592A JPH066679A JP H066679 A JPH066679 A JP H066679A JP 4156785 A JP4156785 A JP 4156785A JP 15678592 A JP15678592 A JP 15678592A JP H066679 A JPH066679 A JP H066679A
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- JP
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- Prior art keywords
- aspect ratio
- signal
- circuit
- image signal
- input
- Prior art date
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、画像処理装置に関し、
より具体的には、アスペクト比の異なる複数の画像信号
を選択・合成する画像処理装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus,
More specifically, the present invention relates to an image processing device that selects and combines a plurality of image signals having different aspect ratios.
【０００２】[0002]
【従来の技術】複数の、例えば２つの画像信号を選択合
成する用途としては、画像の切換えや、ワイプ、スクロ
ール、クロス・フェード、ピクチャー・イン・ピクチャ
ーなどの合成がある。従来の画像処理装置は、複数の入
力画像信号を選択合成するのみであり、入力画像信号の
アスペクト比の相違を考慮しない。2. Description of the Related Art As applications for selectively combining a plurality of, for example, two image signals, there are switching of images, combining wipes, scrolls, cross fades, picture-in-picture and the like. The conventional image processing apparatus only selectively combines a plurality of input image signals and does not consider the difference in the aspect ratio of the input image signals.
【０００３】[0003]
【発明が解決しようとする課題】しかし、近年、標準的
なアスペクト比３：４とは異なるアスペクト比、例えば
ハイビジョン方式の９：１６のモニタなどが出現し、ア
スペクト比の異なる複数の映像信号を選択合成する機会
が増えている。However, in recent years, an aspect ratio different from the standard aspect ratio of 3: 4, for example, a high-definition 9:16 monitor has appeared, and a plurality of video signals having different aspect ratios are displayed. Opportunities for selective synthesis are increasing.
【０００４】アスペクト比が３：４以外の映像信号で
は、例えば、垂直ブランキング期間にアスペクト比を示
すディジタル・データを付加したり、コンポーネト信号
の場合に色信号に重畳する直流電圧レベルによりアスペ
クト比を示すようにしたりしている。勿論、このような
アスペクト比を識別する信号を付加しない場合もある。
垂直ブランキング期間内にアスペクト比を示すＩＤ信号
を重畳する波形例を図３に示す。For a video signal having an aspect ratio other than 3: 4, for example, digital data indicating the aspect ratio is added in the vertical blanking period, or in the case of a component signal, the aspect ratio depends on the DC voltage level superimposed on the color signal. I am trying to show you. Of course, there is a case where a signal for identifying such an aspect ratio is not added.
FIG. 3 shows an example of a waveform in which the ID signal indicating the aspect ratio is superimposed in the vertical blanking period.
【０００５】このようにビデオ機器、例えばモニタによ
って、アスペクト比を示すＩＤ信号を必要とするものと
必要としないものがあり、ＩＤを必要とする場合でもそ
の信号形式が色々ある。As described above, depending on the video equipment, for example, the monitor, there are those that require the ID signal indicating the aspect ratio and those that do not require it. Even when the ID is required, there are various signal formats.
【０００６】本発明は、このような要請に応え得る画像
処理装置を提示することを目的とする。It is an object of the present invention to present an image processing apparatus that can meet such a demand.
【０００７】[0007]
【課題を解決するための手段】本発明に係る画像処理装
置は、２以上の入力画像信号を選択及び合成する画像処
理装置であって、選択及び合成した画像信号にそのアス
ペクト比を示すＩＤ信号を選択的に付加するＩＤ付加手
段を設けたことを特徴とする。An image processing apparatus according to the present invention is an image processing apparatus for selecting and synthesizing two or more input image signals, and an ID signal indicating the aspect ratio of the selected and synthesized image signals. Is provided for selectively adding ID.
【０００８】第２の発明に係る画像処理装置は、２以上
の入力画像信号を選択及び合成する画像処理装置であっ
て、当該各入力画像信号のアスペクト比を判別するアス
ペクト比判別手段と、指定アスペクト比と異なる入力画
像信号を指定アスペクト比に変換して、各入力画像信号
を選択及び合成する選択合成手段と、当該選択合成手段
の出力画像信号にそのアスペクト比を示すＩＤ信号を選
択的に付加するＩＤ付加手段とからなることを特徴とす
る。An image processing apparatus according to a second aspect of the present invention is an image processing apparatus for selecting and synthesizing two or more input image signals, and an aspect ratio discriminating means for discriminating the aspect ratio of each input image signal. An input image signal having a different aspect ratio is converted into a specified aspect ratio to select and synthesize each input image signal, and an ID signal indicating the aspect ratio of the output image signal of the selective synthesizing means is selectively selected. It is characterized by comprising ID adding means for adding.
【０００９】[0009]
【作用】選択及び合成後の画像信号にそのアスペクト比
を示すＩＤ信号を付加して、又は付加せずに出力する上
記ＩＤ付加手段を設けることにより、後段のビデオ機器
にアスペクト比を正確に伝達できるようになる。The aspect ratio is accurately transmitted to the video equipment in the subsequent stage by providing the above-mentioned ID adding means for outputting the image signal after selection and combination with or without adding the ID signal indicating the aspect ratio. become able to.
【００１０】第２の発明では、任意のアスペクト比の入
力画像信号を選択合成でき、しかも、所望のアスペクト
比で出力することができる。According to the second aspect of the present invention, the input image signal having an arbitrary aspect ratio can be selectively combined and can be output with a desired aspect ratio.
【００１１】[0011]
【実施例】以下、図面を参照して本発明の実施例を説明
する。Embodiments of the present invention will be described below with reference to the drawings.
【００１２】図１は、本発明の一実施例の概略構成ブロ
ック図であるなお、本実施例は、アスペクト比を示すＩ
Ｄ信号は、図３の形式であるとする。FIG. 1 is a schematic block diagram of an embodiment of the present invention. In this embodiment, the aspect ratio I
It is assumed that the D signal has the format shown in FIG.
【００１３】図１において、１０，１２は画像処理する
画像信号の入力端子、１４は、出力画像信号のアスペク
ト比を設定するアスペクト比設定信号の入力端子、１６
は、アスペクト比を示すＩＤ信号を出力画像信号に付加
する／付加しないを制御するＩＤ付加／無付加制御信号
の入力端子である。In FIG. 1, 10 and 12 are input terminals for an image signal to be image-processed, 14 is an input terminal for an aspect ratio setting signal for setting an aspect ratio of an output image signal, and 16
Is an input terminal of an ID addition / non-addition control signal for controlling addition / non-addition of the ID signal indicating the aspect ratio to the output image signal.
【００１４】１８，２０はそれぞれ、入力端子１０，１
２に入力する画像信号からＩＤ信号を消去するＩＤ消去
回路である。勿論、ＩＤ信号が付加されていない場合、
ＩＤ消去回路１８，２０は入力信号をそのまま出力す
る。２２，２４はそれぞれ、入力端子１０，１２に入力
する画像信号に重畳されているＩＤ信号を判別するＩＤ
判別回路であり、入力画像信号のアスペクト比を特定す
る信号を出力する。Reference numerals 18 and 20 denote input terminals 10 and 1, respectively.
2 is an ID erasing circuit for erasing the ID signal from the image signal input to 2. Of course, if the ID signal is not added,
The ID erasing circuits 18 and 20 output the input signals as they are. 22 and 24 are IDs for discriminating the ID signals superimposed on the image signals input to the input terminals 10 and 12, respectively.
The determination circuit outputs a signal that specifies the aspect ratio of the input image signal.
【００１５】２６は、ＩＤ消去回路１８，２０からの画
像信号に対し、必要な場合に所定アスペクト比を変換し
た後、選択・合成処理する変換及び選択・合成回路であ
る。２８は、入力端子１６からのＩＤ付加／無付加制御
信号に応じて、変換及び選択・合成回路２６から出力さ
れる画像信号に、そのアスペクト比に応じたＩＤ信号を
付加し又は付加せず出力するＩＤ付加回路である。３０
は本実施例により処理された画像信号（ＩＤ付加回路２
８の出力）を外部に出力するための出力端子である。Reference numeral 26 is a conversion / selection / composition circuit for converting the image signals from the ID erasing circuits 18 and 20 into a predetermined aspect ratio, if necessary, and then selecting / composing. Reference numeral 28 indicates whether or not the image signal output from the conversion / selection / combination circuit 26 is added with or without an ID signal according to the aspect ratio in accordance with the ID addition / non-addition control signal from the input terminal 16. ID adding circuit. Thirty
Is an image signal processed by this embodiment (ID adding circuit 2
8) is output to the outside.
【００１６】３２は、ＩＤ判別回路２２，２４の出力及
び、入力端子１４からのアスペクト比設定信号に応じて
変換及び選択・合成回路２６を制御し、当該アスペクト
比設定信号により設定されるアスペクト比と異なるアス
ペクト比の入力画像信号を、当該アスペクト比設定信号
により設定されるアスペクト比に変換した後、選択・合
成を実行させるＩＤ処理回路である。ＩＤ処理回路３２
はまた、入力端子１４からのアスペクト比設定信号をＩ
Ｄ付加回路２８に転送する。Reference numeral 32 controls the conversion / selection / synthesis circuit 26 according to the output of the ID discrimination circuits 22 and 24 and the aspect ratio setting signal from the input terminal 14, and the aspect ratio set by the aspect ratio setting signal. The ID processing circuit converts an input image signal having an aspect ratio different from that to an aspect ratio set by the aspect ratio setting signal and then executes selection / combination. ID processing circuit 32
Also outputs the aspect ratio setting signal from the input terminal 14 to I
The data is transferred to the D addition circuit 28.
【００１７】以下、本実施例の動作を詳細に説明する。
入力端子１０に入力する画像信号はＩＤ消去回路１８及
びＩＤ判別回路２２に入力し、入力端子１２に入力する
画像信号はＩＤ消去回路２０及びＩＤ判別回路２４に入
力する。ＩＤ消去回路１８，２０は、入力する画像信号
にＩＤ信号が重畳されている場合には、そのＩＤ信号を
消去した画像信号を出力し、ＩＤ信号が重畳されていな
い場合には、入力信号をそのまま出力する。The operation of this embodiment will be described in detail below.
The image signal input to the input terminal 10 is input to the ID erasing circuit 18 and the ID determining circuit 22, and the image signal input to the input terminal 12 is input to the ID erasing circuit 20 and the ID determining circuit 24. The ID erasing circuits 18 and 20 output the image signal in which the ID signal is erased when the ID signal is superimposed on the input image signal, and output the input signal when the ID signal is not superimposed. Output as is.
【００１８】ＩＤ判別回路２２，２４はそれぞれ、入力
端子１０，１２から入力する画像信号に重畳されている
ＩＤ信号を判別し、そのアスペクト比に関する情報をＩ
Ｄ処理回路３２に出力する。The ID discriminating circuits 22 and 24 discriminate the ID signals superimposed on the image signals input from the input terminals 10 and 12, respectively, and the information concerning the aspect ratio is I
It is output to the D processing circuit 32.
【００１９】ＩＤ処理回路３２は、入力端子１４からの
アスペクト比設定信号により設定されるアスペクト比
と、ＩＤ判別回路２２，２４からのアスペクト比情報と
を比較し、設定アスペクト比と異なる場合には、設定ア
スペクト比への変換を変換及び選択・合成回路２６に指
示する。The ID processing circuit 32 compares the aspect ratio set by the aspect ratio setting signal from the input terminal 14 with the aspect ratio information from the ID discrimination circuits 22 and 24. , The conversion and selection / synthesis circuit 26 is instructed to convert to the set aspect ratio.
【００２０】変換及び選択・合成回路２６はＩＤ処理回
路３２からの制御信号に応じて、ＩＤ消去回路１８，２
０からの画像信号を設定アスペクト比に合わせ、その
後、選択・合成する。変換及び選択・合成回路２６によ
り選択合成された画像信号はＩＤ付加回路２８に印加さ
れる。The conversion / selection / combination circuit 26 responds to the control signal from the ID processing circuit 32 by the ID erasing circuits 18 and 2.
The image signal from 0 is matched with the set aspect ratio, and then selected and combined. The image signal selectively synthesized by the conversion / selection / synthesis circuit 26 is applied to the ID addition circuit 28.
【００２１】なお、変換及び選択・合成回路２６は、設
定アスペクト比と異なるアスペクト比の入力画像信号を
先ず設定アスペクト比に変換するが、それは少なくとも
画素単位であればよく、画面を設定アスペクト比に変換
する必要はない。例えば、ピクチャー・イン・ピクチャ
ーの場合の子画面と親画面は同じアスペクト比である必
要はない。The conversion / selection / synthesis circuit 26 first converts an input image signal having an aspect ratio different from the set aspect ratio into a set aspect ratio, which may be at least in pixel units, and the screen may have a set aspect ratio. No need to convert. For example, in the case of picture-in-picture, the child screen and the parent screen do not have to have the same aspect ratio.
【００２２】ＩＤ付加回路２８は、入力端子１６からの
ＩＤ付加／無付加制御信号及び、ＩＤ処理回路３２を介
した入力端子１４からのアスペクト比設定信号に応じ
て、変換及び選択・合成回路２６の出力画像信号にＩＤ
信号を付加し又は付加せずに出力端子３０に出力する。
即ち、入力端子１６からのＩＤ付加／無付加制御信号が
ＩＤ信号の付加を指示するときには、入力端子１４から
のアスペクト比設定信号に応じたＩＤ信号を付加し、入
力端子１６からのＩＤ付加／無付加制御信号がＩＤ信号
の無付加を指示するときには、ＩＤ信号を付加しない。The ID addition circuit 28 is responsive to the ID addition / non-addition control signal from the input terminal 16 and the aspect ratio setting signal from the input terminal 14 via the ID processing circuit 32 to convert and select / synthesize the circuit 26. Output image signal ID
The signal is output to the output terminal 30 with or without addition.
That is, when the ID addition / non-addition control signal from the input terminal 16 instructs the addition of the ID signal, the ID signal according to the aspect ratio setting signal from the input terminal 14 is added, and the ID addition / non-addition from the input terminal 16 is performed. When the no-addition control signal indicates no addition of the ID signal, the ID signal is not added.
【００２３】変換及び選択・合成回路２６からＩＤ付加
回路２８に供給される画像信号の垂直ブランキング期間
を図２に示す。ＩＤ信号を付加する場合、ＩＤ付加回路
２８の出力画像信号の垂直ブランキング期間は、図３に
示すようになり、他方、ＩＤ信号を付加しない場合、Ｉ
Ｄ付加回路２８の出力画像信号の垂直ブランキング期間
は、図２のままである。FIG. 2 shows the vertical blanking period of the image signal supplied from the conversion / selection / synthesis circuit 26 to the ID addition circuit 28. When the ID signal is added, the vertical blanking period of the output image signal of the ID adding circuit 28 is as shown in FIG. 3, while when the ID signal is not added, I
The vertical blanking period of the output image signal of the D addition circuit 28 remains as in FIG.
【００２４】２入力の場合を説明したが、３入力以上で
あってもよいことはいうまでもない。Although the case of two inputs has been described, it goes without saying that the number of inputs may be three or more.
【００２５】アスペクト比を示す信号形式としては、色
信号に直流電圧を重畳する方法であってもよい。The signal format indicating the aspect ratio may be a method of superimposing a DC voltage on a color signal.
【００２６】[0026]
【発明の効果】以上の説明により容易に理解できるよう
に、本発明によれば、選択及び合成後の画像信号が入力
するビデオ機器にアスペクト比を正確に伝達できるよう
になる。また、任意のアスペクト比の入力画像信号を選
択合成でき、しかも、所望のアスペクト比で出力するこ
とができる。As can be easily understood from the above description, according to the present invention, the aspect ratio can be accurately transmitted to the video equipment to which the image signal after selection and synthesis is inputted. Further, it is possible to selectively combine input image signals having an arbitrary aspect ratio and output them with a desired aspect ratio.
【図１】 本発明の第１の実施例のシステム構成ブロッ
ク図である。FIG. 1 is a system configuration block diagram of a first embodiment of the present invention.
【図２】 ＩＤ付加回路２８の入力画像信号の垂直ブラ
ンキング期間の波形である。2 is a waveform of a vertical blanking period of an input image signal of the ID adding circuit 28. FIG.
【図３】 垂直ブランキング期間内にアスペクト比を示
すＩＤ信号を重畳する波形例である。FIG. 3 is a waveform example in which an ID signal indicating an aspect ratio is superimposed in a vertical blanking period.
１０，１２：画像入力端子 １４：アスペクト比設定信
号入力端子 １６：ＩＤ付加／無付加制御信号 １８，
２０：ＩＤ消去回路 ２２，２４：ＩＤ判別回路 ２６：変換及び選択・合成回路 ２８：ＩＤ付加回路
３０：出力端子 ３２：ＩＤ処理回路10, 12: Image input terminal 14: Aspect ratio setting signal input terminal 16: ID addition / non-addition control signal 18,
20: ID erasing circuit 22, 24: ID discrimination circuit 26: Conversion and selection / synthesis circuit 28: ID addition circuit
30: Output terminal 32: ID processing circuit
───────────────────────────────────────────────────── フロントページの続き (72)発明者 牧野 純 東京都大田区下丸子３丁目30番２号キヤノ ン株式会社内 (72)発明者 滝本 宏之 東京都大田区下丸子３丁目30番２号キヤノ ン株式会社内 (72)発明者 堀 泰三 東京都大田区下丸子３丁目30番２号キヤノ ン株式会社内 (72)発明者 中谷 吉宏 東京都大田区下丸子３丁目30番２号キヤノ ン株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Jun Makino 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Hiroyuki Takimoto 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Incorporated (72) Inventor Taizo Hori 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Yoshihiro Nakatani 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc.
Claims (2)
る画像処理装置であって、選択及び合成した画像信号に
そのアスペクト比を示すＩＤ信号を選択的に付加するＩ
Ｄ付加手段を設けたことを特徴とする画像処理装置。1. An image processing apparatus for selecting and synthesizing two or more input image signals, wherein an ID signal indicating its aspect ratio is selectively added to the selected and synthesized image signals.
An image processing apparatus comprising D addition means.
る画像処理装置であって、当該各入力画像信号のアスペ
クト比を判別するアスペクト比判別手段と、指定アスペ
クト比と異なる入力画像信号を指定アスペクト比に変換
して、各入力画像信号を選択及び合成する選択合成手段
と、当該選択合成手段の出力画像信号にそのアスペクト
比を示すＩＤ信号を選択的に付加するＩＤ付加手段とか
らなることを特徴とする画像処理装置。2. An image processing device for selecting and synthesizing two or more input image signals, wherein an aspect ratio discriminating means for discriminating an aspect ratio of each input image signal and an input image signal different from a designated aspect ratio are designated. It is composed of a selecting / combining means for converting into an aspect ratio and selecting and combining each input image signal, and an ID adding means for selectively adding an ID signal indicating the aspect ratio to the output image signal of the selecting / composing means. An image processing device characterized by:
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15678592A JP3178482B2 (en) | 1992-06-16 | 1992-06-16 | Image processing apparatus and method |
| US08/074,957 US5347318A (en) | 1992-06-16 | 1993-06-10 | Apparatus for processing video signals having different aspect ratios |
| US08/259,495 US5638485A (en) | 1992-06-16 | 1994-06-14 | Video signal processing apparatus for processing video signals with different aspect ratios |
| US08/822,504 US6014179A (en) | 1992-06-16 | 1997-03-24 | Apparatus and method for processing video signals with different aspect ratios |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15678592A JP3178482B2 (en) | 1992-06-16 | 1992-06-16 | Image processing apparatus and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH066679A true JPH066679A (en) | 1994-01-14 |
| JP3178482B2 JP3178482B2 (en) | 2001-06-18 |
Family
ID=15635261
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15678592A Expired - Fee Related JP3178482B2 (en) | 1992-06-16 | 1992-06-16 | Image processing apparatus and method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3178482B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19708033A1 (en) * | 1996-03-01 | 1997-09-04 | Toyota Motor Co Ltd | Position determining system for moving body e.g for vehicle door, sliding roof or window |
| JP2005347999A (en) * | 2004-06-02 | 2005-12-15 | Funai Electric Co Ltd | Video recording and reproducing device |
| US8138645B2 (en) | 2007-03-16 | 2012-03-20 | Keihin Corporation | Electric motor, rotary actuator and rotary apparatus |
-
1992
- 1992-06-16 JP JP15678592A patent/JP3178482B2/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19708033A1 (en) * | 1996-03-01 | 1997-09-04 | Toyota Motor Co Ltd | Position determining system for moving body e.g for vehicle door, sliding roof or window |
| US5875588A (en) * | 1996-03-01 | 1999-03-02 | Asmo Co., Ltd. | Device for detecting position of moving body and vehicle door |
| DE19708033C2 (en) * | 1996-03-01 | 1999-12-02 | Toyota Motor Co Ltd | Position detection device for movable bodies and vehicle doors |
| JP2005347999A (en) * | 2004-06-02 | 2005-12-15 | Funai Electric Co Ltd | Video recording and reproducing device |
| JP4525185B2 (en) * | 2004-06-02 | 2010-08-18 | 船井電機株式会社 | Video recording / playback device |
| US8138645B2 (en) | 2007-03-16 | 2012-03-20 | Keihin Corporation | Electric motor, rotary actuator and rotary apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3178482B2 (en) | 2001-06-18 |
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