JPH0645899A - Snubber circuit - Google Patents

Snubber circuit

Info

Publication number
JPH0645899A
JPH0645899A JP21645192A JP21645192A JPH0645899A JP H0645899 A JPH0645899 A JP H0645899A JP 21645192 A JP21645192 A JP 21645192A JP 21645192 A JP21645192 A JP 21645192A JP H0645899 A JPH0645899 A JP H0645899A
Authority
JP
Japan
Prior art keywords
circuit
capacitor
snubber
snubber capacitor
switching element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21645192A
Other languages
Japanese (ja)
Inventor
Masahiro Shintani
昌洋 新谷
Kazunori Masuda
和典 増田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Electric Manufacturing Ltd
Original Assignee
Toyo Electric Manufacturing Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Electric Manufacturing Ltd filed Critical Toyo Electric Manufacturing Ltd
Priority to JP21645192A priority Critical patent/JPH0645899A/en
Publication of JPH0645899A publication Critical patent/JPH0645899A/en
Pending legal-status Critical Current

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  • Electronic Switches (AREA)

Abstract

PURPOSE:To lower the allowable current of a snubber capacitor by inserting a reactor component into the wiring route of an overvoltage absorbing circuit and suppressing the peak current flowing into the snubber capacitor while absorbing the surge voltage generated in the circuit. CONSTITUTION:In the power conversion circuit provided with the overvoltage absorbing circuit consisting of a capacitor 3, which is connected in parallel with single or plural switching elements, or consisting of the capacitor 3 and a resistance, a snubber circuit 1 where a core 2 being the reactor component and the snubber capacitor 3 are connected in series is connected in parallel to a switching element group 14. The surge voltage generated by turning on/off the switching element group 14 flows into the snubber capacitor 3 through the core 2 as a current. At this time, a maximum current flowing into the snubber capacitor 3 is decreased because the peak current having a high frequency is absorbed by the core 2, and the allowable current of the snubber capacitor 3 is lowered.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、単一または、複数個か
らなるスイッチング素子に並列接続されているコンデン
サ、またはコンデンサ及び抵抗からなる過電圧吸収回路
を備えた電力変換回路に係わり、スイッチング素子の高
速化に伴い、回路上に発生するサージ電圧が増大するた
め、過電圧吸収回路の能力を上げる必要があり、この点
を改良したものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power conversion circuit having a capacitor connected in parallel to a single or a plurality of switching elements, or an overvoltage absorbing circuit composed of a capacitor and a resistor, and Since the surge voltage generated on the circuit increases as the speed increases, it is necessary to increase the capacity of the overvoltage absorption circuit. This is an improvement.

【0002】[0002]

【従来の技術】従来のスイッチング素子及びこのサージ
電圧を吸収するスナバ回路は図3に示される。図3にお
いて、11は直流電源、12はスナバ回路、13はコンデン
サ、14はスイッチング素子群、15は三相負荷であり、ス
イッチング素子群14をON−OFF 動作すると、回路のリア
クタンスによりスイッチング素子群14の両端にサージ電
圧が発生する。このサージ電圧はスイッチグ素子群14を
破壊するなど、回路に悪影響をあたえる場合がある。こ
のため、スイッチング素子群14と並列にスナバ回路12を
接続しサージ電圧を吸収する手段が一般的である。
2. Description of the Related Art A conventional switching element and a snubber circuit that absorbs this surge voltage are shown in FIG. In FIG. 3, 11 is a DC power supply, 12 is a snubber circuit, 13 is a capacitor, 14 is a switching element group, and 15 is a three-phase load. When the switching element group 14 is turned on and off, the switching element group is caused by the reactance of the circuit. Surge voltage occurs across both ends of 14. This surge voltage may adversely affect the circuit, such as destroying the switching element group 14. Therefore, the snubber circuit 12 is generally connected in parallel with the switching element group 14 to absorb the surge voltage.

【0003】[0003]

【発明が解決しようとする課題】しかし、スナバ回路12
として用いられるコンデンサ13(以降スナバコンデンサ
という)は、サージ電圧により発生するピーク電流に耐
えうる許容電流が必要であり、スイッチング素子の高速
化などによりサージ電圧が増大すると、これにより発生
するピーク電流が増大することからスナバコンデンサ13
の許容電流を高くする必要がある。このため、スナバコ
ンデンサ13の外形が大きくなり、またこれに伴って価格
が上昇し、無視できないものとなる。本発明は上述した
点に鑑みて創案されたもので、その目的とするところ
は、回路に発生するサージ電圧を吸収しながらスナバコ
ンデンサ13に流れ込むピーク電流を抑制することで、ス
ナバコンデンサ13の許容電流を極力低くするスナバ回路
を提供するものである。
However, a snubber circuit 12
The capacitor 13 (hereinafter referred to as snubber capacitor) used as is required to have a permissible current that can withstand the peak current generated by the surge voltage, and when the surge voltage increases due to speeding up of switching elements, the peak current generated by this Snubber capacitor 13 from increasing
It is necessary to increase the allowable current of. Therefore, the outer shape of the snubber capacitor 13 becomes large, and the price increases accordingly, which cannot be ignored. The present invention was created in view of the above-mentioned points, and an object thereof is to suppress the peak current flowing into the snubber capacitor 13 while absorbing the surge voltage generated in the circuit, thereby allowing the snubber capacitor 13 to accept. It is intended to provide a snubber circuit that makes the current as low as possible.

【0004】[0004]

【課題を解決するための手段】つまり、この目的を達成
するための手段は、スナバ回路の配線経路内にリアクト
ル成分を挿入し、このリアクトル成分にピーク電流を吸
収させることによって、スナバコンデンサに流れ込むピ
ーク電流を抑制するものである。
[Means for Solving the Problems] In other words, the means for achieving this object is to insert a reactor component into the wiring path of the snubber circuit and cause the reactor component to absorb a peak current to flow into the snubber capacitor. It suppresses the peak current.

【0005】[0005]

【作用】その作用は、次に述べる実施例と併せて説明す
る。
The operation will be described in combination with the embodiment described below.

【0006】[0006]

【実施例】以下、本発明のスナバ回路の一実施例を、図
面に基づいて詳述する。図1は本発明の一実施例を示す
回路図で、図中、図2 と同符号のものは同じ機能を有す
るものである。図1 において、スイッチング素子群14に
並列にスナバ回路1を接続したものであり、スナバ回路
1は、リアクトル成分となるコア2と直列に接続したス
ナバコンデンサ3から構成されている。かような構成の
回路において、スイッチング素子群14をON−OFF 動作す
ることより発生するサージ電圧は、電流としてコア2を
通してスナバコンデンサ3に流れ込む。この時、周波数
の高いピーク電流はコア2により吸収されるため、スナ
バコンデンサ3に流れ込む最大電流は低減され、スナバ
コンデンサ3の許容電流を低くすることが可能となる。
図2は本発明の他の実施例を示す回路図であり、図1と
相違するところは、図1に示すスナバ回路1を個々のス
イッチング素子4と並列接続した点が異なっており、そ
の機能は図1と同様の効果が得られる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the snubber circuit of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which the same reference numerals as those in FIG. 2 have the same functions. In FIG. 1, a snubber circuit 1 is connected in parallel to a switching element group 14, and the snubber circuit 1 is composed of a core 2 serving as a reactor component and a snubber capacitor 3 connected in series. In the circuit having such a configuration, the surge voltage generated by turning on and off the switching element group 14 flows into the snubber capacitor 3 through the core 2 as a current. At this time, since the peak current having a high frequency is absorbed by the core 2, the maximum current flowing into the snubber capacitor 3 is reduced, and the allowable current of the snubber capacitor 3 can be lowered.
2 is a circuit diagram showing another embodiment of the present invention, and is different from FIG. 1 in that the snubber circuit 1 shown in FIG. 1 is connected in parallel with each switching element 4, and the function thereof is different. Has the same effect as in FIG.

【0007】[0007]

【発明の効果】以上説明したごとく本発明によれば、単
一または複数個からなるコンデンサ、またはコンデンサ
及び抵抗からなる過電圧吸収回路を備えた電力変換装置
において、過電圧吸収回路の配線経路内にリアクトル成
分を挿入することで、スナバコンデンサに流れ込むピー
ク電流が抑制されるため、スナバコンデンサの許容電流
を低くすることができ、実用上、極めて有用性の高いも
のである。
As described above, according to the present invention, in a power converter having an overvoltage absorbing circuit made up of a single capacitor or a plurality of capacitors, or a capacitor and a resistor, a reactor is provided in a wiring path of the overvoltage absorbing circuit. Since the peak current flowing into the snubber capacitor is suppressed by inserting the component, it is possible to reduce the allowable current of the snubber capacitor, which is extremely useful in practice.

【0008】[0008]

【図面の簡単な説明】[Brief description of drawings]

【図1】図1は本発明の一実施例を示す回路図である。FIG. 1 is a circuit diagram showing an embodiment of the present invention.

【図2】図2は本発明の他の実施例を示す回路図であ
る。
FIG. 2 is a circuit diagram showing another embodiment of the present invention.

【図3】図3は従来の一例を示す回路図である。FIG. 3 is a circuit diagram showing a conventional example.

【0008】[0008]

【符号の説明】[Explanation of symbols]

1 スナバ回路 2 コア 3 スナバコンデンサ 4 スイッチング素子 11 直流電源 12 スナバ回路 13 スナバコンデンサ 14 スイッチング素子群 1 snubber circuit 2 core 3 snubber capacitor 4 switching element 11 DC power supply 12 snubber circuit 13 snubber capacitor 14 switching element group

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 単一または複数個からなるスイッチング
素子に並列接続されているコンデンサ、またはコンデン
サと抵抗からなる過電圧吸収回路を備えた電力変換回路
において、前記過電圧吸収回路の配線経路内にリアクト
ル成分を挿入することを特徴とするスナバ回路。
1. A power converter circuit comprising a capacitor connected in parallel to a single or a plurality of switching elements, or an overvoltage absorbing circuit consisting of a capacitor and a resistor, wherein a reactor component is provided in a wiring path of the overvoltage absorbing circuit. Snubber circuit characterized by inserting.
JP21645192A 1992-07-22 1992-07-22 Snubber circuit Pending JPH0645899A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21645192A JPH0645899A (en) 1992-07-22 1992-07-22 Snubber circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21645192A JPH0645899A (en) 1992-07-22 1992-07-22 Snubber circuit

Publications (1)

Publication Number Publication Date
JPH0645899A true JPH0645899A (en) 1994-02-18

Family

ID=16688727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21645192A Pending JPH0645899A (en) 1992-07-22 1992-07-22 Snubber circuit

Country Status (1)

Country Link
JP (1) JPH0645899A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006115095A1 (en) * 2005-04-21 2006-11-02 Matsushita Electric Industrial Co., Ltd. Driving circuit and display device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006115095A1 (en) * 2005-04-21 2006-11-02 Matsushita Electric Industrial Co., Ltd. Driving circuit and display device
JPWO2006115095A1 (en) * 2005-04-21 2008-12-18 松下電器産業株式会社 Driving circuit and display device
JP4516601B2 (en) * 2005-04-21 2010-08-04 パナソニック株式会社 Driving circuit and display device
US8144142B2 (en) 2005-04-21 2012-03-27 Panasonic Corporation Drive circuit and display device

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