JPH06349980A - Semiconductor element - Google Patents

Semiconductor element

Info

Publication number
JPH06349980A
JPH06349980A JP15640493A JP15640493A JPH06349980A JP H06349980 A JPH06349980 A JP H06349980A JP 15640493 A JP15640493 A JP 15640493A JP 15640493 A JP15640493 A JP 15640493A JP H06349980 A JPH06349980 A JP H06349980A
Authority
JP
Japan
Prior art keywords
semiconductor element
resin
type
insulator
back surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15640493A
Other languages
Japanese (ja)
Inventor
Ikuo Takeuchi
郁夫 竹内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP15640493A priority Critical patent/JPH06349980A/en
Publication of JPH06349980A publication Critical patent/JPH06349980A/en
Pending legal-status Critical Current

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To eliminate the necessity of inserting an insulator between a semiconductor element and a heat dissipating plate by setting a shortest distance between leads and a back surface of a TO-220 type entire resin-coating semiconductor element to a predetermined value or more including tolerance. CONSTITUTION:A thickness of resin is increased by setting a distance between a back surface 1 of a case and a lead 2 to (2.6mm + maximum tolerance) as a central value by a mold designing at the time of molding. Thus, the surface 1 can be mounted directly on a flat heat dissipating plate, etc., while satisfying safety standards, addition of an insulator such as a silicon sheet, etc., coping with the plate are eliminated, a cost can be reduced, and assembling properties can be improved. Since the heat dissipation is enhanced in view of performance such as an allowable loss, etc., as compared with the case where the insulator such as the sheet is added, features of an entire resin-coated 3-terminal semiconductor element can be utilized more advantageously.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体素子に係り、特
に安全規格の規制を受ける一次ライン部に使用されるT
O−220型全面樹脂被覆半導体素子のパッケージ構造
に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and in particular, it is used in a primary line section that is regulated by safety standards.
The present invention relates to a package structure of an O-220 type full surface resin coated semiconductor element.

【0002】[0002]

【従来の技術】近年、絶縁実装コストの低減、高密度実
装時の隣接デバイスとの確実な絶縁のために、パワーデ
バイス用パッケージをモールド化した、図3に示すよう
な、いわゆるTO−220型全面樹脂被覆半導体素子が
使われている。図4はその素子断面図である。図4にお
いて、20は樹脂,21は放熱板,22はチップを示
す。TO−220型全面樹脂被覆半導体素子は図5に示
す従来のTO−220型と呼ばれる3端子半導体素子パ
ッケージの放熱板部分を、高熱伝導のエポキシ樹脂で覆
ったものである。
2. Description of the Related Art In recent years, a so-called TO-220 type as shown in FIG. 3 in which a power device package is molded in order to reduce the insulation mounting cost and ensure the insulation between adjacent devices at the time of high density mounting. A full surface resin coated semiconductor element is used. FIG. 4 is a sectional view of the element. In FIG. 4, 20 is a resin, 21 is a heat sink, and 22 is a chip. The TO-220 type entire surface resin-covered semiconductor element is a conventional heat-dissipating plate portion of a three-terminal semiconductor element package called TO-220 type shown in FIG.

【0003】TO−220型全面樹脂被覆半導体素子の
外形寸法は互換が図れるように、従来のTO−220型
半導体素子とほぼ同様になっている。これにより図6に
示すように、従来のTO−220型半導体素子10を、
TO−220型全面樹脂被覆半導体素子11に置き換え
ることができ、プリント配線板13に搭載された半導体
素子11と外部の金属ケース12とが密着しても電気的
絶縁が保たれ、容易に実装の高密度化を図ることができ
る。
The external dimensions of the TO-220 type entire surface resin-covered semiconductor element are almost the same as those of the conventional TO-220 type semiconductor element so that compatibility can be achieved. As a result, as shown in FIG. 6, the conventional TO-220 type semiconductor device 10 is
It can be replaced with the TO-220 type entire surface resin-coated semiconductor element 11, and even if the semiconductor element 11 mounted on the printed wiring board 13 and the external metal case 12 are in close contact with each other, electrical insulation is maintained and the mounting is easy. Higher density can be achieved.

【0004】前記TO−220型全面樹脂被覆半導体素
子のパッケージ寸法は、例えば図3に示されるようにリ
ード部と背面部との最短距離(X)を2.5mm前後に
設定している。この理由は従来のTO−220型半導体
素子と互換性を保ち、容易に実装コストを低減するため
であるが、構造上の理由によるためでもある。
As for the package size of the TO-220 type full surface resin coated semiconductor element, for example, as shown in FIG. 3, the shortest distance (X) between the lead portion and the back surface portion is set to about 2.5 mm. The reason for this is to maintain compatibility with the conventional TO-220 type semiconductor element and easily reduce the mounting cost, but also for structural reasons.

【0005】図7に3種類の樹脂(A,B,C)につい
ての樹脂厚と樹脂部熱抵抗の関係を示す。素子の許容損
失を大きくするためには、素子の熱抵抗をできるだけ低
減する必要がある。そのためには、図7から理解される
様に、熱伝導率の高い樹脂を使用し(図中の樹脂タイプ
A)、樹脂厚を均一に、薄くなるようにすることが望ま
しい。ただし、樹脂厚を均一に、薄くなるようにすると
絶縁耐圧および樹脂成形性が悪くなるため、絶縁耐圧お
よび樹脂成形性とを考慮すると、樹脂を0.5mm程度
に設計するのが好ましく、かかる値とすることが一般的
である。
FIG. 7 shows the relationship between the resin thickness and the resin portion thermal resistance for three types of resins (A, B, C). In order to increase the allowable loss of the element, it is necessary to reduce the thermal resistance of the element as much as possible. For that purpose, as understood from FIG. 7, it is desirable to use a resin having a high thermal conductivity (resin type A in the figure) and make the resin thickness uniform and thin. However, if the resin thickness is made uniform and thin, the dielectric strength and resin moldability deteriorate, so considering the dielectric strength and resin moldability, it is preferable to design the resin to be about 0.5 mm. Is generally used.

【0006】つまり、従来のTO−220型半導体素子
と同等以上の許容損失を確保するには、熱伝導率の高い
樹脂を使い、樹脂厚を薄くし、樹脂部熱抵抗を低減させ
ればよく、この場合、エポキシ樹脂で覆われる放熱板は
従来のTO−220型半導体素子の放熱板より薄くする
ことができる。従って、TO−220型全面樹脂被覆半
導体素子のリード部と背面部との最短距離は、非絶縁の
従来のTO−220型半導体素子と同様、または若干短
くすることができ、上記のように、TO−220型全面
樹脂被覆半導体素子のリード部と背面部との最短距離は
2.5mm前後とする設計が多用されている。
In other words, in order to secure the allowable loss equal to or higher than that of the conventional TO-220 type semiconductor element, it suffices to use a resin having a high thermal conductivity, reduce the resin thickness, and reduce the thermal resistance of the resin portion. In this case, the heat dissipation plate covered with the epoxy resin can be thinner than the heat dissipation plate of the conventional TO-220 type semiconductor element. Therefore, the shortest distance between the lead portion and the back surface of the TO-220 type full surface resin coated semiconductor element can be made the same as or slightly shorter than that of the conventional non-insulated TO-220 type semiconductor element. A design is often used in which the shortest distance between the lead portion and the back surface of the TO-220 type entire surface resin-coated semiconductor element is around 2.5 mm.

【0007】[0007]

【発明が解決しようとする課題】しかし、安全規格の規
制を受ける一次ライン部で使用されるTO−220型全
面樹脂被覆半導体素子では、グランドに接続されている
放熱板等に取り付けるためには、最大公差でもリード部
と背面部の最短距離を2.5mm以上にすることが求め
られており、絶縁型であるにもかかわらず、図8に示す
ように、安全規格を満足するためのシリコンシート等の
絶縁物4を、全面樹脂被覆型3端子半導体素子11と放
熱板3との間に挟む等の処理が必要であり、コストアッ
プ要因となっていた。
However, in the TO-220 type full surface resin coated semiconductor element used in the primary line section which is regulated by the safety standard, in order to be attached to the heat sink or the like connected to the ground, Even with the maximum tolerance, the minimum distance between the lead and the back is required to be 2.5 mm or more. As shown in Fig. 8, despite being an insulation type, a silicon sheet for satisfying safety standards. It is necessary to perform a process of sandwiching the insulating material 4 such as the above between the full-face resin-covered three-terminal semiconductor element 11 and the heat dissipation plate 3, which causes a cost increase.

【0008】また、図9に示すように、全面樹脂被覆型
3端子半導体素子は、従来のTO−220型半導体素子
に絶縁物を挟み放熱板に取り付けた状態に比べ過渡熱抵
抗を低くできるが、前述のようにシリコンシート等の絶
縁物を挟むことで、同等または逆に従来のTO−220
型半導体素子よりも過渡熱抵抗が高くなってしまう。一
方、図10に示すように、放熱板3′に形状を変えて対
応することも出来るが、放熱面積が減り効率が悪くなる
ことや、形状の複雑化による、成形コストのアップと効
率ダウンが問題となる。
Further, as shown in FIG. 9, the whole-resin-covered three-terminal semiconductor element can have a lower transient thermal resistance than a conventional TO-220 type semiconductor element in which an insulator is sandwiched and attached to a radiator plate. As described above, by sandwiching an insulating material such as a silicon sheet, the conventional TO-220 is equivalently or vice versa.
Thermal resistance becomes higher than that of the semiconductor device of the type. On the other hand, as shown in FIG. 10, it is possible to change the shape of the heat radiating plate 3 ', but the heat radiating area is reduced and the efficiency is lowered, and the complicated shape leads to an increase in molding cost and a decrease in efficiency. It becomes a problem.

【0009】[0009]

【課題を解決するための手段】本発明の半導体素子は、
TO−220型全面樹脂被覆半導体素子において、リー
ドと背面部との最短距離を、公差を含めて2.6mm以
上にしたことを特徴とする。
The semiconductor device of the present invention comprises:
In the TO-220 type full surface resin coated semiconductor element, the shortest distance between the lead and the back surface part is set to 2.6 mm or more, including the tolerance.

【0010】[0010]

【作用】本発明は、TO−220型全面樹脂被覆半導体
素子において、リードと背面部との最短距離を、公差を
含めて2.6mm以上にすることで、シリコンシート等
の絶縁物を間に挟む等の処理をすることなく、安全規格
を満足する半導体素子を提供するものである。なお、安
全規格については、例えば、ヨーロッパ各国が準拠して
いるIEC950において、一次−GND間で空間距離
2mm、沿面距離2.5mmを確保することが義務づけ
られている。
According to the present invention, in a TO-220 type full surface resin coated semiconductor element, the shortest distance between the lead and the back surface is 2.6 mm or more, including the tolerance, so that an insulator such as a silicon sheet is placed between them. It is intended to provide a semiconductor element that satisfies the safety standard without any processing such as sandwiching. Regarding the safety standard, for example, in IEC950 which European countries comply with, it is obligatory to secure a spatial distance of 2 mm and a creepage distance of 2.5 mm between the primary and GND.

【0011】[0011]

【実施例】以下、本発明の実施例について図面を用いて
詳細に説明する。
Embodiments of the present invention will be described in detail below with reference to the drawings.

【0012】図1は本発明による全面樹脂被覆型3端子
半導体素子を示した斜視図及び側面図である。本実施例
においては、製造工程におけるモールディング時の型設
計を、ケース背面部1とリード部2で2.6mm+最大
公差を中心値とすることで、最低でも2.6mmを確保
し、安全規格を充分満足できる値とした。
FIG. 1 is a perspective view and a side view showing an all-resin-covered three-terminal semiconductor device according to the present invention. In this embodiment, the mold design during molding in the manufacturing process is 2.6 mm at the back of the case 1 and the lead 2, and the maximum tolerance is the center value, so that a minimum of 2.6 mm is secured and safety standards are met. The value was set to be sufficiently satisfactory.

【0013】なお、モールディング時の型設計を、ケー
ス背面部1とリード部2で2.6mm+最大公差を中心
値とすることで、樹脂の厚さは厚くなる。この樹脂厚の
増加によって樹脂部熱抵抗が増加し許容損失は低下する
が、この許容損失の低下に応じて素子内部放熱板を大き
くすれば従来のTO−220型全面樹脂被覆半導体素子
と同等の許容損失とすることができる。
By designing the mold at the time of molding with the back surface 1 of the case and the lead 2 being centered at 2.6 mm + maximum tolerance, the resin becomes thicker. This increase in the resin thickness increases the thermal resistance of the resin part and decreases the allowable loss. However, if the heat dissipation plate inside the element is enlarged in accordance with the decrease in the allowable loss, it is equivalent to the conventional TO-220 type full surface resin coated semiconductor element. It can be a permissible loss.

【0014】図2は本実施例を用いた全面樹脂被覆型3
端子半導体素子を、平坦な放熱板等へ直接取り付けた状
態を示す側面図であり、図中3はグランドに接続された
放熱板を示す。
FIG. 2 shows the entire surface resin-coated mold 3 using this embodiment.
FIG. 3 is a side view showing a state in which the terminal semiconductor element is directly attached to a flat heat dissipation plate or the like, and 3 in the drawing shows a heat dissipation plate connected to the ground.

【0015】本実施例では、図8に示したように従来例
のTO−220型全面樹脂被覆半導体素子において、安
全規格を満足するために用いられていたシリコンシート
等の絶縁物を削除することができる。
In the present embodiment, as shown in FIG. 8, in the TO-220 type full surface resin coated semiconductor element of the conventional example, the insulator such as the silicon sheet used to satisfy the safety standard is deleted. You can

【0016】[0016]

【発明の効果】以上詳細に説明したように、本発明の半
導体素子によれば、TO−220型全面樹脂被覆半導体
素子において、リードと背面部との最短距離を、公差を
含めて2.6mm以上にすることで、背面部の平坦な放
熱板等への直接取り付けを、安全規格を満足しつつでき
ると共に、従来行っていたシリコンシート等の絶縁物の
追加や、放熱板の対応が不要となり、コストダウンや組
立性の改善を図ることができる。また許容損失等の性能
面でも、シリコンシート等の絶縁物の追加をする場合に
比べ放熱性が高くなることから、全面樹脂被覆型3端子
半導体素子である特徴をより有利に生かすことができ
る。
As described in detail above, according to the semiconductor element of the present invention, in the TO-220 type full surface resin coated semiconductor element, the shortest distance between the lead and the back surface is 2.6 mm including the tolerance. By doing the above, it is possible to directly attach to the flat heat sink etc. on the back side while satisfying the safety standard, and it becomes unnecessary to add insulators such as silicon sheet and support of the heat sink which were done conventionally. It is possible to reduce the cost and improve the assemblability. Further, in terms of performance such as allowable loss, since the heat dissipation is higher than in the case where an insulating material such as a silicon sheet is added, it is possible to make more advantageous use of the characteristics of the full-face resin-covered three-terminal semiconductor element.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による全面樹脂被覆型3端子半導体素子
を示した斜視図及び側面図である。
FIG. 1 is a perspective view and a side view showing a full-face resin-covered three-terminal semiconductor device according to the present invention.

【図2】本実施例を用いた全面樹脂被覆型3端子半導体
素子を、平坦な放熱板等へ直接取り付けた状態を示す側
面図である。
FIG. 2 is a side view showing a state in which the full-face resin-covered three-terminal semiconductor element according to this embodiment is directly attached to a flat heat dissipation plate or the like.

【図3】従来のTO−220型全面樹脂被覆半導体素子
を示した平面図及び側面図である。
3A and 3B are a plan view and a side view showing a conventional TO-220 type full surface resin coated semiconductor element.

【図4】従来のTO−220型全面樹脂被覆半導体素子
の断面図である。
FIG. 4 is a cross-sectional view of a conventional TO-220 type full surface resin coated semiconductor element.

【図5】従来のTO−220型半導体素子を示した平面
図及び側面図である。
5A and 5B are a plan view and a side view showing a conventional TO-220 type semiconductor device.

【図6】従来のTO−220型全面樹脂被覆半導体素子
及びTO−220型半導体素子を実装した状態を示す説
明図である。
FIG. 6 is an explanatory view showing a state in which a conventional TO-220 type entire surface resin-covered semiconductor element and a TO-220 type semiconductor element are mounted.

【図7】樹脂の種類による樹脂厚−樹脂部熱抵抗の関係
を示す特性図である。
FIG. 7 is a characteristic diagram showing the relationship between resin thickness and resin portion thermal resistance depending on the type of resin.

【図8】従来のTO−220型全面樹脂被覆半導体素子
を放熱板に取り付けた状態を示す側面図である。
FIG. 8 is a side view showing a state in which a conventional TO-220 type full surface resin coated semiconductor element is attached to a heat dissipation plate.

【図9】従来のTO−220型全面樹脂被覆半導体素子
及びTO−220型半導体素子の過渡熱抵抗の経時変化
を示す特性図である。
FIG. 9 is a characteristic diagram showing changes with time of transient thermal resistances of a conventional TO-220 type entire surface resin-coated semiconductor element and a TO-220 type semiconductor element.

【図10】従来のTO−220型全面樹脂被覆半導体素
子を放熱板に取り付けた状態を示す側面図である。
FIG. 10 is a side view showing a state in which a conventional TO-220 type full surface resin coated semiconductor element is attached to a heat dissipation plate.

【符号の説明】[Explanation of symbols]

1 ケース背面部 2 リード部 3 グランドに接続された放熱板 4 シリコンシート等の絶縁物 1 case back 2 lead 3 heat sink connected to ground 4 insulator such as silicon sheet

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 TO−220型全面樹脂被覆半導体素子
において、リードと背面部との最短距離を、公差を含め
て2.6mm以上にしたことを特徴とする半導体素子。
1. A TO-220 type full surface resin coated semiconductor element, characterized in that the shortest distance between the lead and the back surface portion is 2.6 mm or more, including a tolerance.
JP15640493A 1993-06-03 1993-06-03 Semiconductor element Pending JPH06349980A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15640493A JPH06349980A (en) 1993-06-03 1993-06-03 Semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15640493A JPH06349980A (en) 1993-06-03 1993-06-03 Semiconductor element

Publications (1)

Publication Number Publication Date
JPH06349980A true JPH06349980A (en) 1994-12-22

Family

ID=15627007

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15640493A Pending JPH06349980A (en) 1993-06-03 1993-06-03 Semiconductor element

Country Status (1)

Country Link
JP (1) JPH06349980A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002246779A (en) * 2001-02-20 2002-08-30 Sansha Electric Mfg Co Ltd Heat sink or mounting circuit board
JP2006147862A (en) * 2004-11-19 2006-06-08 Hoshizaki Electric Co Ltd Operation control device of cooling storage
JP2012069887A (en) * 2010-09-27 2012-04-05 Denso Corp Semiconductor module
JP2012079741A (en) * 2010-09-30 2012-04-19 Denso Corp Electronic control unit
EP2899754A3 (en) * 2014-01-27 2015-10-07 Samsung Electronics Co., Ltd Semiconductor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002246779A (en) * 2001-02-20 2002-08-30 Sansha Electric Mfg Co Ltd Heat sink or mounting circuit board
JP4502242B2 (en) * 2001-02-20 2010-07-14 株式会社三社電機製作所 Circuit board mounting heat sink
JP2006147862A (en) * 2004-11-19 2006-06-08 Hoshizaki Electric Co Ltd Operation control device of cooling storage
JP4555057B2 (en) * 2004-11-19 2010-09-29 ホシザキ電機株式会社 Cooling storage operation control device
JP2012069887A (en) * 2010-09-27 2012-04-05 Denso Corp Semiconductor module
JP2012079741A (en) * 2010-09-30 2012-04-19 Denso Corp Electronic control unit
EP2899754A3 (en) * 2014-01-27 2015-10-07 Samsung Electronics Co., Ltd Semiconductor device
US9711435B2 (en) 2014-01-27 2017-07-18 Samsung Electronics Co., Ltd. Semiconductor device

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