JPH06338634A - Semiconductor light-emitting element array - Google Patents
Semiconductor light-emitting element arrayInfo
- Publication number
- JPH06338634A JPH06338634A JP15147293A JP15147293A JPH06338634A JP H06338634 A JPH06338634 A JP H06338634A JP 15147293 A JP15147293 A JP 15147293A JP 15147293 A JP15147293 A JP 15147293A JP H06338634 A JPH06338634 A JP H06338634A
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- layer
- electrode
- light emitting
- light
- emitting element
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体発光素子アレイ
に係り、特にメサ構造の面発光型半導体発光素子を有す
る半導体発光素子モノリシックアレイに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device array, and more particularly to a semiconductor light emitting device monolithic array having a surface emitting semiconductor light emitting device having a mesa structure.
【０００２】[0002]
【従来の技術】従来より、半導体発光素子を高密度に集
積してアレイ化したものが、光プリンタ用光源、あるい
は光を用いた情報処理用素子などに使用されている。基
板上に順次積層させた半導体結晶層を電気的に分離し
て、発光素子を列状に形成する半導体発光素子モノリシ
ックアレイでは、発光素子を分離する方法として、選択
拡散法や、メサ型エッチング法などが用いられている。2. Description of the Related Art Conventionally, a semiconductor light emitting element integrated in high density to form an array has been used as a light source for an optical printer or an information processing element using light. In a semiconductor light emitting element monolithic array in which light emitting elements are formed in rows by electrically separating semiconductor crystal layers sequentially stacked on a substrate, a selective diffusion method or a mesa etching method is used as a method for separating the light emitting elements. Are used.
【０００３】次に、メサ型エッチング法による従来の半
導体発光素子アレイの一例を図２と共に説明する。図２
は、従来の半導体発光素子アレイの一例の構造を示す列
方向に垂直な部分拡大断面図である。同図において、従
来例の半導体発光素子アレイ２１は、ｎ−ＧａＡｓ基板
２上に、ｎ−ＧａＡｓバッファ層３、反射層４、ｎ−Ａ
ｌ0.7 Ｇａ0.3 Ａｓクラッド層５、ｐ−Ａｌ0.3 Ｇａ
0.7 Ａｓ発光層６、ｐ−Ａｌ0.7 Ｇａ0.3 Ａｓクラッド
層７を順次積層した半導体結晶層を、エッチングによる
分離溝９によって分離した複数個の発光素子１０を有
し、電極接合部を除く半導体結晶上面、及び分離溝９表
面には、ＳｉＮ反射防止膜１２が形成してある。ここで
発光素子１０は、紙面に垂直な方向に、分離溝９により
分離されて列状に複数個並んでいる。基板２の下面全面
には電極１３が設置してある。かつ個々の発光素子１０
のクラッド層７の上面にはコンタクト層８を介して電極
１４を設置して、メサ型のエッチング溝上を這うように
して電極１４を引き出してある。Next, an example of a conventional semiconductor light emitting device array by the mesa type etching method will be described with reference to FIG. Figure 2
FIG. 7 is a partially enlarged cross-sectional view perpendicular to the column direction showing the structure of an example of a conventional semiconductor light emitting device array. In the same figure, a semiconductor light emitting element array 21 of a conventional example has an n-GaAs substrate 2, an n-GaAs buffer layer 3, a reflective layer 4 and an n-A substrate.
l 0.7 Ga 0.3 As clad layer 5, p-Al 0.3 Ga
A semiconductor crystal having a plurality of light emitting elements 10 in which a semiconductor crystal layer in which a 0.7 As light emitting layer 6 and a p-Al 0.7 Ga 0.3 As clad layer 7 are sequentially stacked is separated by a separation groove 9 by etching, and a semiconductor crystal layer excluding an electrode junction portion. A SiN antireflection film 12 is formed on the upper surface and the surface of the separation groove 9. Here, the plurality of light emitting elements 10 are separated by the separation groove 9 and arranged in a line in a direction perpendicular to the plane of the drawing. An electrode 13 is provided on the entire lower surface of the substrate 2. And individual light emitting elements 10
The electrode 14 is provided on the upper surface of the clad layer 7 via the contact layer 8 and is drawn out so as to crawl on the mesa-type etching groove.
【０００４】ここで、上記反射層４は、例えば光波干渉
によって発光層６より発生した光を反射することのでき
る半導体結晶層である。この反射層４を基板２と発光層
６との間に形成することで、発光層６から基板２側に発
光された光は、この反射層４によって反射されるため基
板２による光吸収を無くすることができる。ＳｉＮ反射
防止膜１２は、光波干渉によって光の出力面での反射を
抑え、光を効率よく透過させて発光出力が損失されるの
を防ぎ、かつ電極１４と半導体結晶層との間に介在させ
て、絶縁体としても働く。Here, the reflection layer 4 is a semiconductor crystal layer capable of reflecting the light generated from the light emitting layer 6 by light wave interference, for example. By forming the reflective layer 4 between the substrate 2 and the light emitting layer 6, the light emitted from the light emitting layer 6 to the substrate 2 side is reflected by the reflective layer 4 so that light absorption by the substrate 2 is eliminated. can do. The SiN antireflection film 12 suppresses reflection of light on the output surface by light wave interference, efficiently transmits light to prevent loss of light emission output, and is interposed between the electrode 14 and the semiconductor crystal layer. It also works as an insulator.
【０００５】[0005]
【発明が解決しようとする課題】ところで、上述したよ
うな構造の従来例の半導体発光素子アレイ２１におい
て、電極１４は、メサ型の分離溝上を這うようにして引
き出しているので、蒸着などによって電極１４を形成さ
せた場合、メサ型の肩の部分が薄くなり、応力の影響で
亀裂が入り易くなる為、電極１４の厚さにむらができ、
電気抵抗にばらつきができた。その結果、発光出力にば
らつきが生じていた。また、断線等の欠陥も生じ易く
て、製造歩留まりが悪くなるという欠点があった。By the way, in the conventional semiconductor light emitting element array 21 having the above-mentioned structure, the electrode 14 is drawn out so as to crawl on the mesa type separation groove. When 14 is formed, the mesa-shaped shoulder portion becomes thin, and cracks easily occur under the influence of stress, so that the thickness of the electrode 14 becomes uneven,
The electric resistance varied. As a result, the light emission output varies. Further, there is a defect that defects such as disconnection are likely to occur and the manufacturing yield is deteriorated.
【０００６】そこで、本発明は上記の点に着目してなさ
れたものであって、半導体結晶層を基板上に構成し、分
離溝によって分離して発光素子を複数個形成した半導体
発光素子アレイにおいて、分離溝に樹脂を充填して電極
設置面を平面化することによって、電極の形状を均一に
して電気抵抗のばらつきをなくし、発光出力の均一化を
図ると共に、電極の断線等の欠陥を防止し、製造歩留ま
りを向上させることを目的とする。Therefore, the present invention has been made by paying attention to the above points, and in a semiconductor light emitting device array in which a semiconductor crystal layer is formed on a substrate and a plurality of light emitting devices are formed by separating by a separation groove. By filling the separation groove with resin and making the electrode installation surface flat, the shape of the electrode is made uniform, the variation in electrical resistance is eliminated, the emission output is made uniform, and defects such as disconnection of the electrode are prevented. However, the purpose is to improve the manufacturing yield.
【０００７】[0007]
【課題を解決するための手段】本発明の半導体発光素子
アレイは、伝導型の異なる半導体結晶層で発光層を挟み
込むように接合して基板上に積層した半導体結晶層を、
分離溝によって分離して発光素子を複数個形成した半導
体発光素子アレイにおいて、前記分離溝に樹脂を充填す
ると共に、前記複数の発光素子に接続する一方側の各々
の電極を、前記樹脂上部を通って引き出したことにより
上述の目的を達成するものである。A semiconductor light emitting device array according to the present invention comprises a semiconductor crystal layer laminated on a substrate by joining the semiconductor crystal layers having different conductivity types so as to sandwich the light emitting layer.
In a semiconductor light emitting device array in which a plurality of light emitting devices are formed by being separated by a separation groove, the separation groove is filled with resin, and each electrode on one side connected to the plurality of light emitting devices is passed over the resin. The above-mentioned object is achieved by drawing out.
【０００８】[0008]
【実施例】以下、図１を参照して本発明の一実施例を説
明する。なお、上述した従来例と同様の構成部分、また
は従来例と対応する構成部分には、同様の符号を用いて
その説明を省略することがある。図１は、本発明の半導
体発光素子アレイの一実施例の構造を示す列方向に垂直
な部分拡大断面図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. The same components as those of the above-described conventional example or components corresponding to those of the conventional example are denoted by the same reference numerals, and the description thereof may be omitted. FIG. 1 is a partially enlarged sectional view perpendicular to the column direction showing the structure of an embodiment of the semiconductor light emitting device array of the present invention.
【０００９】同図において、半導体発光素子アレイ１
は、まずｎ−ＧａＡｓ基板２上に、Ｓｅを添加しキャリ
ア濃度が２×１０18cm-3で膜厚０．５μm のｎ−ＧａＡ
ｓバッファー層３を積層し、続いてＳｅを添加しキャリ
ア濃度が２×１０18cm-3で膜厚が５１nmのｎ−Ａｌ0.45
Ｇａ0.55Ａｓと膜厚５９nmのｎ−ＡｌＡｓとを１組とし
て、２５組積層した反射層４を積層する。反射層４のそ
れぞれの膜は、干渉によって反射率を最大にするよう選
ぶ物で、通常膜厚ｄは、部材の屈折率をｎ、発光中心波
長をλｐとしたとき膜厚ｄは次式で与えられる。 ｄ＝λｐ／４ｎ また、組数を増やすことにより、反射層４の性能（最大
反射率）を向上することができる。In FIG. 1, a semiconductor light emitting element array 1
First, n-GaA having a carrier concentration of 2 × 10 18 cm −3 and a film thickness of 0.5 μm was prepared by adding Se onto the n-GaAs substrate 2.
s buffer layer 3 is laminated, and then Se is added to make n-Al 0.45 having a carrier concentration of 2 × 10 18 cm −3 and a film thickness of 51 nm.
The reflective layer 4 is formed by stacking 25 sets of Ga 0.55 As and n-AlAs having a film thickness of 59 nm as one set. Each film of the reflective layer 4 is selected so as to maximize the reflectivity by interference. Usually, the film thickness d is expressed by the following formula when the refractive index of the member is n and the emission center wavelength is λp. Given. d = λp / 4n Further, the performance (maximum reflectance) of the reflective layer 4 can be improved by increasing the number of sets.
【００１０】さらに反射層４上に、Ｓｅを添加しキャリ
ア濃度が１×１０18cm-3で膜厚が５μm のｎ−Ａｌ0.7
Ｇａ0.3 Ａｓクラッド層５と、Ｚｎを添加しキャリア濃
度が５×１０17cm-3で膜厚が０．５μm のｐ−Ａｌ0.3
Ｇａ0.7 Ａｓ発光層６と、Ｚｎを添加しキャリア濃度が
８×１０17cm-3で膜厚が２μm のｐ−Ａｌ0.7 Ｇａ0.3
Ａｓクラッド層７と、Ｚｎを添加しキャリア濃度が３×
１０18cm-3で膜厚が０．１μm のｐ−ＧａＡｓコンタク
ト層８とを積層する。これらはすべて有機金属気相成長
法（ＭＯＣＶＤ法）または、分子線エピタキシー法（Ｍ
ＢＥ法）等を用いて行う。続いてＣＶＤ法により半導体
層上にＳｉＯ2 膜を積層し、後にリソグラフィー技術を
用いＳｉＯ2 膜を所望のパターンにエッチングを行う。
続いて残ったＳｉＯ2 膜をエッチングマスクとし、塩酸
エッチング液を用いて分離溝９を作製し、発光素子１０
を分離する。ここで発光素子１０は、紙面に垂直な方向
に、分離溝９により分離されて列状に複数個形成されて
いる。次にポンティング法により溝内にポリイミド樹脂
１１をその上面がｐ−Ａｌ0.7 Ｇａ0.3 Ａｓクラッド層
７上面と同一平面となるよう充填する。Further, Se is added on the reflection layer 4 to make n-Al 0.7 having a carrier concentration of 1 × 10 18 cm -3 and a film thickness of 5 μm.
Ga 0.3 As clad layer 5 and Zn-added p-Al 0.3 with a carrier concentration of 5 × 10 17 cm -3 and a film thickness of 0.5 μm.
Ga 0.7 As light emitting layer 6 and Zn-added p-Al 0.7 Ga 0.3 with a carrier concentration of 8 × 10 17 cm -3 and a film thickness of 2 μm.
As clad layer 7 and Zn are added so that the carrier concentration is 3 ×
A p-GaAs contact layer 8 having a thickness of 10 18 cm −3 and a thickness of 0.1 μm is laminated. These are all metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (M
BE method) or the like. Then an SiO 2 layer is deposited over the semiconductor layer by CVD, etching is performed for the SiO 2 film into a desired pattern using a lithographic technique after.
Subsequently, using the remaining SiO 2 film as an etching mask, a separation groove 9 was formed using a hydrochloric acid etching solution, and the light emitting element 10 was formed.
To separate. Here, a plurality of light emitting elements 10 are formed in a line in a direction perpendicular to the paper surface and separated by a separation groove 9. Next, a polyimide resin 11 is filled in the groove by a poting method so that its upper surface is flush with the upper surface of the p-Al 0.7 Ga 0.3 As clad layer 7.
【００１１】アンモニアと過酸化水素水の混合溶液から
なるエッチング液により、電極との接合部分を残して、
ｐ−ＧａＡｓコンタクト層８を取り除いた後、気相成長
法（ＣＶＤ法）により、絶縁膜でもあるＳｉＮ反射防止
膜１２を膜厚９７nmで、ｐ−Ａｌ0.7 Ｇａ0.3 Ａｓクラ
ッド層７上面、ポリイミド樹脂１０上面全体に形成す
る。このＳｉＮ反射防止膜１２は、出力される光の光出
力面での反射成分を干渉により除去し、透過率を最大に
する物である。通常膜厚ｄは、部材の屈折率をｎ1 、発
光中心波長をλｐとしたとき膜厚ｄは次式で与えられ
る。 ｄ＝λｐ／４ｎ1 また、屈折率の異なる膜をそれぞれ前述した膜厚ｄの条
件で、複数積層すれば更に反射防止の効果が得られる。An etching solution consisting of a mixed solution of ammonia and hydrogen peroxide solution was used to leave the joint with the electrode.
After removing the p-GaAs contact layer 8, the SiN antireflection film 12 which is also an insulating film is formed to a film thickness of 97 nm by a vapor phase growth method (CVD method), the upper surface of the p-Al 0.7 Ga 0.3 As clad layer 7, the polyimide resin. 10 Formed on the entire upper surface. The SiN antireflection film 12 is a material that maximizes the transmittance by removing the reflected component of the output light on the light output surface by interference. The normal film thickness d is given by the following equation when the refractive index of the member is n 1 and the emission center wavelength is λp. d = λp / 4n 1 Further, if a plurality of films having different refractive indices are laminated under the conditions of the film thickness d described above, the effect of antireflection can be further obtained.
【００１２】次に、エッチングにより、電極接合部分の
ｐ−ＧａＡｓコンタクト層８を露出させる。リソグラフ
ィー技術、及びスパッタリングにより、基板２下面全面
に電極１３を、そして各々分離され、露出されたｐ−Ｇ
ａＡｓコンタクト層８に接合して、ポリイミド樹脂１１
上部のＳｉＮ反射防止膜１２上を通って引き出すように
して電極１４を形成させる。Next, the p-GaAs contact layer 8 at the electrode junction is exposed by etching. The electrodes 13 are formed on the entire lower surface of the substrate 2 by the lithography technique and the sputtering, and the exposed and separated p-G.
a polyimide resin 11 bonded to the aAs contact layer 8
The electrode 14 is formed so as to extend through the upper SiN antireflection film 12.
【００１３】このようにしてできた半導体発光素子アレ
イ１は、電極１４を、ほぼ平坦となったポリイミド樹脂
１１上部のＳｉＮ反射防止膜１２上を這うようにして引
き出すので、容易に電極１４の厚さを均一にすることが
でき、電極１４の電気抵抗のばらつきをなくすことがで
きる。その結果、発光出力も均一化することができる。
また、電極１４の断線等の欠陥が減少し、製造歩留まり
が向上する。In the semiconductor light emitting element array 1 thus formed, the electrode 14 is pulled out by crawling over the SiN antireflection film 12 on the substantially flattened polyimide resin 11, so that the thickness of the electrode 14 can be easily increased. Can be made uniform, and the variation in the electric resistance of the electrode 14 can be eliminated. As a result, the light emission output can be made uniform.
Further, defects such as disconnection of the electrode 14 are reduced, and the manufacturing yield is improved.
【００１４】なお、本実施例で用いた具体的な数値や、
材料名等は説明のために使用したにすぎないものであっ
て、本発明に係わる半導体発光素子アレイは、それらに
限定されることはなく、半導体発光素子アレイが使用さ
れる状況において適宜変更可能である。The specific numerical values used in this embodiment and
The material names and the like are used only for the purpose of explanation, and the semiconductor light emitting element array according to the present invention is not limited to them, and can be appropriately changed in a situation where the semiconductor light emitting element array is used. Is.
【００１５】[0015]
【発明の効果】基板上で順次積層して構成した半導体結
晶層を、分離溝によって分離して、発光素子を複数個形
成した半導体発光素子アレイにおいて、分離溝に樹脂を
充填して電極設置面を平面化することによって、電極の
形状を容易に均一にして電気抵抗のばらつきをなくし、
発光出力を均一化することができる。また、電極の断線
等の欠陥を防止し、製造歩留まりを向上させることがで
きる。従って、低コストで高品質な半導体発光素子アレ
イが提供可能である。EFFECT OF THE INVENTION In a semiconductor light emitting element array in which a plurality of light emitting elements are formed by separating semiconductor crystal layers sequentially formed on a substrate by a separating groove, a resin is filled in the separating groove and an electrode mounting surface is formed. By flattening the shape of the electrode, the shape of the electrode can be easily made uniform to eliminate the variation in electric resistance,
The light emission output can be made uniform. Further, it is possible to prevent defects such as breakage of electrodes and improve the manufacturing yield. Therefore, it is possible to provide a high-quality semiconductor light emitting element array at low cost.
【図１】本発明の半導体発光素子アレイの一実施例の構
造を示す列方向に垂直な部分拡大断面図である。FIG. 1 is a partially enlarged sectional view perpendicular to a column direction showing a structure of an embodiment of a semiconductor light emitting device array of the present invention.
【図２】従来の半導体発光素子アレイの一例の構造を示
す列方向に垂直な部分拡大断面図である。FIG. 2 is a partially enlarged cross-sectional view perpendicular to the column direction showing the structure of an example of a conventional semiconductor light emitting device array.
１ 半導体発光素子アレイ ２ 基板 ４ 反射層 ５ クラッド層（半導体結晶層） ６ 発光層 ７ クラッド層（半導体結晶層） ８ コンタクト層 ９ 分離溝 １０ 発光素子 １１ ポリイミド樹脂（樹脂） １２ 反射防止膜 １４ 電極 1 Semiconductor Light-Emitting Element Array 2 Substrate 4 Reflective Layer 5 Clad Layer (Semiconductor Crystal Layer) 6 Light-Emitting Layer 7 Clad Layer (Semiconductor Crystal Layer) 8 Contact Layer 9 Separation Groove 10 Light-Emitting Element 11 Polyimide Resin (Resin) 12 Antireflection Film 14 Electrode
Claims (1)
み込むように接合して基板上に積層した半導体結晶層
を、分離溝によって分離して発光素子を複数個形成した
半導体発光素子アレイにおいて、 前記分離溝に樹脂を充填すると共に、前記複数の発光素
子に接続する一方側の各々の電極を、前記樹脂上部を通
って引き出したことを特徴とする半導体発光素子アレ
イ。1. A semiconductor light-emitting element array comprising a plurality of light-emitting elements formed by separating semiconductor crystal layers laminated on a substrate by sandwiching the light-emitting layer with semiconductor crystal layers having different conductivity types so as to form a plurality of light-emitting elements. A semiconductor light emitting element array, characterized in that the separation groove is filled with resin, and each electrode on one side connected to the plurality of light emitting elements is drawn out through the resin upper portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15147293A JPH06338634A (en) | 1993-05-28 | 1993-05-28 | Semiconductor light-emitting element array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15147293A JPH06338634A (en) | 1993-05-28 | 1993-05-28 | Semiconductor light-emitting element array |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06338634A true JPH06338634A (en) | 1994-12-06 |
Family
ID=15519265
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15147293A Pending JPH06338634A (en) | 1993-05-28 | 1993-05-28 | Semiconductor light-emitting element array |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06338634A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003179263A (en) * | 2002-11-11 | 2003-06-27 | Seiwa Electric Mfg Co Ltd | Gallium nitride semiconductor light emitting element |
| EP1667228A2 (en) * | 2004-12-02 | 2006-06-07 | Samsung Electro-Mechanics Co., Ltd | Semiconductor light emitting device and method of manufacturing the same |
| JP2007273627A (en) * | 2006-03-30 | 2007-10-18 | Kyocera Corp | Light transfer array device and its manufacturing method, light-emitting device and device for forming image |
| CN100440552C (en) * | 2005-02-08 | 2008-12-03 | 晶元光电股份有限公司 | LED and production thereof |
| JP2009283984A (en) * | 2005-05-03 | 2009-12-03 | Samsung Electro Mech Co Ltd | Flip chip light emitting diode, and manufacturing method thereof |
| JP2010177447A (en) * | 2009-01-29 | 2010-08-12 | Kyocera Corp | Light-emitting device array and method of manufacturing the same |
| JP2013504185A (en) * | 2009-09-03 | 2013-02-04 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング | Optoelectronic module comprising at least one first semiconductor body having a radiation exit surface and an insulating layer, and a method for manufacturing the same |
| WO2014129688A1 (en) * | 2013-02-25 | 2014-08-28 | 서울바이오시스 주식회사 | Light-emitting diode with a plurality of light-emitting elements and method for manufacturing same |
| CN117525233A (en) * | 2024-01-05 | 2024-02-06 | 南昌凯迅光电股份有限公司 | Small-size red light LED chip and manufacturing method thereof |
-
1993
- 1993-05-28 JP JP15147293A patent/JPH06338634A/en active Pending
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003179263A (en) * | 2002-11-11 | 2003-06-27 | Seiwa Electric Mfg Co Ltd | Gallium nitride semiconductor light emitting element |
| JP2013084916A (en) * | 2004-12-02 | 2013-05-09 | Samsung Electronics Co Ltd | Light-emitting device and manufacturing method thereof |
| EP1667228A2 (en) * | 2004-12-02 | 2006-06-07 | Samsung Electro-Mechanics Co., Ltd | Semiconductor light emitting device and method of manufacturing the same |
| JP2006165543A (en) * | 2004-12-02 | 2006-06-22 | Samsung Electro Mech Co Ltd | Semiconductor light-emitting device and manufacturing method thereof |
| CN100440552C (en) * | 2005-02-08 | 2008-12-03 | 晶元光电股份有限公司 | LED and production thereof |
| JP2009283984A (en) * | 2005-05-03 | 2009-12-03 | Samsung Electro Mech Co Ltd | Flip chip light emitting diode, and manufacturing method thereof |
| JP2007273627A (en) * | 2006-03-30 | 2007-10-18 | Kyocera Corp | Light transfer array device and its manufacturing method, light-emitting device and device for forming image |
| JP4755520B2 (en) * | 2006-03-30 | 2011-08-24 | 京セラ株式会社 | Optical transfer array device and manufacturing method thereof, light emitting device, and image forming apparatus |
| JP2010177447A (en) * | 2009-01-29 | 2010-08-12 | Kyocera Corp | Light-emitting device array and method of manufacturing the same |
| JP2013504185A (en) * | 2009-09-03 | 2013-02-04 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング | Optoelectronic module comprising at least one first semiconductor body having a radiation exit surface and an insulating layer, and a method for manufacturing the same |
| US8847247B2 (en) | 2009-09-03 | 2014-09-30 | Osram Opto Semiconductors Gmbh | Optoelectronic module comprising at least one first semiconductor body having a radiation outlet side and an insulation layer and method for the production thereof |
| WO2014129688A1 (en) * | 2013-02-25 | 2014-08-28 | 서울바이오시스 주식회사 | Light-emitting diode with a plurality of light-emitting elements and method for manufacturing same |
| CN117525233A (en) * | 2024-01-05 | 2024-02-06 | 南昌凯迅光电股份有限公司 | Small-size red light LED chip and manufacturing method thereof |
| CN117525233B (en) * | 2024-01-05 | 2024-04-12 | 南昌凯迅光电股份有限公司 | Small-size red light LED chip and manufacturing method thereof |
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