JPH06334307A - Manufacture of circuit body - Google Patents
Manufacture of circuit bodyInfo
- Publication number
- JPH06334307A JPH06334307A JP11699293A JP11699293A JPH06334307A JP H06334307 A JPH06334307 A JP H06334307A JP 11699293 A JP11699293 A JP 11699293A JP 11699293 A JP11699293 A JP 11699293A JP H06334307 A JPH06334307 A JP H06334307A
- Authority
- JP
- Japan
- Prior art keywords
- resin molded
- electroless plating
- insulating layer
- circuit
- catalyst
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、樹脂成形体の表面に無
電解メッキにより導電回路を形成させる回路体の製造方
法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a circuit body in which a conductive circuit is formed on the surface of a resin molded body by electroless plating.
【０００２】[0002]
【従来の技術】図５は、特開昭６３−１２８１８１号公
報に記載された従来の回路体の完成状態を示すものであ
る。この回路体１１の製造方法は、先ず塩化パラジウム
等の無電解メッキ鍍着用の触媒を含有した合成樹脂材で
回路パターン形状１２を一体に突設させた一次成形体１
３を立体型に形成させ、次いで該一次成形体１３の表面
上に前記触媒を含まない合成樹脂材を被着させて二次成
形体１４を形成させ、該二次成形体１４の表面に露出し
た前記一次成形体１３の回路パターン１２上に無電解メ
ッキ１５を鍍着させて三次元の導電回路を形成させるも
のである。2. Description of the Related Art FIG. 5 shows a completed state of a conventional circuit body described in JP-A-63-128181. The method for manufacturing the circuit body 11 is as follows. First, a primary molded body 1 in which a circuit pattern shape 12 is integrally projected with a synthetic resin material containing a catalyst for plating by electroless plating such as palladium chloride.
3 is formed in a three-dimensional shape, and then a synthetic resin material containing no catalyst is applied onto the surface of the primary molded body 13 to form a secondary molded body 14, which is exposed on the surface of the secondary molded body 14. The electroless plating 15 is plated on the circuit pattern 12 of the primary molded body 13 to form a three-dimensional conductive circuit.
【０００３】しかしながら、上記従来の回路体の製造方
法にあっては、一次成形体１３と二次成形体１４とを形
成させるために二つの成形型と成形工程とを必要とし、
製造コストが高くつくと同時に回路体の迅速な設計変更
対応が困難であるという問題があった。However, in the above-mentioned conventional method for manufacturing a circuit body, two molding dies and a molding process are required to form the primary molded body 13 and the secondary molded body 14,
There is a problem that the manufacturing cost is high and at the same time, it is difficult to deal with the rapid design change of the circuit body.
【０００４】[0004]
【発明が解決しようとする課題】本発明は、上記した点
に鑑み、立体型の回路体を低い製造コストで形成でき、
しかも迅速な設計変更対応が可能な回路体の製造方法を
提供することを目的とする。In view of the above points, the present invention can form a three-dimensional circuit body at a low manufacturing cost,
Moreover, it is an object of the present invention to provide a method for manufacturing a circuit body that can quickly respond to design changes.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するため
に、本発明は、無電解メッキ鍍着用の触媒を含有する樹
脂成形体の表面に絶縁層を被着させ、該絶縁層にレーザ
ビームを照射して該絶縁層を回路パターン形状に除去さ
せ、該樹脂成形体の絶縁層除去部に無電解メッキを鍍着
させることを特徴とする第一の製造方法、及び、樹脂成
形体の表面に無電解メッキ鍍着用の触媒層を被着させ、
該触媒層にレーザビームを照射して該触媒層の回路パタ
ーン形状以外の部分を除去させ、該樹脂成形体の触媒層
残存部に無電解メッキを鍍着させることを特徴とする第
二の製造方法を併せて採用する。In order to achieve the above object, the present invention provides an insulating layer deposited on the surface of a resin molding containing a catalyst for electroless plating, and a laser beam is applied to the insulating layer. Is applied to remove the insulating layer in a circuit pattern shape, and electroless plating is plated on the insulating layer removing portion of the resin molded body, and the surface of the resin molded body. Apply a catalyst layer for electroless plating to the
A second manufacturing method characterized in that the catalyst layer is irradiated with a laser beam to remove a portion other than the circuit pattern shape of the catalyst layer, and electroless plating is plated on the catalyst layer remaining portion of the resin molded body. The method is also adopted.
【０００６】[0006]
【作用】上記第一の製造方法にあってはレーザビームに
より絶縁層が摩剥除去され、触媒を含む樹脂成形体が回
路パターン形状に露出される。そして絶縁層除去部にお
いて無電解メッキが触媒の作用で鍍着される。また第二
の製造方法にあっては、樹脂成形体上の触媒層が回路パ
ターン形状を残存させてそれ以外の部分が摩剥除去され
る。そして回路パターン形状に無電解メッキが鍍着され
る。In the first manufacturing method described above, the insulating layer is abraded and removed by the laser beam, and the resin molding containing the catalyst is exposed in the circuit pattern shape. Then, in the insulating layer removing portion, electroless plating is plated by the action of the catalyst. Further, in the second manufacturing method, the catalyst layer on the resin molded body retains the circuit pattern shape and the other portions are removed by abrasion. Then, electroless plating is plated on the circuit pattern shape.
【０００７】[0007]
【実施例】図１〜４は本発明に係る回路体の製造方法の
一実施例を示すものである。この製造方法は、先ず図１
の如く無電解メッキ鍍着用の触媒（パラジウム等）を含
浸させたＡＢＳ樹脂材により三次元形状の樹脂成形体
（板厚1.5 〜2mm ）１を形成させ、該樹脂成形体１の表
面に絶縁層２を被着させる。1 to 4 show an embodiment of a method of manufacturing a circuit body according to the present invention. This manufacturing method starts with FIG.
A three-dimensional resin molded body (plate thickness 1.5 to 2 mm) 1 is formed from an ABS resin material impregnated with a catalyst (palladium, etc.) for electroless plating as described above, and an insulating layer is formed on the surface of the resin molded body 1. Put on 2.
【０００８】次いで図２の如く該樹脂成形体１の絶縁層
２にプログラム制御によりレーザビーム３を照射して所
望の回路パターン形状４に該絶縁層２を摩剥除去する。
該レーザビーム３としてはエキシマレーザ（EXICITED D
IMER) が好適である。エキシマレーザは紫外線ビームの
短波長発信(193〜351nm)により光子エネルギが大きく、
且つ短パルス発振(10 〜20ns) での高ピークパワー(10
〜15MW）により瞬間的光吸収を可能とし、光化学反応
（分子結合開裂) によりアブレーション（摩剥）加工を
行わせ得る。Then, as shown in FIG. 2, the insulating layer 2 of the resin molding 1 is irradiated with a laser beam 3 by program control to remove the insulating layer 2 in a desired circuit pattern shape 4.
The laser beam 3 is an excimer laser (EXICITED D
IMER) is preferred. The excimer laser has a large photon energy due to the short wavelength transmission of the ultraviolet beam (193 to 351 nm),
In addition, high peak power (10 to 20 ns) with short pulse oscillation (10 to 20 ns)
(~ 15 MW) enables instantaneous light absorption, and photochemical reaction (cleavage of molecular bond) allows ablation processing.
【０００９】なおレーザビーム３の照射に際しては樹脂
成形体１上に図３(a) のような回路パターン孔５を有す
るマスク板６を被せて、該マスク板６上にレーザビーム
３′を全面的に照射させてもよい。When the laser beam 3 is irradiated, the resin molding 1 is covered with a mask plate 6 having circuit pattern holes 5 as shown in FIG. 3 (a), and the laser beam 3'is entirely covered on the mask plate 6. You may irradiate it.
【００１０】そして該絶縁層２を回路パターン形状４に
除去した樹脂成形体１′を図４の如く導電メッキ槽７の
中に浸して絶縁層除去部４′にメッキ（100um 以下）８
を鍍着させる。該メッキ８は絶縁層除去部４′において
樹脂成形体１′中の触媒２が露出していることにより化
学的に鍍着する。Then, the resin molding 1 ′ from which the insulating layer 2 has been removed into the circuit pattern shape 4 is dipped in the conductive plating bath 7 as shown in FIG. 4 to plate the insulating layer removing portion 4 ′ (100 μm or less) 8
To plate. The plating 8 is chemically deposited in the insulating layer removing portion 4'because the catalyst 2 in the resin molding 1'is exposed.
【００１１】また、上記実施例の他に図１において触媒
２を含まない樹脂成形体（１）を形成させ、その表面に
無電解メッキ鍍着用の触媒層(100um以下）（図で符号２
に相当）をディップ法等により被着させて、図２におい
て該触媒層の回路パターン形状（４）以外の部分をレー
ザビーム３で摩剥除去させ、図４の如く回路パターン形
状の触媒層残存部（４′）にメッキ処理により導電メッ
キ８を鍍着させることも可能である。In addition to the above embodiment, a resin molding (1) containing no catalyst 2 is formed in FIG. 1, and a catalyst layer (100 μm or less) for electroless plating is formed on the surface of the resin molding (1 in FIG. 2).
2) is deposited by a dipping method or the like, and the portion of the catalyst layer other than the circuit pattern shape (4) in FIG. 2 is abraded away by the laser beam 3 to leave the catalyst layer having the circuit pattern shape as shown in FIG. It is also possible to plate the conductive plating 8 on the portion (4 ') by plating.
【００１２】[0012]
【発明の効果】以上の如くに、本発明によれば、レーザ
ビームにより樹脂成形体上の絶縁層ないし触媒層を摩剥
除去して無電解メッキ鍍着用の触媒を有する回路パター
ン形状を得るから、従来のような二ショット法による面
倒な成形が不要となり、回路体の製造工程の簡素化及び
製造コストの低減並びに設計変更等の迅速な対応が実現
される。As described above, according to the present invention, a circuit pattern shape having a catalyst for electroless plating is obtained by removing an insulating layer or a catalyst layer on a resin molding by abrasion with a laser beam. As a result, the troublesome molding by the conventional two-shot method becomes unnecessary, and the simplification of the manufacturing process of the circuit body, the reduction of the manufacturing cost, and the quick response such as the design change can be realized.
【図１】本発明の回路体の製造方法における樹脂成形体
の形成工程を示す斜視図である。FIG. 1 is a perspective view showing a step of forming a resin molded body in a circuit body manufacturing method of the present invention.
【図２】樹脂成形体にレーザビームを照射させて絶縁層
ないし触媒層を除去させる工程を示す斜視図である。FIG. 2 is a perspective view showing a step of irradiating a resin molded body with a laser beam to remove an insulating layer or a catalyst layer.
【図３】(a) はマスク板を示す斜視図、(b) は樹脂成形
体にマスク板を被せてビーム照射させる工程を示す斜視
図である。FIG. 3A is a perspective view showing a mask plate, and FIG. 3B is a perspective view showing a step of covering the resin molding with the mask plate and irradiating the resin beam.
【図４】樹脂成形体にメッキを施す工程を示す斜視図で
ある。FIG. 4 is a perspective view showing a step of plating a resin molded body.
【図５】従来例を示す斜視図である。FIG. 5 is a perspective view showing a conventional example.
１ 樹脂成形体 ２ 絶縁層または触媒層 ３，３′ レーザビーム ４ 回路パターン形状 ４′ 絶縁層除去部または触媒層残存部 DESCRIPTION OF SYMBOLS 1 Resin molded body 2 Insulating layer or catalyst layer 3,3 'Laser beam 4 Circuit pattern shape 4'Insulating layer removal part or catalyst layer remaining part
Claims (2)
脂成形体の表面に絶縁層を被着させ、該絶縁層にレーザ
ビームを照射して該絶縁層を回路パターン形状に除去さ
せ、該樹脂成形体の絶縁層除去部に無電解メッキを鍍着
させることを特徴とする回路体の製造方法。1. An insulating layer is deposited on the surface of a resin molded body containing a catalyst for electroless plating, and the insulating layer is irradiated with a laser beam to remove the insulating layer into a circuit pattern shape. A method for manufacturing a circuit body, characterized in that electroless plating is applied to the insulating layer removed portion of the resin molded body.
の触媒層を被着させ、該触媒層にレーザビームを照射し
て該触媒層の回路パターン形状以外の部分を除去させ、
該樹脂成形体の触媒層残存部に無電解メッキを鍍着させ
ることを特徴とする回路体の製造方法。2. A catalyst layer for electroless plating is applied to the surface of the resin molded body, and the catalyst layer is irradiated with a laser beam to remove a portion other than the circuit pattern shape of the catalyst layer,
A method for producing a circuit body, characterized in that electroless plating is plated on the remaining portion of the resin layer of the catalyst layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11699293A JPH06334307A (en) | 1993-05-19 | 1993-05-19 | Manufacture of circuit body |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11699293A JPH06334307A (en) | 1993-05-19 | 1993-05-19 | Manufacture of circuit body |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06334307A true JPH06334307A (en) | 1994-12-02 |
Family
ID=14700800
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11699293A Withdrawn JPH06334307A (en) | 1993-05-19 | 1993-05-19 | Manufacture of circuit body |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06334307A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10209609A (en) * | 1997-01-17 | 1998-08-07 | Totoku Electric Co Ltd | Manufacture of flexible printed circuit and flexible printed circuit manufactured by the method |
| JP2010251685A (en) * | 2009-04-20 | 2010-11-04 | Kinko Denshi Kofun Yugenkoshi | Method for forming circuit board structure of composite material |
| EP3259774A4 (en) * | 2015-02-16 | 2018-10-24 | Intel Corporation | Microelectronic build-up layers and methods of forming the same |
-
1993
- 1993-05-19 JP JP11699293A patent/JPH06334307A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10209609A (en) * | 1997-01-17 | 1998-08-07 | Totoku Electric Co Ltd | Manufacture of flexible printed circuit and flexible printed circuit manufactured by the method |
| JP2010251685A (en) * | 2009-04-20 | 2010-11-04 | Kinko Denshi Kofun Yugenkoshi | Method for forming circuit board structure of composite material |
| EP3259774A4 (en) * | 2015-02-16 | 2018-10-24 | Intel Corporation | Microelectronic build-up layers and methods of forming the same |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20000801 |