JPH06310740A - Solar cell and fabrication thereof - Google Patents

Solar cell and fabrication thereof

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Publication number
JPH06310740A
JPH06310740A JP5093981A JP9398193A JPH06310740A JP H06310740 A JPH06310740 A JP H06310740A JP 5093981 A JP5093981 A JP 5093981A JP 9398193 A JP9398193 A JP 9398193A JP H06310740 A JPH06310740 A JP H06310740A
Authority
JP
Japan
Prior art keywords
layer
back surface
type
solar cell
film layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5093981A
Other languages
Japanese (ja)
Other versions
JP2931498B2 (en
Inventor
Minoru Kaneiwa
実 兼岩
Noriaki Shibuya
典明 渋谷
Satoshi Okamoto
諭 岡本
Ichiro Yamazaki
一郎 山嵜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
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Priority to JP5093981A priority Critical patent/JP2931498B2/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/054Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means
    • H01L31/056Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means the light-reflecting means being of the back surface reflector [BSR] type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/52PV systems with concentrators
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Sustainable Development (AREA)
  • Chemical & Material Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To enhance the efficiency of a solar cell employing microcrystalline silicon in the field layer formed on the rear surface. CONSTITUTION:A transparent dielectric layer 17 is formed at 50-200 deg.C of substrate temperature by plasma CVD between a rear surface electrode 18 and a P<+> type microcrystalline silicon layer 16 formed, as a rear surface field layer, on a P type silicon substrate 11. This structure enhances the open voltage and the short-circuit current thus improving the spectral sensitivity on the long wavelength side.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は太陽電池に関し、特に、
太陽電池の光電変換効率の改善に関するものである。
FIELD OF THE INVENTION This invention relates to solar cells, and in particular
The present invention relates to improvement of photoelectric conversion efficiency of solar cells.

【0002】[0002]

【従来の技術】従来、太陽電池の光電変換効率を高める
ために、半導体基板の光入射側と反対側の裏面上に上記
半導体基板と同一導電型で、かつ、より高濃度の裏面電
界層を設ける構造が知られている。この裏面電界層は、
裏面近傍で発生したキャリアを内部電界により半導体基
板内部へ押し戻し、光電変換効率を高める働きをしてい
る(以後、この働きを「裏面電界効果」という)。例え
ば、P型シリコン基板の場合に、上記P型シリコン基板
の裏面にアルミペーストを印刷焼成する方法、または、
ボロンやアルミニウムを拡散する方法により裏面電界層
を形成していた。あるいは、上記P型シリコン基板の裏
面に、P+型微結晶シリコン層を設ける方法によりヘテ
ロ接合の裏面電界層を形成していた。このように裏面電
界層をP+型微結晶シリコン層とした時には、通常、P+
型微結晶シリコン層上に裏面電極を形成していた。ここ
で、光学的には、P+型微結晶シリコン層は、P型シリ
コン基板より広い禁制帯幅をもつため、裏面電界層内で
の光の吸収ロスが減り、一方、裏面電極は、入射光を反
射して光電変換効率を高める働きもしている(以後、こ
の働きを「裏面反射効果」という)。
2. Description of the Related Art Conventionally, in order to improve the photoelectric conversion efficiency of a solar cell, a back surface electric field layer of the same conductivity type as that of the semiconductor substrate and having a higher concentration is formed on the back surface of the semiconductor substrate opposite to the light incident side. The structure provided is known. This back surface field layer is
Carriers generated in the vicinity of the back surface are pushed back into the semiconductor substrate by the internal electric field, and the photoelectric conversion efficiency is enhanced (hereinafter, this function is referred to as "back surface field effect"). For example, in the case of a P-type silicon substrate, a method of printing and baking an aluminum paste on the back surface of the P-type silicon substrate, or
The back surface electric field layer is formed by a method of diffusing boron or aluminum. Alternatively, a back surface electric field layer of a heterojunction is formed on the back surface of the P type silicon substrate by a method of providing a P + type microcrystalline silicon layer. Thus the back surface field layer when the P + -type microcrystalline silicon layer, typically, P +
The back electrode was formed on the mold microcrystalline silicon layer. Here, optically, since the P + -type microcrystalline silicon layer has a wider band gap than the P-type silicon substrate, the absorption loss of light in the back surface electric field layer is reduced, while the back surface electrode is incident. It also has the function of reflecting light and increasing the photoelectric conversion efficiency (hereinafter, this function is called the "rear surface reflection effect").

【0003】[0003]

【発明が解決しようとする課題】ところが、P型シリコ
ン基板の裏面に、P+型微結晶シリコン層、裏面電極の
順に形成された太陽電池の入射光の利用は充分でなく、
さらに、光電変換効率を向上することが望まれていた。
However, the utilization of incident light from a solar cell in which a P + -type microcrystalline silicon layer and a back electrode are formed in this order on the back surface of a P-type silicon substrate is not sufficient.
Further, it has been desired to improve the photoelectric conversion efficiency.

【0004】また、入射光の利用効率を高める方法の1
つとして、裏面反射効果を向上する方法があるが、その
ためにP+型微結晶シリコン層と裏面電極との間に、例
えば、熱酸化膜(700〜1000℃の熱酸化)を挿入
することが考えられるが、このような比較的高温の熱処
理を行うと、微結晶シリコン層表面が荒れたり、微結晶
シリコン層中の水素が抜けたり、構造緩和により比抵抗
等の特性が変わってしまうため、その結果、裏面電界効
果が得られず、現実的には、酸化膜等の絶縁膜を形成す
ることができないといった問題点があった。
In addition, one of the methods for improving the utilization efficiency of incident light
As one of the methods, there is a method of improving the back surface reflection effect. For that purpose, for example, a thermal oxide film (thermal oxidation at 700 to 1000 ° C.) may be inserted between the P + type microcrystalline silicon layer and the back surface electrode. It is conceivable that the heat treatment at such a relatively high temperature roughens the surface of the microcrystalline silicon layer, releases hydrogen in the microcrystalline silicon layer, and changes the characteristics such as the specific resistance due to structural relaxation. As a result, there is a problem in that the back surface field effect cannot be obtained and in reality an insulating film such as an oxide film cannot be formed.

【0005】そこで、本発明の目的は、裏面電界効果、
あるいは裏面反射効果をより向上することができ、高い
開放電圧と短絡電流を有し、光電変換効率を向上できる
太陽電池とその製造方法を提供することにある。
Therefore, an object of the present invention is to provide a back surface field effect,
Another object of the present invention is to provide a solar cell that can further improve the back surface reflection effect, has a high open circuit voltage and a short-circuit current, and can improve photoelectric conversion efficiency, and a method for manufacturing the same.

【0006】[0006]

【課題を解決するための手段】本発明は、第1導電型の
半導体基板と、該半導体基板の光入射側に形成された第
2導電型の半導体層と、上記半導体基板の上記光入射側
と反対側の裏面上に形成された第1導電型でかつ上記半
導体基板より高濃度の裏面電界層と、該裏面電界層上に
形成された裏面電極とを有する太陽電池において、上記
裏面電界層と上記裏面電極との間に絶縁膜層を設けるこ
とを特徴とするものである。
According to the present invention, there is provided a semiconductor substrate of a first conductivity type, a semiconductor layer of a second conductivity type formed on the light incident side of the semiconductor substrate, and the light incident side of the semiconductor substrate. A back surface electric field layer of the first conductivity type formed on the back surface opposite to the back surface electric field layer having a higher concentration than that of the semiconductor substrate, and a back surface electrode formed on the back surface electric field layer. It is characterized in that an insulating film layer is provided between and the back electrode.

【0007】また、本発明は上記太陽電池において、上
記絶縁膜層が窒化シリコン膜または酸化シリコン膜であ
ることを特徴とするものである。
Further, the present invention is characterized in that, in the solar cell, the insulating film layer is a silicon nitride film or a silicon oxide film.

【0008】さらに、本発明は、上記太陽電池の製造方
法において、プラズマCVD法により100°〜200
℃の基板温度で上記裏面電界層を形成する工程と、プラ
ズマCVD法により50〜200℃の基板温度で上記絶
縁膜層を形成する工程と、上記裏面電界層及び上記絶縁
膜層の形成後に200℃〜300℃の熱処理を行う工程
とを含むことを特徴とするものである。
Furthermore, the present invention provides a method of manufacturing a solar cell as described above, wherein the plasma CVD method is performed at 100 ° to 200 °.
A step of forming the back surface electric field layer at a substrate temperature of C ° C., a step of forming the insulating film layer at a substrate temperature of 50 to 200 ° C. by a plasma CVD method, and 200 after forming the back surface electric field layer and the insulating film layer. And a step of performing heat treatment at a temperature of 300 to 300 ° C.

【0009】[0009]

【作用】本発明によれば、微結晶シリコン層と裏面電極
との間に微結晶シリコン層より低屈折率の絶縁層を設け
ることにより半導体基板内に反射される光量を増加し
て、裏面反射効果をより高めることができ、光発生電流
を増加させることができる。
According to the present invention, by providing an insulating layer having a refractive index lower than that of the microcrystalline silicon layer between the microcrystalline silicon layer and the back surface electrode, the amount of light reflected in the semiconductor substrate is increased and the back surface reflection is performed. The effect can be further enhanced, and the photo-generated current can be increased.

【0010】また、本発明による製造方法によれば、裏
面電界効果をより高めることができ、開放電圧を高める
ことができる。
Further, according to the manufacturing method of the present invention, the back surface field effect can be further enhanced and the open circuit voltage can be enhanced.

【0011】[0011]

【実施例】本発明に係る太陽電池とその製造方法を実施
例に基づき以下に説明する。
EXAMPLES A solar cell according to the present invention and a method for manufacturing the same will be described below based on examples.

【0012】図1に、本発明の一実施例に係る太陽電池
の断面構造を示す。ここで、P型シリコン基板11の光
入射側にN型層12が形成されている。N型層12の表
面は、入射光の反射を低減するために凹凸にされてい
る。N型層12はシリコン酸化膜層13によって覆われ
ており、シリコン酸化膜層13は反射防止膜層14によ
って覆われている。表面からの電流は、シリコン酸化膜
層13と反射防止膜層14を貫通してN型層12に接続
されたグリッド電極15を介して取り出される。P型基
板11の光入射側と反対側の裏面上には、同じP+型の
不純物が高濃度に添加された裏面電界を形成するP+
微結晶シリコン層16が形成されている。P+型微結晶
シリコン層16は透明絶縁膜層17によって覆われてお
り、透明絶縁膜層17は裏面電極18によって覆われて
いる。裏面からの電流は、透明絶縁膜層17の一部に透
明絶縁膜層17の無い部分が作製されており、その部分
で微結晶シリコン層16に接続された裏面電極18を介
して取り出される。
FIG. 1 shows a sectional structure of a solar cell according to an embodiment of the present invention. Here, the N-type layer 12 is formed on the light incident side of the P-type silicon substrate 11. The surface of the N-type layer 12 is made uneven so as to reduce reflection of incident light. The N-type layer 12 is covered with a silicon oxide film layer 13, and the silicon oxide film layer 13 is covered with an antireflection film layer 14. The current from the surface is taken out through the grid electrode 15 penetrating the silicon oxide film layer 13 and the antireflection film layer 14 and connected to the N-type layer 12. On the back surface of the P-type substrate 11 on the side opposite to the light incident side, a P + -type microcrystalline silicon layer 16 that forms a back surface electric field in which the same P + -type impurity is added at a high concentration is formed. The P + type microcrystalline silicon layer 16 is covered with a transparent insulating film layer 17, and the transparent insulating film layer 17 is covered with a back electrode 18. The current from the back surface is taken out through the back surface electrode 18 connected to the microcrystalline silicon layer 16 at a portion where the transparent insulation film layer 17 is not formed in a portion of the transparent insulation film layer 17.

【0013】次に、上記太陽電池の製造方法について、
図2に基づき説明する。図2は、上記太陽電池の製造フ
ローを示す図である。
Next, with respect to the method for manufacturing the above solar cell,
It will be described with reference to FIG. FIG. 2 is a diagram showing a manufacturing flow of the solar cell.

【0014】まず、単結晶のP型シリコン基板11(1
00mmφ、300μm厚、比抵抗:数Ωcm)を洗浄
した後、表面が凹凸になるように異方性エッチングを行
った。ここで、単結晶のP型シリコン基板のかわりに、
多結晶のP型シリコン基板を用いることもできる。この
場合の表面凹凸形成は、レーザを用いて溝を掘ったり、
機械的に溝を掘る方法により行う。
First, a single crystal P-type silicon substrate 11 (1
After cleaning with 00 mmφ, 300 μm thickness, and specific resistance: several Ωcm, anisotropic etching was performed so that the surface becomes uneven. Here, instead of a single crystal P-type silicon substrate,
A polycrystalline P-type silicon substrate can also be used. In this case, the surface unevenness is formed by digging a groove with a laser,
It is performed by a method of mechanically digging a groove.

【0015】次に、オキシ塩化燐(POCl3)を用い
た気相拡散によって燐(P)をP型シリコン基板11の
表面にN型層12を拡散してPN接合を形成した。続い
て、熱酸化によりシリコン酸化膜層13(パッシベーシ
ョン膜)を形成してから、光入射側に窒化シリコン膜か
らなる反射防止膜層14をプラズマCVD法により形成
した。反射防止膜層14として常圧CVD法による酸化
チタン膜(TiO2)、あるいは、真空蒸着法によるア
ルミナ膜(Al23)を用いることもできる。次に、光
入射側と反対側のP型シリコン基板11の裏面側をエッ
チングして、裏面側に形成されているN型層12を除去
した。この裏面エッチングは、N型層12の形成方法と
して燐添加されたシリコン酸化物ガラス(PSG)液の
ような塗布液を用いて片面だけに拡散して形成した場合
には不要である。
Next, phosphorus (P) was diffused in the N-type layer 12 on the surface of the P-type silicon substrate 11 by vapor phase diffusion using phosphorus oxychloride (POCl 3 ) to form a PN junction. Subsequently, a silicon oxide film layer 13 (passivation film) was formed by thermal oxidation, and then an antireflection film layer 14 made of a silicon nitride film was formed on the light incident side by a plasma CVD method. As the antireflection film layer 14, a titanium oxide film (TiO 2 ) formed by a normal pressure CVD method or an alumina film (Al 2 O 3 ) formed by a vacuum deposition method can be used. Next, the back surface side of the P-type silicon substrate 11 opposite to the light incident side was etched to remove the N-type layer 12 formed on the back surface side. This back surface etching is not necessary when the N-type layer 12 is formed by diffusing only one surface using a coating solution such as a silicon oxide glass (PSG) solution containing phosphorus.

【0016】次に、プラズマCVD法により、P+型微
結晶シリコン層16を膜厚200nmでP型シリコン基
板11の裏面側に形成した。上記プラズマCVD法によ
るP+型微結晶シリコン層16の形成条件として、例え
ば、ガス種はSiH4(またはSi26)とH2とB26
の混合ガス、ガス流量比はH2/SiH4=150,B2
6/SiH4=0.01、ガス圧力は20Pa、基板温
度は150℃、RFパワーは100W(13.56MH
z)である。この条件は、一実施例であり、上記条件に
限定されず、一般的なプラズマCVD法の条件であれば
成膜できるがガス流量比はH2/SiH4≧100,B2
6/SiH4<0.02が適当であり、基板温度は10
0〜200℃が最適である。
Next, a P + type microcrystalline silicon layer 16 was formed in a thickness of 200 nm on the back surface side of the P type silicon substrate 11 by the plasma CVD method. As the conditions for forming the P + -type microcrystalline silicon layer 16 by the plasma CVD method, for example, the gas species are SiH 4 (or Si 2 H 6 ), H 2 and B 2 H 6
Mixed gas, gas flow rate ratio is H 2 / SiH 4 = 150, B 2
H 6 / SiH 4 = 0.01, gas pressure 20 Pa, substrate temperature 150 ° C., RF power 100 W (13.56 MH
z). This condition is one example, and the condition is not limited to the above condition, and the film can be formed under the condition of a general plasma CVD method, but the gas flow rate ratio is H 2 / SiH 4 ≧ 100, B 2
H 6 / SiH 4 <0.02 is suitable, and the substrate temperature is 10
The optimum temperature is 0 to 200 ° C.

【0017】次に、プラズマCVD法により、窒化シリ
コン膜からなる透明絶縁膜層17を膜厚200nmでP
+型微結晶シリコン層16上に形成する。上記プラズマ
CVD法による透明絶縁膜層17の形成条件として、例
えば、ガス種は、SiH4とNH3とN2の混合ガス、ガ
ス流量比はNH3/SiH4=1.5,N2/SiH4
5、ガス圧力は100Pa、基板温度は150℃、RF
パワーは100W(13.56MHz)である。この条
件は、一実施例であり、上記条件に限定されず、一般的
なプラズマCVD法の条件であればよいが、基板温度は
50〜200℃が最適であり、この50℃とは、基板加
熱を行わないという意味である。同様にして、上記透明
絶縁膜層17をプラズマCVD法による酸化シリコン膜
で形成することができる。その形成条件は、一般的なプ
ラズマCVD法の条件であればよいが、この時のガス種
は、例えばSiH4とO2の混合ガスとなり、基板温度は
50〜200℃が適当である。このようにして形成され
た窒化シリコン膜または酸化シリコン膜からなる透明絶
縁膜層17の屈折率はP+型微結晶シリコン層16の屈
折率より低い。この屈折率の違いにより多重反射等によ
り裏面反射効果を高めることができる。なお、上記P+
型微結晶シリコン層16と透明絶縁膜層17とは、どち
らもプラズマCVD法で形成することができるので、そ
れらは別々のプラズマCVD装置で形成することも、単
室のプラズマCVD装置で連続的に形成することもでき
るが、複数の反応室を有するプラズマCVD装置でそれ
ぞれ専用の反応室で連続に形成してもよい。
Next, a transparent insulating film layer 17 made of a silicon nitride film is formed to a P thickness of 200 nm by plasma CVD.
It is formed on the + type microcrystalline silicon layer 16. As conditions for forming the transparent insulating film layer 17 by the plasma CVD method, for example, the gas species is a mixed gas of SiH 4 , NH 3 and N 2 , and the gas flow rate ratio is NH 3 / SiH 4 = 1.5, N 2 / SiH 4 =
5, gas pressure 100Pa, substrate temperature 150 ° C, RF
The power is 100 W (13.56 MHz). This condition is an example, and is not limited to the above condition and may be a condition of a general plasma CVD method, but the substrate temperature is optimally 50 to 200 ° C., and this 50 ° C. means the substrate. This means that no heating is performed. Similarly, the transparent insulating film layer 17 can be formed of a silicon oxide film by a plasma CVD method. The formation conditions therefor may be those of a general plasma CVD method, but the gas species at this time is, for example, a mixed gas of SiH 4 and O 2 , and a substrate temperature of 50 to 200 ° C. is suitable. The transparent insulating film layer 17 made of the silicon nitride film or the silicon oxide film thus formed has a lower refractive index than the P + -type microcrystalline silicon layer 16. Due to this difference in refractive index, the back surface reflection effect can be enhanced by multiple reflection or the like. The above P +
Since the type microcrystalline silicon layer 16 and the transparent insulating film layer 17 can both be formed by the plasma CVD method, they can be formed by separate plasma CVD apparatuses or continuously by a single chamber plasma CVD apparatus. Alternatively, a plasma CVD apparatus having a plurality of reaction chambers may be continuously formed in each dedicated reaction chamber.

【0018】次に、フォトエッチング法を用いて、透明
絶縁膜層17のパターニングを行い、微結晶シリコン層
と金属電極との接触部分を設けてから、真空蒸着法でア
ルミニウム(Al)や銀(Ag)などの金属をP型シリ
コン基板11の裏面全面に蒸着(蒸着温度は室温〜10
0℃)し、裏面電極18を形成する。続いて、フォトエ
ッチング法を用いて光入射側のシリコン酸化膜層13及
び反射防止膜層14を加工して、チタン(Ti)、パラ
ジウム(Pd)、銀(Ag)の順に金属を蒸着(蒸着温
度は室温〜100℃)により堆積して、リフトオフ法に
より、グリッド電極15を形成する。
Next, the transparent insulating film layer 17 is patterned by using a photoetching method to provide a contact portion between the microcrystalline silicon layer and the metal electrode, and then aluminum (Al) or silver ( A metal such as Ag) is vapor-deposited on the entire back surface of the P-type silicon substrate 11 (the vapor deposition temperature is room temperature to 10
Then, the back electrode 18 is formed. Subsequently, the silicon oxide film layer 13 and the antireflection film layer 14 on the light incident side are processed by using a photoetching method, and a metal is vapor-deposited in order of titanium (Ti), palladium (Pd), and silver (Ag). The temperature is room temperature to 100 ° C.) and the grid electrode 15 is formed by the lift-off method.

【0019】最後に、250℃、10分の熱処理を行
い、太陽電池は完成する。この熱処理の温度範囲は20
0〜300℃が最適であり、時間は30分以下、熱処理
雰囲気は、窒素(N2)ガス、水素(H2)ガス、アルゴ
ン(Ar)ガス、空気が適当である。なお、この熱処理
は電極とP+型微結晶シリコン層16あるいはN型層1
2との接触をよくするばかりでなく、P+型微結晶シリ
コン層16の構造緩和と不純物の活性化を行っている。
Finally, heat treatment is carried out at 250 ° C. for 10 minutes to complete the solar cell. The temperature range of this heat treatment is 20
The optimum temperature is 0 to 300 ° C., the time is 30 minutes or less, and the heat treatment atmosphere is preferably nitrogen (N 2 ) gas, hydrogen (H 2 ) gas, argon (Ar) gas, or air. Note that this heat treatment is applied to the electrode and the P + type microcrystalline silicon layer 16 or the N type layer 1.
Not only is the contact with 2 improved, but the structural relaxation of the P + -type microcrystalline silicon layer 16 and the activation of impurities are performed.

【0020】図3に、上記製造方法により作製した太陽
電池の分光感度(実線)を、裏面電界層をアルミペース
トの印刷焼成(740℃)で形成した従来の太陽電池の
分光感度(破線)と一緒に示す。本発明の太陽電池は9
50nm以上の長波長の光が有効に光電変換されている
ことがわかる。AM1.5のスペクトルで100mW/
cm2の光のもとでの太陽電池の特性としては、短絡電
流が39.4mA/cm2から40.5mA/cm2に、
開放電圧が640mVから654mVに向上した。
FIG. 3 shows the spectral sensitivity (solid line) of the solar cell manufactured by the above manufacturing method and the spectral sensitivity (dashed line) of the conventional solar cell in which the back surface electric field layer was formed by printing and baking aluminum paste (740 ° C.). Show together. The solar cell of the present invention is 9
It can be seen that light having a long wavelength of 50 nm or more is effectively photoelectrically converted. 100mW / in AM1.5 spectrum
As the characteristics of the solar cell under the light of cm 2 , the short-circuit current is changed from 39.4 mA / cm 2 to 40.5 mA / cm 2 ,
The open circuit voltage was improved from 640 mV to 654 mV.

【0021】なお上記実施例において、P+型微結晶シ
リコン層形成の基板温度範囲(100〜200℃)、及
び、透明絶縁膜層形成の基板温度範囲(50〜200
℃)、及び、電極形成後の熱処理の温度範囲(200〜
300℃)が、太陽電池の光電変換効率を改善する主要
因であり、これらの温度範囲以外では、本発明の充分な
効果は得られなかった。
In the above embodiment, the substrate temperature range for forming the P + -type microcrystalline silicon layer (100 to 200 ° C.) and the substrate temperature range for forming the transparent insulating film layer (50 to 200).
Temperature range of the heat treatment after the electrode formation (200 ~
(300 ° C.) is the main factor for improving the photoelectric conversion efficiency of the solar cell, and the sufficient effect of the present invention was not obtained outside of these temperature ranges.

【0022】図4に、本発明の他の実施例に係る太陽電
池の断面構造を示す。ここで、41はP型シリコン基
板、42は光入射側に形成されたN型層、43はシリコ
ン酸化膜層、44は反射防止膜層、45はグリッド電
極、46はP+型微結晶シリコン層、47は透明絶縁膜
層、48はP+型微結晶シリコン層と接続された裏面電
極、49はP型シリコン基板の裏面の表面の欠陥を不活
性化するためのパッシベーション層(熱酸化膜層)を示
している。本構造の特徴は、図1に示した構造と異な
り、P型シリコン基板41の裏面全面でなく、その一部
にP+型微結晶シリコン層46を形成し、絶縁膜47は
+型微結晶シリコン層46及びパッシベーション層4
9を覆い、裏面電極48はP+型微結晶シリコン層46
と接触している。
FIG. 4 shows a sectional structure of a solar cell according to another embodiment of the present invention. Here, 41 is a P-type silicon substrate, 42 is an N-type layer formed on the light incident side, 43 is a silicon oxide film layer, 44 is an antireflection film layer, 45 is a grid electrode, and 46 is P + -type microcrystalline silicon. Layer, 47 is a transparent insulating film layer, 48 is a back electrode connected to the P + -type microcrystalline silicon layer, and 49 is a passivation layer (thermal oxide film) for inactivating defects on the back surface of the P-type silicon substrate. Layers). Feature of this structure, unlike the structure shown in FIG. 1, rather than the entire back surface of the P-type silicon substrate 41, a P + -type microcrystalline silicon layer 46 is formed on a part of the insulating film 47 is P + -type microcrystalline Crystal silicon layer 46 and passivation layer 4
9 and the back electrode 48 is a P + -type microcrystalline silicon layer 46.
Is in contact with.

【0023】次に、上記太陽電池の製造方法について説
明する。P型シリコン基板41上に、図2に基づき説明
した製造方法により、N型層42、シリコン酸化膜層4
3、反射防止膜層44を形成する。次に、熱酸化(80
0℃〜1000℃)によりパッシベーション層49を形
成した後、パッシベーション層49の一部を除去してか
ら、裏面側に、図2に基づき説明した製造方法によりP
+型微結晶シリコンを堆積して、フォトエッチング技術
または全面エッチバックによりP+型微結晶シリコン層
46を形成する。続いて、図2に基づき説明した製造方
法により、透明絶縁膜層47、裏面電極48、グリッド
電極45を形成してから250℃,10分の熱処理を行
い、太陽電池は完成する。本方法により製造された太陽
電池でも図3に示した結果と同様に、長波長光に対する
感度が向上し、光電変換効率が向上した。
Next, a method for manufacturing the above solar cell will be described. The N-type layer 42 and the silicon oxide film layer 4 are formed on the P-type silicon substrate 41 by the manufacturing method described with reference to FIG.
3. An antireflection film layer 44 is formed. Next, thermal oxidation (80
After forming the passivation layer 49 at 0 ° C. to 1000 ° C.), a part of the passivation layer 49 is removed, and then P is formed on the back surface side by the manufacturing method described with reference to FIG.
A + type microcrystalline silicon layer is deposited, and a P + type microcrystalline silicon layer 46 is formed by a photo etching technique or an entire surface etchback. Subsequently, the transparent insulating film layer 47, the back electrode 48, and the grid electrode 45 are formed by the manufacturing method described with reference to FIG. 2 and then heat treatment is performed at 250 ° C. for 10 minutes to complete the solar cell. Also in the solar cell manufactured by this method, the sensitivity to long-wavelength light was improved and the photoelectric conversion efficiency was improved, as in the result shown in FIG.

【0024】以上の実施例では、P型シリコン基板を用
いた場合について説明したが、N型シリコン基板を用い
た場合にも適用できる。その場合、N型シリコン基板の
光入射側の不純物はP型であり、裏面電界層である微結
晶シリコン層はN型の不純物を高濃度に添加されたもの
が用いられる。
In the above embodiments, the case of using the P-type silicon substrate has been described, but the present invention can be applied to the case of using the N-type silicon substrate. In this case, the impurity on the light incident side of the N-type silicon substrate is P-type, and the microcrystalline silicon layer which is the back surface electric field layer is one to which N-type impurities are added at a high concentration.

【0025】[0025]

【発明の効果】以上、詳細に説明したように、本発明に
よれば、太陽電池の裏面電界効果と裏面反射効果をより
向上させることができ、特に、長波長光に高感度で、短
絡電流及び開放電圧を向上させることができるので、そ
の結果、光電変換効率を高めることができる。
As described above in detail, according to the present invention, it is possible to further improve the back surface field effect and the back surface reflection effect of the solar cell, and in particular, it is highly sensitive to long wavelength light and has a short circuit current. Also, the open circuit voltage can be improved, and as a result, the photoelectric conversion efficiency can be increased.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例に係る太陽電池の断面構造を
示す図である。
FIG. 1 is a diagram showing a cross-sectional structure of a solar cell according to an embodiment of the present invention.

【図2】本発明の一実施例に係る太陽電池の製造フロー
図である。
FIG. 2 is a manufacturing flow diagram of a solar cell according to an embodiment of the present invention.

【図3】本発明の一実施例に係る太陽電池の分光感度と
従来の技術による太陽電池の分光感度を示す図である。
FIG. 3 is a diagram showing a spectral sensitivity of a solar cell according to an embodiment of the present invention and a spectral sensitivity of a solar cell according to a conventional technique.

【図4】本発明の他の実施例に係る太陽電池の断面構造
を示す図である。
FIG. 4 is a view showing a sectional structure of a solar cell according to another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11,41 P型シリコン基板 12,42 N型層 13,43 シリコン酸化膜層 14,44 反射防止膜層 15,45 グリッド電極 16,46 P+型微結晶シリコン層 17,47 透明絶縁膜層 18,48 裏面電極 49 パッシベーション層11,41 P-type silicon substrate 12,42 N-type layer 13,43 Silicon oxide film layer 14,44 Antireflection film layer 15,45 Grid electrode 16,46 P + type microcrystalline silicon layer 17,47 Transparent insulating film layer 18 , 48 Backside electrode 49 Passivation layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 山嵜 一郎 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Ichiro Yamazaki 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 第1導電型の半導体基板と、該半導体基
板の光入射側に形成された第2導電型の半導体層と、上
記半導体基板の上記光入射側と反対側の裏面上に形成さ
れた第1導電型でかつ上記半導体基板より高濃度の裏面
電界層と、該裏面電界層上に形成された裏面電極とを有
する太陽電池において、 上記裏面電界層と上記裏面電極との間に絶縁膜層を設け
ることを特徴とする太陽電池。
1. A semiconductor substrate of a first conductivity type, a semiconductor layer of a second conductivity type formed on the light incident side of the semiconductor substrate, and a back surface of the semiconductor substrate opposite to the light incident side. A back surface electric field layer of the first conductivity type having a higher concentration than that of the semiconductor substrate, and a back surface electrode formed on the back surface electric field layer. A solar cell comprising an insulating film layer.
【請求項2】 請求項1に記載の太陽電池において、 上記絶縁膜層が窒化シリコン膜または酸化シリコン膜で
あることを特徴とする太陽電池。
2. The solar cell according to claim 1, wherein the insulating film layer is a silicon nitride film or a silicon oxide film.
【請求項3】 請求項1に記載の太陽電池の製造方法に
おいて、 プラズマCVD法により100〜200℃の基板温度で
上記裏面電界層を形成する工程と、 プラズマCVD法により50〜200℃の基板温度で上
記絶縁膜層を形成する工程と、 上記裏面電界層及び上記絶縁膜層の形成後に200℃〜
300℃の熱処理を行う工程とを含むことを特徴とす
る、太陽電池の製造方法。
3. The method of manufacturing a solar cell according to claim 1, wherein the back surface electric field layer is formed at a substrate temperature of 100 to 200 ° C. by a plasma CVD method, and the substrate at 50 to 200 ° C. is formed by a plasma CVD method. A step of forming the insulating film layer at a temperature, and 200 ° C. after forming the back surface field layer and the insulating film layer.
And a step of performing heat treatment at 300 ° C.
JP5093981A 1993-04-21 1993-04-21 Solar cell and method of manufacturing the same Expired - Lifetime JP2931498B2 (en)

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