JPH06303000A - Printed wiring board and mounted component inspecting method using it - Google Patents
Printed wiring board and mounted component inspecting method using itInfo
- Publication number
- JPH06303000A JPH06303000A JP5083700A JP8370093A JPH06303000A JP H06303000 A JPH06303000 A JP H06303000A JP 5083700 A JP5083700 A JP 5083700A JP 8370093 A JP8370093 A JP 8370093A JP H06303000 A JPH06303000 A JP H06303000A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- electrode
- mounting
- electronic device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Supply And Installment Of Electrical Components (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明はフェイスダウンボンディ
ングタイプのICチップ等各種電子デバイスを実装部品
として実装する印刷配線板の構成とそれを用いたこれら
各種実装部品の検査方法に係り、特に実装部品の検査を
容易ならしめて生産性向上を図った印刷配線板とそれを
用いた実装部品の検査方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a printed wiring board for mounting various electronic devices such as face-down bonding type IC chips as mounting components and a method of inspecting these various mounting components using the same, and particularly to mounting components. The present invention relates to a printed wiring board which facilitates the inspection of the printed circuit board to improve productivity and a mounting component inspection method using the same.
【0002】[0002]
【従来の技術】図5は従来の印刷配線板構成例を実装部
品検査方法と共に説明する図であり、(5-1) は実装前を
示しまた(5-2) は実装後の検査方法を示している。2. Description of the Related Art FIG. 5 is a diagram for explaining a conventional printed wiring board configuration example together with a mounting component inspection method. (5-1) shows before mounting and (5-2) shows a mounting method after mounting. Shows.
【0003】なお図では実装部品としての電子デバイス
がICチップである場合を例としている。印刷配線板の
本発明に係わる主要部のみを抽出して拡大した図5の(5
-1) で、実装対象としてのフェイスダウンボンディング
タイプのICチップ1片面(図では下面)の周辺近傍に
は、該チップ1の図示されない回路パターンに繋がる複
数のバンプ電極1aが整列した状態で形成されている。In the figure, the case where the electronic device as a mounting component is an IC chip is taken as an example. Only the main part of the printed wiring board according to the present invention is extracted and enlarged ((5
-1), a plurality of bump electrodes 1a connected to a circuit pattern (not shown) of the chip 1 are formed in the vicinity of the periphery of one surface (lower surface in the figure) of the face-down bonding type IC chip 1 to be mounted. Has been done.
【0004】一方該ICチップ1を実装する印刷配線板
2の片面(図では上面)には、複数の上記バンプ電極1a
と対応する各位置に図示されない回路に繋がる配線導体
21aへの接続電極21がパターン形成されている。On the other hand, on one surface (upper surface in the figure) of the printed wiring board 2 on which the IC chip 1 is mounted, a plurality of the bump electrodes 1a are provided.
Wiring conductors connected to circuits (not shown) at positions corresponding to
The connection electrode 21 to 21a is patterned.
【0005】そして各配線導体21a の一点鎖線Aで示す
ICチップ搭載域外側には、後述する検査用プローブを
当接せしめる拡幅された検査ターミナル21b が形成され
ている。On the outside of the IC chip mounting area shown by the chain line A of each wiring conductor 21a, a widened inspection terminal 21b for contacting an inspection probe described later is formed.
【0006】そこで、上記各接続電極21に例えば半田ペ
ーストが塗布されている該印刷配線板2上に矢印Bの如
く実装部品としてのICチップ1を位置決め搭載した
後、例えば通常のリフロー技術等で両者を半田接続する
ことで該ICチップ1を印刷配線板2に実装することが
できる。Therefore, after the IC chip 1 as a mounting component is positioned and mounted as shown by an arrow B on the printed wiring board 2 on which each of the connection electrodes 21 is coated with solder paste, for example, by a normal reflow technique or the like. The IC chip 1 can be mounted on the printed wiring board 2 by soldering the two.
【0007】この実装されたICチップ1の検査方法の
一例を示した(5-2) で、31a,32b は図示されない検査装
置に繋がる2個のプローブピンを表わしている。そこ
で、例えば片側のプローブピン31a を該ICチップ1の
入力側バンプ電極と接続した接続電極に繋がる配線導体
の検査ターミナル 21b-1に当接せしめたまま、他方のプ
ローブピン31b を該ICチップの出力側バンプ電極と接
続した接続電極の検査ターミナル 21b-2に接触させるこ
とでICチップ1としての出力特性を検査することがで
きる。An example of the method of inspecting the mounted IC chip 1 is shown in (5-2), and 31a and 32b represent two probe pins connected to an inspecting device (not shown). Therefore, for example, while keeping the probe pin 31a on one side in contact with the inspection terminal 21b- 1 of the wiring conductor connected to the connection electrode connected to the bump electrode on the input side of the IC chip 1, the other probe pin 31b is connected to the IC chip 1 of the IC chip 1. The output characteristics of the IC chip 1 can be inspected by bringing the connection electrode connected to the output bump electrode into contact with the inspection terminal 21b -2 .
【0008】また、片側の上記プローブピン31a を固定
させたまま他方のプローブピン31bを移動させて他の出
力側バンプ電極に繋がる検査ターミナル 21b-3,21b-3,2
1b-4〜等に順次接触させることで、該ICチップ1の上
記入力側バンプ電極に係わる全ての出力特性を効率よく
検査することができる。Further, while the probe pin 31a on one side is fixed, the probe pin 31b on the other side is moved to connect to another output-side bump electrode, the inspection terminals 21b- 3 , 21b- 3 , 2
All output characteristics related to the input side bump electrodes of the IC chip 1 can be efficiently inspected by sequentially making contact with 1b- 4 and so on.
【0009】なお、該印刷配線板2の各検査ターミナル
と対応するそれぞれの位置にプローブピンを持つ複数の
プローブピンからなる測定ヘッドを位置決めして降下さ
せ各プローブピンと該印刷配線板2上の各検査ターミナ
ル21b と接触させることでも、該ICチップ1としての
諸特性を検査することができる。A measuring head composed of a plurality of probe pins having probe pins at respective positions corresponding to the respective inspection terminals of the printed wiring board 2 is positioned and lowered, and each probe pin and each of the printed wiring board 2 are placed. The characteristics of the IC chip 1 can also be inspected by bringing it into contact with the inspection terminal 21b.
【0010】[0010]
【発明が解決しようとする課題】しかしかかる印刷配線
板2とそれによるICチップの検査方法では、入手する
測定値に上述したバンプ電極と接続電極間の接続抵抗が
含まれる。However, in the printed wiring board 2 and the IC chip inspection method using the printed wiring board 2 as described above, the measured value obtained includes the above-mentioned connection resistance between the bump electrode and the connection electrode.
【0011】このことは、例えば測定された特性値に不
良やバラツキ等が発見されたときにそれがICチップと
しての不良に起因するものか上述したバンプ電極と接続
電極間の半田接続不良換言すれば実装不良に起因するも
のかが特定し難いことを意味する。This is because, for example, when a defect or variation is found in the measured characteristic value, it is caused by a defect as an IC chip. In other words, the above-mentioned defective solder connection between the bump electrode and the connection electrode is expressed. For example, it means that it is difficult to identify if it is due to mounting failure.
【0012】一方バンプ電極と接続電極間の半田接続が
不完全であると、初期ではICチップとして測定値的に
良品でも時間経過と共に不良となる場合がある。そして
この場合、実装時の上記半田接続域における接続抵抗値
は一般的には完全に接続されたときの接続抵抗値より大
きくなる傾向にあるが、該接続抵抗値の変化は上述した
印刷配線板2とそれによるICチップの検査方法では検
出することができない。On the other hand, if the solder connection between the bump electrode and the connection electrode is incomplete, even an IC chip having a good measured value may become defective with time in the initial stage. In this case, the connection resistance value in the solder connection area at the time of mounting generally tends to be larger than the connection resistance value when completely connected, but the change in the connection resistance value is the above-mentioned printed wiring board. No. 2 and the IC chip inspection method using the same cannot detect.
【0013】従って、検査時に発見された不良の解析や
不良対策が遅れたり無駄な工数を費やすことが多くなっ
て結果的に生産性の向上を期待することができないと言
う問題があった。Therefore, there has been a problem that analysis of a defect found at the time of inspection and a countermeasure against the defect are often delayed or wasteful man-hours are often spent, so that improvement in productivity cannot be expected as a result.
【0014】[0014]
【課題を解決するための手段】上記課題は、フェイスダ
ウンボンディングタイプの電子デバイスを実装する印刷
配線板であって、実装する前記電子デバイスの各バンプ
電極と対応するそれぞれの位置に該各バンプ電極とほぼ
同じ大きさに形成されている接続電極が、配線導体で印
刷配線板上の回路に繋がり且つ上記電子デバイス搭載域
外側の該配線導体途中に拡幅された検査ターミナルを具
えて形成されている回路接続電極と、該回路接続電極に
対して絶縁を保って独立し且つ電子デバイス搭載域外側
の上記配線導体間余白域に拡幅された検査ターミナルを
具えて形成された配線導体に繋がる1個または複数個の
実装良否判別用電極とに分割されて構成されている印刷
配線板によって解決される。The above problem is a printed wiring board for mounting a face-down bonding type electronic device, and the bump electrodes are provided at respective positions corresponding to the bump electrodes of the electronic device to be mounted. And a connection electrode formed to have a size substantially the same as that of the present invention, which is connected to a circuit on the printed wiring board by a wiring conductor and has a widened inspection terminal in the middle of the wiring conductor outside the electronic device mounting area. One connected to a wiring conductor formed by including a circuit connection electrode and an inspection terminal which is independent from the circuit connection electrode while maintaining insulation, and which is widened in the space area between the wiring conductors outside the electronic device mounting area, or This is solved by a printed wiring board that is divided into a plurality of mounting pass / fail determination electrodes.
【0015】また、印刷配線板に実装されたフェイスダ
ウンボンディングタイプの電子デバイスの検査方法であ
って、上記記載の印刷配線板の対応する位置に被検電子
デバイスを位置決め搭載し半田接続して実装した後、実
装された該電子デバイスの入力側バンプ電極と接続する
印刷配線板上の回路接続電極に繋がる検査ターミナルと
該電子デバイスの出力側バンプ電極と接続する印刷配線
板上の回路接続電極に繋がる検査ターミナル間で該電子
デバイスの特性を検査し、得られた特性値が所定値を超
えたときまたは不安定であるときには、該電子デバイス
の入力側または出力側もしくはその双方の各バンプ電極
と接続する印刷配線板上の回路接続電極に繋がる検査タ
ーミナルと該回路接続電極に対応する実装良否判別用電
極に繋がる検査ターミナル間の電気的測定で、該電子デ
バイスの印刷配線板に対する実装の良否を検査する実装
部品の検査方法によって解決される。A method of inspecting a face-down bonding type electronic device mounted on a printed wiring board, wherein the electronic device to be tested is positioned and mounted at a corresponding position on the printed wiring board by soldering and mounting. Then, the inspection terminal connected to the circuit connection electrode on the printed wiring board connected to the input side bump electrode of the mounted electronic device and the circuit connection electrode on the printed wiring board connected to the output side bump electrode of the electronic device When the characteristic value of the electronic device is inspected between the connected inspection terminals and the obtained characteristic value exceeds a predetermined value or is unstable, the bump electrodes on the input side and / or the output side of the electronic device and An inspection terminal connected to the circuit connection electrode on the printed wiring board to be connected and an inspection terminal connected to the mounting pass / fail judgment electrode corresponding to the circuit connection electrode. In electrical measurements between Terminal, it is solved by the inspection method of mounting components to inspect the quality of implementation for printed wiring board of the electronic device.
【0016】[0016]
【作用】ICチップのバンプ電極と印刷配線板の接続電
極間の接続良否がICチップの特性と別に検出できれ
ば、ICチップとしての良否と実装の良否とを区別して
検査することができる。If the quality of the connection between the bump electrode of the IC chip and the connection electrode of the printed wiring board can be detected separately from the characteristics of the IC chip, the quality of the IC chip and the quality of the mounting can be distinguished and tested.
【0017】そこで本発明では、印刷配線板の従来の接
続電極領域を回路に繋がる回路接続電極と実装良否判別
用電極とに分割して構成するようにしている。このこと
は実装されるICチップの各バンプ電極が回路接続電極
と実装良否判別用電極とに跨がった状態で位置するの
で、例えばICチップのバンプ電極と印刷配線板の回路
接続電極とが完全に接続されると該バンプ電極と実装良
否判別用電極間も完全に接続されることを示している。Therefore, in the present invention, the conventional connection electrode area of the printed wiring board is divided into a circuit connection electrode connected to a circuit and a mounting pass / fail judgment electrode. This means that each bump electrode of the IC chip to be mounted is located in a state of straddling the circuit connecting electrode and the mounting / non-defining electrode, so that, for example, the bump electrode of the IC chip and the circuit connecting electrode of the printed wiring board are It is shown that when completely connected, the bump electrode and the electrode for determining the mounting quality are also completely connected.
【0018】従って回路接続電極と実装良否判別用電極
間がICチップのバンプ電極を介して接続されることに
なり、結果的に上記バンプ電極と各接続電極との接続
(換言すればICチップの実装)が完全であるとこれら
の接続抵抗を含めた回路接続電極と実装良否判別用電極
間の電気抵抗をほぼ“0”に近い mΩオーダにすること
ができる。Therefore, the circuit connection electrode and the mounting / non-defining electrode are connected via the bump electrode of the IC chip, and as a result, the connection between the bump electrode and each connection electrode (in other words, of the IC chip). If the mounting is complete, the electrical resistance between the circuit connecting electrodes and the mounting pass / fail judgment electrodes including these connection resistances can be made to be on the order of mΩ close to “0”.
【0019】一方上記実装が不完全であると、ICチッ
プのバンプ電極と回路接続電極間,または該バンプ電極
と実装良否判別用電極間の接続が不安定になるため、結
果的に回路接続電極と実装良否判別用電極間の電気抵抗
が例えばΩオーダ程度まで大きくなったりばらつくこと
となる。On the other hand, if the above-mentioned mounting is incomplete, the connection between the bump electrode of the IC chip and the circuit connecting electrode or between the bump electrode and the mounting pass / fail judgment electrode becomes unstable, resulting in the circuit connecting electrode. And the electrical resistance between the mounting / non-defining electrodes becomes large or fluctuates, for example, to the order of Ω.
【0020】従って、上記バンプ電極〜回路接続電極間
の電気抵抗値と回路接続電極〜実装良否判別用電極間の
電気抵抗値とをチェックし比較することで、ICチップ
としての特性と印刷配線板への実装良否とを容易に検査
することができる。Therefore, by checking and comparing the electric resistance value between the bump electrode and the circuit connecting electrode and the electric resistance value between the circuit connecting electrode and the mounting / non-defining electrode, the characteristics as an IC chip and the printed wiring board can be obtained. It is possible to easily inspect whether or not the mounting is good.
【0021】[0021]
【実施例】図1は本発明になる印刷配線板の構成例を説
明する図であり、図2は実装部品の検査方法を説明する
図、図3は印刷配線板の他の構成例を示す図、図4は印
刷配線板の第3の構成例を示す図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram for explaining a configuration example of a printed wiring board according to the present invention, FIG. 2 is a diagram for explaining a mounting component inspection method, and FIG. 3 is another configuration example of a printed wiring board. 4 and 5 are diagrams showing a third configuration example of the printed wiring board.
【0022】なお図ではいずれも実装部品としての電子
デバイスが図5のICチップである場合を例としている
ので、図5と同じ対象部材・部位には同一の記号を付し
て表わすと共に重複する説明についてはそれを省略す
る。In each of the figures, the case where the electronic device as the mounting component is the IC chip of FIG. 5 is taken as an example, and therefore the same target members and parts as those in FIG. The explanation is omitted.
【0023】印刷配線板の本発明に係わる主要部のみを
抽出して図5同様に拡大した図1で、ICチップ1を実
装する印刷配線板4の片面(図では上面)で該ICチッ
プ1の複数のバンプ電極1aと対応する各位置には、外形
が図5の接続電極21と同じ大きさで凹字形をなす回路接
続電極41とそれに対して絶縁を保った状態で先端が該凹
字形の凹部に入り込むような形状の実装良否判別用電極
42とが抽出円内図(a)に示す如く共にパターン形成され
ているが、該回路接続電極41に繋がる導体配線41a の一
点鎖線Aで示すICチップ搭載域を超える外側には図5
の検査ターミナル21b と等しい検査ターミナル41b が図
5同様に設けられ、またICチップ搭載域外側で該導体
配線41a 間の余白域には上記実装良否判別用電極42の配
線導体42a に繋がる検査ターミナル42b がパターン形成
されている。In FIG. 1 in which only the main part of the printed wiring board according to the present invention is extracted and enlarged in the same manner as in FIG. 5, the IC chip 1 is mounted on one side (upper surface in the figure) of the printed wiring board 4 on which the IC chip 1 is mounted. At each position corresponding to the plurality of bump electrodes 1a, the circuit connecting electrode 41 whose outer shape is the same size as the connecting electrode 21 of FIG. Mounting pass / fail judgment electrode shaped to fit into the recess
Although 42 and 42 are patterned together as shown in the drawing (a) of the extraction circle, the conductor wiring 41a connected to the circuit connecting electrode 41 is shown in FIG.
An inspection terminal 41b which is the same as the inspection terminal 21b of FIG. 5 is provided in the same manner as in FIG. Are patterned.
【0024】この場合図5で説明したICチップ1の各
バンプ電極1aは、上記円内図(a) の斜線域Cで示す如く
上記回路接続電極41とそれに対応する実装良否判別用電
極42とを共にカバーするように該印刷配線板4に対応さ
せることができる。In this case, each bump electrode 1a of the IC chip 1 described with reference to FIG. 5 includes the circuit connection electrode 41 and the mounting pass / fail judgment electrode 42 corresponding to the circuit connection electrode 41 as shown by the shaded area C in the circled figure (a). Can be made to correspond to the printed wiring board 4.
【0025】そこで、各回路接続電極41と実装良否判別
用電極42とに例えば半田ペーストを塗布した後、図5同
様にICチップ1を位置決め搭載し更に通常のリフロー
技術等で両者を半田接続することで図5と同様にICチ
ップ1を該印刷配線板4に実装することができる。Therefore, for example, after solder paste is applied to each circuit connection electrode 41 and the mounting / non-defective electrode 42, the IC chip 1 is positioned and mounted as in FIG. 5, and the two are solder-connected by a normal reflow technique or the like. As a result, the IC chip 1 can be mounted on the printed wiring board 4 as in the case of FIG.
【0026】以下図2によって該ICチップ1の検査方
法を説明する。図2で(2-1) はICチップの実装状態を
示したものであり、(2-2) は接続電極近傍を抽出して拡
大した図である。A method of inspecting the IC chip 1 will be described below with reference to FIG. In FIG. 2, (2-1) shows the mounting state of the IC chip, and (2-2) is an enlarged view of the vicinity of the connection electrode.
【0027】図の(2-1) で、印刷配線板4の図示されな
い回路接続電極41の配線導体41a と実装良否判別用電極
42の配線導体42a とはICチップ1の図示されないバン
プ電極1aを介して接続されていると共に、該各配線導体
41a,42a に繋がる検査ターミナル41b,42b は共にICチ
ップ搭載域の外部に露出して位置している。In (2-1) of the figure, the wiring conductor 41a of the circuit connection electrode 41 (not shown) of the printed wiring board 4 and the mounting pass / fail judgment electrode
The wiring conductors 42a of 42 are connected to each other via bump electrodes 1a (not shown) of the IC chip 1 and
The inspection terminals 41b and 42b connected to 41a and 42a are both exposed and located outside the IC chip mounting area.
【0028】従って例えば図5で説明したように、片側
のプローブピン31a をICチップ1の入力側バンプ電極
と接続する印刷配線板4の回路接続電極41ト繋がる検査
ターミナル 41b-1に当接せしめたまま他方のプローブピ
ン31b を該ICチップの出力側バンプ電極と接続する印
刷配線板4の回路接続電極41に繋がる検査ターミナル41
b-2に接触させることでICチップ1の特性を検査する
ことができる。Therefore, as described with reference to FIG. 5, for example, the probe pin 31a on one side is brought into contact with the inspection terminal 41b- 1 connected to the circuit connecting electrode 41 of the printed wiring board 4 for connecting to the bump electrode on the input side of the IC chip 1. An inspection terminal 41 connected to the circuit connection electrode 41 of the printed wiring board 4 for connecting the other probe pin 31b to the bump electrode on the output side of the IC chip as it is.
The characteristics of the IC chip 1 can be inspected by bringing it into contact with b -2 .
【0029】この場合検知された測定値に不良や不安定
性が生じたときには、例えば他のプローブピン31c を上
記検査ターミナル 41b-2と対応する実装良否判別用電極
42の検査ターミナル 42b-2に当接せしめて検査ターミナ
ル 41b-2〜 42b-2間の電気抵抗をチェックし、または該
他のプローブピン31c を上記検査ターミナル 41b-1と対
応する実装良否判別用電極42の検査ターミナル 42b-1に
当接せしめて検査ターミナル 41b-1〜 42b-1間の電気抵
抗をチェックする等、対応する検査ターミナル間をチェ
ックすることで、上記の不良や不安定性がICチップ自
体に起因するものか実装時の接続に起因するものかを判
別することができる。In this case, when a defect or instability occurs in the detected measurement value, for example, another probe pin 31c is attached to the inspection terminal 41b -2 and the mounting pass / fail judgment electrode corresponding to the inspection terminal 41b- 2.
42 examined brought into contact with the terminal 42b -2 inspection checks the electrical resistance between the terminals 41b -2 ~ 42b -2 or said other probe pin 31c for the determination mounting quality corresponding to the test terminals 41b -1, By checking the electric resistance between the inspection terminals 41b -1 to 42b -1 by contacting the inspection terminal 42b -1 of the electrode 42 with each other and checking the corresponding inspection terminals, the above-mentioned defects and instability are detected. It is possible to determine whether the cause is the chip itself or the connection at the time of mounting.
【0030】そしてこの場合の回路接続電極41〜実装良
否判別用電極42間の電気抵抗Rsは接続電極近傍の抽出
拡大図(2-2) で、対応する検査ターミナル間(例えば 4
1b-2〜 42b-2等)の電気抵抗値を測定することから容易
に求めることができる。The electrical resistance Rs between the circuit connecting electrode 41 and the mounting / non-defining electrode 42 in this case is shown in an enlarged view (2-2) of the vicinity of the connecting electrode, between corresponding inspection terminals (for example, 4
1b -2 to 42b -2 ) can be easily obtained by measuring the electric resistance value.
【0031】なお、該印刷配線板4の各検査ターミナル
と対応するそれぞれの位置にプローブピンを持つ複数の
プローブピンからなる測定ヘッドを位置決めして降下さ
せても判別し得ることは図5の場合と同様である。In the case of FIG. 5, it is possible to determine by positioning and lowering the measuring head composed of a plurality of probe pins having probe pins at respective positions corresponding to the respective inspection terminals of the printed wiring board 4. Is the same as.
【0032】しかし上述した電気抵抗Rsの測定方法で
は、印刷配線板の配線導体抵抗やプローブピンの電気抵
抗等を含むことと、通常の接触抵抗が数mΩ〜数10mΩ
であるのに対して配線導体抵抗が数10Ω〜数100 Ωであ
るため測定値の殆ど全てが配線導体抵抗となる、等のこ
とから正確な電気抵抗Rsが得られ難い弱点がある。However, in the above-mentioned method for measuring the electric resistance Rs, the wiring conductor resistance of the printed wiring board and the electric resistance of the probe pin are included, and the normal contact resistance is several mΩ to several tens mΩ.
On the other hand, since the wiring conductor resistance is several tens Ω to several hundreds Ω, almost all of the measured values become the wiring conductor resistance. Therefore, it is difficult to obtain an accurate electric resistance Rs.
【0033】図3はかかる弱点を解決するための印刷配
線板の他の構成例を示したものである。すなわち図2同
様に接続電極近傍を抽出拡大して表わした図(3-1) とそ
の等価回路図(3-2) で、印刷配線板5片面の上記各バン
プ電極1aと対応する各領域には、それぞれがその一端に
拡幅された検査ターミナル51a 〜53a を持つ配線導体51
〜53を絶縁を保って平行に配置し且つその中間に位置す
る配線導体52のみをU字形状に上記電極域から外部に飛
び出させてその先端に検査ターミナル54a を設けた3個
の配線導体51〜53からなる外部接続電極をパターン形成
して構成されているものである。FIG. 3 shows another configuration example of a printed wiring board for solving such a weak point. That is, as shown in Fig. 2 (3-1) and its equivalent circuit diagram (3-2) in which the vicinity of the connection electrode is extracted and enlarged as in Fig. 2, the areas corresponding to the bump electrodes 1a on one side of the printed wiring board 5 are shown. Is a wiring conductor 51 having inspection terminals 51a to 53a, each of which is widened at one end thereof.
.About.53 are arranged in parallel while maintaining insulation, and only the wiring conductor 52 located in the middle is protruded from the electrode region to the outside in a U-shape, and three wiring conductors 51 are provided with inspection terminals 54a at their tips. The external connection electrodes consisting of ~ 53 are formed by patterning.
【0034】なお、一点鎖線Aは図1同様のICチップ
搭載域を示し、また斜線域Cは図1同様に上記バンプ電
極域を示したものである。そこで、配線導体51の検査タ
ーミナル51a からバンプ電極域Cまでの導体抵抗をR
h1,配線導体52の検査ターミナル52a から領域Cまでの
導体抵抗をRh2,配線導体53の検査ターミナル53a から
領域Cまでの導体抵抗をRh3,上記配線導体52の検査タ
ーミナル54a から領域Cまでの導体抵抗をRh4とし、各
配線導体51〜53の上記バンプ電極1aとの間の接触抵抗を
それぞれRs1,Rs2,Rs3、また配線導体51〜52間およ
び52〜53間のバンプ電極抵抗をそれぞれRIC1,RIC2 、
更に検査ターミナル51a 〜52a 間に流す定電流値をI、
検査ターミナル 53aと54a とに当接せしめるプーロブピ
ンの間に発生する電位差をVとすると、該電位差Vは上
記接触抵抗Rs2の両端にかかる電位差と等しくなること
から、所要の電気抵抗Rs2を Rs2=V/I として容易に求めることができる。The alternate long and short dash line A shows the IC chip mounting area as in FIG. 1, and the hatched area C shows the bump electrode area as in FIG. Therefore, the conductor resistance from the inspection terminal 51a of the wiring conductor 51 to the bump electrode area C is R
h 1 , the conductor resistance from the inspection terminal 52a of the wiring conductor 52 to the region C is Rh 2 , the conductor resistance from the inspection terminal 53a of the wiring conductor 53 to the region C is Rh 3 , and the inspection resistance 54a of the wiring conductor 52 to the region C Up to Rh 4 and contact resistances between the wiring conductors 51 to 53 and the bump electrode 1a are Rs 1 , Rs 2 and Rs 3 , respectively, and between the wiring conductors 51 to 52 and 52 to 53. The bump electrode resistances are R IC1 , R IC2 ,
Further, the constant current value flowing between the inspection terminals 51a to 52a is I,
Assuming that the potential difference generated between the Plurob pins that are brought into contact with the inspection terminals 53a and 54a is V, the potential difference V becomes equal to the potential difference applied to both ends of the contact resistance Rs 2 , so that the required electrical resistance Rs 2 is Rs 2 . It can be easily calculated as 2 = V / I.
【0035】従って配線導体の抵抗値に影響されること
なく所要の電気抵抗を正確に検出することができて、I
Cチップとしての特性と印刷配線板への実装良否とを確
実に検査することができる。Therefore, the required electric resistance can be accurately detected without being affected by the resistance value of the wiring conductor.
It is possible to reliably inspect the characteristics of the C chip and the quality of mounting on the printed wiring board.
【0036】図3同様に接続電極近傍を抽出拡大して表
わした図(4-1) とその等価回路図(4-2) で、印刷配線板
6の上記各バンプ電極1aと対応する各電極域には、それ
ぞれの両端に拡幅された検査ターミナル 61a-1,61a-2と
62a-1,62a-2を持つU字形の配線導体61,62 を各片側の
二辺が上記バンプ電極域内で対向するように絶縁を保っ
て平行に配置させた接続電極がパターン形成されてい
る。Similarly to FIG. 3, a diagram (4-1) in which the vicinity of the connection electrodes is extracted and enlarged and its equivalent circuit diagram (4-2) are shown. Each electrode corresponding to each bump electrode 1a of the printed wiring board 6 is shown in FIG. In the area, the inspection terminals 61a -1 , 61a -2 widened at both ends
Connection electrodes are formed by patterning U-shaped wiring conductors 61, 62 having 62a -1 , 62a -2 in parallel while maintaining insulation so that two sides on one side face each other in the bump electrode region. .
【0037】なお、一点鎖線Aは図1同様のICチップ
搭載域でありまた斜線域Cはバンプ電極域を示したもの
である。そこで、配線導体61の検査ターミナル 61a-1か
らバンプ電極域Cまでの導体抵抗をRh1,該配線導体61
の検査ターミナル 61a-2から領域Cまでの導体抵抗をR
h2,配線導体62の検査ターミナル 62a-1から領域域Cま
での導体抵抗をRh3,該配線導体62の検査ターミナル 6
2a-2から領域域Cまでの導体抵抗をRh4とし、各配線導
体61,62 の上記バンプ電極1aとの間の接触抵抗をそれぞ
れRs1,Rs2、また配線導体61〜62間のバンプ電極抵抗
をRIC、更に検査ターミナル 61a-1〜 62a -2間に流す定
電流値をI、検査ターミナル 61a-1と 62a-2とに当接せ
しめるプーロブピンの間に発生する電位差をVとする
と、該電位差Vが「上記各接触抵抗値と電極抵抗との和
×電流値」すなわち“(Rs1+Rs2+RIC)×I”と等
しくなる。An alternate long and short dash line A indicates an IC chip similar to that shown in FIG.
The mounting area and the shaded area C indicates the bump electrode area.
Is. Therefore, the inspection terminal 61a of the wiring conductor 61-1Or
Conductor resistance from bump electrode area C to Rh1, The wiring conductor 61
Inspection terminal 61a-2To the area C to R
h2, Wiring conductor 62 inspection terminal 62a-1To area C
Conductor resistance at Rh3, Inspection terminal 6 of the wiring conductor 62
2a-2To the area C to RhFourAnd each wiring guide
The contact resistance between the bump electrodes 1a of the bodies 61 and 62 is measured respectively.
Rs1, Rs2, And bump electrode resistance between wiring conductors 61-62
RI c, Further inspection terminal 61a-1~ 62a -2Constant
Current value is I, inspection terminal 61a-1And 62a-2Abut
Let V be the potential difference generated between the squeezing pins.
And the potential difference V is "the sum of the above contact resistance values and electrode resistances.
X current value "or" (Rs1+ Rs2+ RI c) × I ”and so on
I'll get better.
【0038】従って上記RICを予め測定しておいた上
で、上記接触抵抗値Rs1とRs2が所要の電気抵抗値RS
と等しいとすると、所要の電気抵抗値RS を、 RS ={(V/I)−RIC}/2 から容易に求めることができる。Therefore, after measuring the R IC in advance, the contact resistance values Rs 1 and Rs 2 are the required electric resistance values R S.
Then, the required electric resistance value R S can be easily obtained from R S = {(V / I) −R IC } / 2.
【0039】従って、配線導体の抵抗値に影響されるこ
となく所要の電気抵抗値を正確に検出することができ
て、ICチップとしての特性と印刷配線板への実装良否
とを確実に検査することができる。Therefore, the required electric resistance value can be accurately detected without being affected by the resistance value of the wiring conductor, and the characteristics of the IC chip and the quality of mounting on the printed wiring board can be surely inspected. be able to.
【0040】なおかかる印刷配線板では、ICチップの
バンプ電極域との接続数を図4の場合よりも減らせるメ
リットがある。Note that such a printed wiring board has an advantage that the number of connections to the bump electrode area of the IC chip can be reduced as compared with the case of FIG.
【0041】[0041]
【発明の効果】上述の如く本発明により、実装部品の検
査を容易ならしめて生産性向上を図った印刷配線板とそ
れを用いた実装部品の検査方法を提供することができ
る。As described above, according to the present invention, it is possible to provide a printed wiring board which facilitates the inspection of mounted components and improves productivity, and a mounting component inspection method using the same.
【図1】 本発明になる印刷配線板の構成例を説明する
図。FIG. 1 is a diagram illustrating a configuration example of a printed wiring board according to the present invention.
【図2】 実装部品の検査方法を説明する図。FIG. 2 is a diagram illustrating a method for inspecting mounted components.
【図3】 印刷配線板の他の構成例を示す図。FIG. 3 is a diagram showing another configuration example of a printed wiring board.
【図4】 印刷配線板の第3の構成例を示す図。FIG. 4 is a diagram showing a third configuration example of a printed wiring board.
【図5】 従来の印刷配線板構成例を実装部品検査方法
と共に説明する図。FIG. 5 is a diagram illustrating a configuration example of a conventional printed wiring board together with a mounted component inspection method.
1 ICチップ(実装部品,電子デバイス) 4,5,6 印刷配線板 31a,31b,31c プローブピン 41 回路接続電極 41a,42a ,51,52,53,61,62 配線導体 41b, 41b-1,41b-2,41b-3, 〜 検査ターミナル 42b, 42b-1,42b-2,42b-3, 〜 検査ターミナル 42 実装良否判別用電極 51a,52a,53a,54a, 61a-1,61a-2,62a-1,61a-2 検
査ターミナル1 IC chip (mounting component, electronic device) 4,5,6 Printed wiring board 31a, 31b, 31c Probe pin 41 Circuit connection electrode 41a, 42a, 51,52,53,61,62 Wiring conductor 41b, 41b -1 , 41b -2 , 41b -3 , ~ Inspection terminal 42b, 42b -1 , 42b -2 , 42b -3 , ~ Inspection terminal 42 Mounting pass / fail judgment electrode 51a, 52a, 53a, 54a, 61a -1 , 61a -2 , 62a -1 ,, 61a -2 Inspection terminal
───────────────────────────────────────────────────── フロントページの続き (72)発明者 丸山 嘉明 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内 (72)発明者 小林 裕明 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshiaki Maruyama 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor Hiroaki Kobayashi 1015, Kamedotachu, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited
Claims (2)
子デバイスを実装する印刷配線板であって、 実装する前記電子デバイスの各バンプ電極と対応するそ
れぞれの位置に該各バンプ電極とほぼ同じ大きさに形成
されている接続電極が、 配線導体(41a) で印刷配線板(4) 上の回路に繋がり且つ
上記電子デバイス搭載域外側の該配線導体途中に拡幅さ
れた検査ターミナル(41b) を具えて形成されている回路
接続電極(41)と、該回路接続電極(41)に対して絶縁を保
って独立し且つ電子デバイス搭載域外側の上記配線導体
間余白域に拡幅された検査ターミナル(42b) を具えて形
成された配線導体(42a) に繋がる1個または複数個の実
装良否判別用電極(42)とに分割されて構成されているこ
とを特徴とした印刷配線板。1. A printed wiring board for mounting a face-down bonding type electronic device, which is formed at substantially the same size as each bump electrode at each position corresponding to each bump electrode of the electronic device to be mounted. The connecting electrode connected to the circuit on the printed wiring board (4) by the wiring conductor (41a) and formed with the widened inspection terminal (41b) in the middle of the wiring conductor outside the electronic device mounting area. A circuit connection electrode (41) and an inspection terminal (42b) which is independent from the circuit connection electrode (41) while maintaining insulation and is widened in the margin area between the wiring conductors outside the electronic device mounting area. A printed wiring board, characterized in that it is divided into one or a plurality of mounting quality determination electrodes (42) connected to the formed wiring conductor (42a).
ボンディングタイプの電子デバイスの検査方法であっ
て、 請求項1記載の印刷配線板(4) の対応する位置に被検電
子デバイス(1) を位置決め搭載し半田接続して実装した
後、 実装された該電子デバイス(1) の入力側バンプ電極と接
続する印刷配線板上の回路接続電極(41)に繋がる検査タ
ーミナル(41b-1) と該電子デバイス(1) の出力側バンプ
電極と接続する印刷配線板上の回路接続電極(41)に繋が
る検査ターミナル(41b-2) 間で該電子デバイス(1) の特
性を検査し、 得られた特性値が所定値を超えたときまたは不安定であ
るときには、該電子デバイス(1) の入力側または出力側
もしくはその双方の各バンプ電極と接続する印刷配線板
上の回路接続電極(41)に繋がる検査ターミナルと該回路
接続電極(41)に対応する実装良否判別用電極(42)に繋が
る検査ターミナル間の電気的測定で、該電子デバイス
(1) の印刷配線板(4) に対する実装の良否を検査するこ
とを特徴とした実装部品の検査方法。2. A method for inspecting a face-down bonding type electronic device mounted on a printed wiring board, wherein the electronic device to be tested (1) is placed at a corresponding position on the printed wiring board (4) according to claim 1. After mounting by positioning and soldering and mounting, the inspection terminal (41b -1 ) connected to the circuit connection electrode (41) on the printed wiring board that is connected to the bump electrode on the input side of the mounted electronic device (1) and the The characteristics of the electronic device (1) were inspected between the inspection terminals (41b -2 ) connected to the circuit connection electrodes (41) on the printed wiring board that are connected to the output side bump electrodes of the electronic device (1) and obtained. When the characteristic value exceeds a predetermined value or is unstable, the circuit connection electrodes (41) on the printed wiring board connected to the bump electrodes on the input side and / or the output side of the electronic device (1) are connected. Connected to the inspection terminal and the circuit connection electrode (41) The electronic device is electrically measured between the inspection terminals connected to the corresponding mounting / non-defining electrode (42).
A method for inspecting a mounted component, which comprises inspecting the quality of mounting on the printed wiring board (4) according to (1).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5083700A JPH06303000A (en) | 1993-04-12 | 1993-04-12 | Printed wiring board and mounted component inspecting method using it |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5083700A JPH06303000A (en) | 1993-04-12 | 1993-04-12 | Printed wiring board and mounted component inspecting method using it |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH06303000A true JPH06303000A (en) | 1994-10-28 |
Family
ID=13809776
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5083700A Withdrawn JPH06303000A (en) | 1993-04-12 | 1993-04-12 | Printed wiring board and mounted component inspecting method using it |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH06303000A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6693243B1 (en) * | 1999-11-25 | 2004-02-17 | Murata Manufacturing Co, Ltd. | Surface mounting component and mounted structure of surface mounting component |
JP2012134194A (en) * | 2010-12-20 | 2012-07-12 | Nichia Chem Ind Ltd | Mounting board for semiconductor element, semiconductor light-emitting device using the mounting board, and method of manufacturing semiconductor light-emitting device |
-
1993
- 1993-04-12 JP JP5083700A patent/JPH06303000A/en not_active Withdrawn
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6693243B1 (en) * | 1999-11-25 | 2004-02-17 | Murata Manufacturing Co, Ltd. | Surface mounting component and mounted structure of surface mounting component |
JP2012134194A (en) * | 2010-12-20 | 2012-07-12 | Nichia Chem Ind Ltd | Mounting board for semiconductor element, semiconductor light-emitting device using the mounting board, and method of manufacturing semiconductor light-emitting device |
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Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20000704 |