JPH06165515A - Inverter - Google Patents
InverterInfo
- Publication number
- JPH06165515A JPH06165515A JP4333601A JP33360192A JPH06165515A JP H06165515 A JPH06165515 A JP H06165515A JP 4333601 A JP4333601 A JP 4333601A JP 33360192 A JP33360192 A JP 33360192A JP H06165515 A JPH06165515 A JP H06165515A
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- control
- converters
- signal transmission
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
- H02M1/008—Plural converter units for generating at two or more independent and non-parallel outputs, e.g. systems with plural point of load switching regulators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
Landscapes
- Power Conversion In General (AREA)
- Inverter Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、複数の直流／交流変換
部を備え、これらによりそれぞれ負荷を駆動するインバ
ータの制御回路の改良に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of an inverter control circuit having a plurality of DC / AC converters, each of which drives a load.
【０００２】[0002]
【従来の技術及び発明が解決しようとする課題】従来、
誘導電動機等を可変速制御するインバータは、主回路で
ある直流／交流変換部と、ＰＷＭ制御等を行う制御回路
とを同一ユニット内に備えたものが一般的である。この
ため、例えば複数台の誘導電動機を制御する場合には、
各制御回路の演算機能等が同一であるにも関わらず、個
々の直流／交流変換部と同一ユニット内の制御回路を使
用しているため、スペースやコストの点で大きな無駄と
なっていた。2. Description of the Related Art Conventionally, the problems to be solved by the invention
An inverter for variable speed control of an induction motor or the like generally includes a DC / AC converter, which is a main circuit, and a control circuit for performing PWM control and the like in the same unit. Therefore, for example, when controlling a plurality of induction motors,
Although each control circuit has the same arithmetic function and the like, since each DC / AC converter uses the control circuit in the same unit, it is a big waste in terms of space and cost.
【０００３】本発明は上記問題点を解消するべくなされ
たもので、その目的とするところは、複数の直流／交流
変換部を単一の制御回路により制御するようにしてスペ
ースやコストを低減するようにしたインバータを提供す
ることにある。The present invention has been made to solve the above problems, and an object thereof is to control a plurality of DC / AC converters by a single control circuit to reduce space and cost. To provide such an inverter.
【０００４】[0004]
【課題を解決するための手段】上記目的を達成するた
め、本発明は、複数の直流／交流変換部を備え、これら
の直流／交流変換部により各々に接続された負荷を駆動
するインバータにおいて、前記直流／交流変換部を制御
する制御信号を単一の制御回路により生成して信号伝送
路を介し前記直流／交流変換部に伝送するものである。
ここで、各変換部に対する制御信号は、複数の直流／交
流変換部にそれぞれ対応するインターフェイス及び個別
の信号伝送路を介して伝送するか、あるいは単一のイン
ターフェイス及び信号伝送路を介してマルチドロップ方
式により伝送すればよい。In order to achieve the above-mentioned object, the present invention provides an inverter having a plurality of DC / AC converters and driving a load connected to each of these DC / AC converters, A control signal for controlling the DC / AC converter is generated by a single control circuit and transmitted to the DC / AC converter via a signal transmission path.
Here, the control signal for each converter is transmitted through an interface and an individual signal transmission line corresponding to each of the DC / AC converters, or multi-drop via a single interface and a signal transmission line. It may be transmitted by the method.
【０００５】[0005]
【作用】本発明では、複数の直流／交流変換部に対する
制御信号が単一の制御回路により生成され、これらの制
御信号が個別の信号伝送路を介し、あるいはマルチドロ
ップ方式により単一の信号伝送路を介して各変換部にそ
れぞれ伝送される。このため、制御回路内の演算部等を
各変換部で共用することができ、制御回路の簡素化によ
りスペースやコストを削減することが可能になる。According to the present invention, control signals for a plurality of DC / AC converters are generated by a single control circuit, and these control signals are transmitted through individual signal transmission paths or by a single signal transmission by the multi-drop method. It is transmitted to each conversion unit via the path. Therefore, the calculation unit and the like in the control circuit can be shared by the respective conversion units, and the control circuit can be simplified to reduce the space and cost.
【０００６】[0006]
【実施例】以下、図に沿って本発明の実施例を説明す
る。図１は第１実施例の主要部の構成を示すブロック図
である。図において、１は交流電源、２は整流回路、３
は電解コンデンサからなる平滑回路、４1〜４nはパワト
ランジスタ等からなるインバータ主回路としての直流／
交流変換部、６1〜６nは可変速制御される誘導電動機で
ある。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of the main part of the first embodiment. In the figure, 1 is an AC power supply, 2 is a rectifier circuit, and 3
The smoothing circuit composed of the electrolytic capacitor, 4 1 to 4 n is a DC as an inverter main circuit comprising a power transistor or the like /
The AC converters 6 1 to 6 n are induction motors whose variable speed is controlled.
【０００７】一方、７は制御回路であり、例えばインバ
ータをＰＷＭ制御する場合には、信号波（正弦波）や搬
送波の発生手段、変調（比較）手段等からなるＰＷＭ信
号発生回路、速度指令器等を有し、かつ、ＰＷＭ信号の
レベル変換や信号形態（光信号、電気信号等）の変換等
を行うインターフェイス８1〜８nを直流／交流変換部４
1〜４nに対し１対１対応で備えている。また、直流／交
流変換部４1〜４n側にもインターフェイス５1〜５nが設
けられ、前記インターフェイス８1〜８nとの間は光通信
ケーブルや電線からなる信号伝送路９1〜９nにより接続
されている。On the other hand, reference numeral 7 is a control circuit, for example, in the case of performing PWM control of an inverter, a PWM signal generation circuit including a signal wave (sine wave) or carrier wave generation means, modulation (comparison) means, speed commander has like, and the level conversion and signal form of the PWM signal (the optical signal, an electrical signal or the like) interface that converts the like of 8 1 to 8 n DC / AC converter 4
It has a one-to-one correspondence with respect to 1 to 4 n. Further, interfaces 5 1 to 5 n are provided also on the DC / AC converters 4 1 to 4 n side, and signal transmission lines 9 1 to 9 consisting of optical communication cables or electric wires are provided between the interfaces 8 1 to 8 n. connected by n .
【０００８】図２は、制御回路７の構成を示したもので
あり、例えばマイクロコンピュータにより構成されてい
る。すなわち、この制御回路７は、直流／交流変換部４
1〜４nの仕様、定格等の各種データや、速度指令値、信
号波や搬送波のデータ等が格納されたＲＡＭ７３と、所
定のプログラムが格納されたＲＯＭ７２と、前記プログ
ラムに従い信号波及び搬送波の比較演算等を行って直流
／交流変換部４1〜４nの各スイッチング素子に対するＰ
ＷＭ信号を生成するＣＰＵ７１と、その出力信号が格納
されるバッファとしての制御部７４1〜７４nとを備えて
いる。FIG. 2 shows the structure of the control circuit 7, which is composed of, for example, a microcomputer. That is, the control circuit 7 includes the DC / AC converter 4
A RAM 73 in which various data such as specifications and ratings of 1 to 4 n , a speed command value, data of a signal wave and a carrier wave are stored, a ROM 72 in which a predetermined program is stored, and a signal wave and a carrier wave according to the program. P for each switching element of the DC / AC converters 4 1 to 4 n is performed by performing a comparison operation or the like.
A CPU 71 that generates a WM signal and control units 74 1 to 74 n as buffers that store the output signal thereof are provided.
【０００９】ここで、前記制御部７４1〜７４nと直流／
交流変換部４1〜４nとは１対１で対応している。なお、
直流／交流変換部４1〜４nの出力電圧検出手段等は便宜
上、図示されていないが、ＣＰＵ７１は周知の手段によ
り直流／交流変換部４1〜４nの出力電圧検出値も個別に
取り込んでＶ／ｆ一定制御等を実行する。Here, the control units 74 1 to 74 n and the direct current /
The AC converting unit 4 1 to 4 n is a one-to-one correspondence. In addition,
Although the output voltage detecting means and the like of the DC / AC converters 4 1 to 4 n are not shown for convenience, the CPU 71 individually fetches the output voltage detection values of the DC / AC converters 4 1 to 4 n by a known means. The V / f constant control or the like is executed with.
【００１０】上記のように、本実施例は、制御回路７内
のＣＰＵ７１及び制御部７４1〜７４nにより、複数の直
流／交流変換部４1〜４nに対するＰＷＭ信号を個別に生
成して信号伝送路９1〜９nを介し個々に伝送するもので
ある。このため、直流／交流変換部４1〜４n側では各ユ
ニット内に制御回路を備える必要がなくなり、制御動作
の主要部をなす演算処理を単一のＣＰＵ７１及びメモリ
を用いて行うことができるので、制御回路７内の主要部
の共用によるスペースの削減、コストの低減が可能にな
る。As described above, in this embodiment, the CPU 71 and the control units 74 1 to 74 n in the control circuit 7 individually generate the PWM signals for the plurality of DC / AC conversion units 4 1 to 4 n . The signals are individually transmitted via the signal transmission paths 9 1 to 9 n . Therefore, the DC / AC conversion unit 4 1 to 4 n-side is not necessary to provide a control circuit in each unit, the processing that forms the main part of the control operation can be performed using a single CPU71 and memory Therefore, it is possible to reduce the space and cost by sharing the main part in the control circuit 7.
【００１１】次に、図３は本発明の第２実施例を示して
いる。この実施例は、制御回路７から直流／交流変換部
４1〜４nへの信号伝送をいわゆるマルチドロップ方式に
より行うようにしたもので、制御回路７内のインターフ
ェイス８を単一化してコストを一層低減することができ
る。Next, FIG. 3 shows a second embodiment of the present invention. This embodiment is obtained by the signal transmission from the control circuit 7 to the DC / AC converting unit 4 1 to 4 n to perform a so-called multi-drop method, the cost and unifies the interface 8 in the control circuit 7 It can be further reduced.
【００１２】回路構成としては、各変換器に対するＰＷ
Ｍ信号を制御回路７により生成してインターフェイス８
から信号伝送路９1を介しインターフェイス５1に送り、
次いで、信号伝送路９2，９3，……，９nを介し各イン
ターフェイス５2〜５nに分配して直流／交流変換部４1
〜４nをそれぞれ制御する。この場合には、例えばＲＳ
４８５インターフェイス等を使用し、各変換部４1〜４n
に対する制御信号を個別のアドレスと共に一括して伝送
した後に分配する方式をとればよい。As a circuit configuration, the PW for each converter is
The M signal is generated by the control circuit 7 and the interface 8
From the signal transmission line 9 1 to the interface 5 1 ,
Then, the signal transmission path 9 2, 9 3, ......, 9 n a through current and distributed to the interface 5 2 to 5 n / AC converter 4 1
To control the ~4 n, respectively. In this case, for example, RS
Using the 485 interface or the like, the conversion unit 4 1 to 4 n
It is sufficient to adopt a method in which the control signal for the above is collectively transmitted together with the individual addresses and then distributed.
【００１３】なお、本発明が適用されるインバータの種
類としては電圧形，電流形の相違や相数を問わず、その
制御方法もＰＷＭ制御に何ら限定されるものではない。
また、負荷についても誘導電動機のみならず同期電動機
であっても良い。It should be noted that the type of inverter to which the present invention is applied is not limited to PWM control, regardless of the difference between voltage type and current type and the number of phases.
Further, the load may be not only an induction motor but also a synchronous motor.
【００１４】[0014]
【発明の効果】以上のように本発明は、複数の直流／交
流変換部に対する制御信号を単一の制御回路により生成
し、これらの制御信号を個別の信号伝送路を介して、あ
るいはマルチドロップ方式により単一の信号伝送路を介
して各変換部にそれぞれ伝送するものである。このた
め、制御回路内の演算部等を各変換部で共用することが
でき、制御回路を簡素化してスペースの削減、コストの
低減を図ることが可能になる。As described above, according to the present invention, control signals for a plurality of DC / AC converters are generated by a single control circuit, and these control signals are transmitted through individual signal transmission paths or multi-drop. According to the method, the signal is transmitted to each converter via a single signal transmission path. For this reason, the calculation unit and the like in the control circuit can be shared by the respective conversion units, and the control circuit can be simplified to reduce the space and cost.
【図１】本発明の第１実施例を示す回路構成図である。FIG. 1 is a circuit configuration diagram showing a first embodiment of the present invention.
【図２】図１における制御回路の構成図である。FIG. 2 is a configuration diagram of a control circuit in FIG.
【図３】本発明の第２実施例を示す回路構成図である。FIG. 3 is a circuit configuration diagram showing a second embodiment of the present invention.
１ 交流電源 ２ 整流回路 ３ 平滑回路 ４1〜４n 直流／交流変換部 ５1〜５n，８，８1〜８n インターフェイス ６1〜６n 誘導電動機 ７ 制御回路 ９1〜９n 信号伝送路 ７１ ＣＰＵ ７２ ＲＯＭ ７３ ＲＡＭ ７４1〜７４n 制御部1 AC power supply 2 Rectifier circuit 3 Smoothing circuit 4 1 to 4 n DC / AC converter 5 1 to 5 n , 8, 8 1 to 8 n Interface 6 1 to 6 n Induction motor 7 Control circuit 9 1 to 9 n Signal transmission Road 71 CPU 72 ROM 73 RAM 74 1 to 74 n Control unit
Claims (3)
の直流／交流変換部により各々に接続された負荷を駆動
するインバータにおいて、 前記直流／交流変換部を制御する制御信号を単一の制御
回路により生成して信号伝送路を介し前記直流／交流変
換部に伝送することを特徴とするインバータ。1. An inverter comprising a plurality of DC / AC converters for driving a load connected to each of these DC / AC converters, wherein a single control signal for controlling the DC / AC converters is provided. An inverter, which is generated by a control circuit and is transmitted to the DC / AC converter through a signal transmission path.
それぞれ対応するインターフェイスを備え、これらのイ
ンターフェイス及び個別の信号伝送路を介して各変換部
に制御信号を伝送する請求項１記載のインバータ。2. The control circuit is provided with an interface corresponding to each of the plurality of DC / AC converters, and the control signal is transmitted to each converter via these interfaces and an individual signal transmission path. Inverter.
備え、このインターフェイス及び単一の信号伝送路を介
して各変換部にマルチドロップ方式により制御信号を伝
送する請求項１記載のインバータ。3. The inverter according to claim 1, wherein the control circuit includes a single interface, and transmits the control signal to each conversion unit by the multi-drop method via the interface and the single signal transmission path.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4333601A JPH06165515A (en) | 1992-11-19 | 1992-11-19 | Inverter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4333601A JPH06165515A (en) | 1992-11-19 | 1992-11-19 | Inverter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06165515A true JPH06165515A (en) | 1994-06-10 |
Family
ID=18267873
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4333601A Withdrawn JPH06165515A (en) | 1992-11-19 | 1992-11-19 | Inverter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06165515A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08331861A (en) * | 1995-05-31 | 1996-12-13 | Mitsubishi Electric Corp | Inverter device with function of setting start delay time |
| EP1134882A2 (en) * | 2000-03-06 | 2001-09-19 | Vacon Oyj | Frequency converter |
| US6686712B2 (en) | 2001-11-08 | 2004-02-03 | Mitsubishi Denki Kabushiki Kaisha | Motor network control system |
| EP1337030A3 (en) * | 2002-02-13 | 2004-09-29 | Semikron Elektronik GmbH | Control for converter valves |
| EP1521356A3 (en) * | 2003-09-30 | 2007-07-11 | Vacon Oyj | Control of parallel operation of frequency converters or inverters |
| US9337747B2 (en) | 2012-10-26 | 2016-05-10 | Kabushiki Kaisha Toshiba | Inverter apparatus and inverter system |
-
1992
- 1992-11-19 JP JP4333601A patent/JPH06165515A/en not_active Withdrawn
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08331861A (en) * | 1995-05-31 | 1996-12-13 | Mitsubishi Electric Corp | Inverter device with function of setting start delay time |
| EP1134882A2 (en) * | 2000-03-06 | 2001-09-19 | Vacon Oyj | Frequency converter |
| EP1134882A3 (en) * | 2000-03-06 | 2001-09-19 | Vacon Oyj | Frequency converter |
| US6686712B2 (en) | 2001-11-08 | 2004-02-03 | Mitsubishi Denki Kabushiki Kaisha | Motor network control system |
| EP1337030A3 (en) * | 2002-02-13 | 2004-09-29 | Semikron Elektronik GmbH | Control for converter valves |
| EP1521356A3 (en) * | 2003-09-30 | 2007-07-11 | Vacon Oyj | Control of parallel operation of frequency converters or inverters |
| US9337747B2 (en) | 2012-10-26 | 2016-05-10 | Kabushiki Kaisha Toshiba | Inverter apparatus and inverter system |
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| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20000201 |