JPH06104369A - Multilayer lead frame - Google Patents
Multilayer lead frameInfo
- Publication number
- JPH06104369A JPH06104369A JP27527992A JP27527992A JPH06104369A JP H06104369 A JPH06104369 A JP H06104369A JP 27527992 A JP27527992 A JP 27527992A JP 27527992 A JP27527992 A JP 27527992A JP H06104369 A JPH06104369 A JP H06104369A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- metal plate
- metal
- electrical connection
- connection member
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ＩＣ，ＬＳＩ等の半導
体素子のパッケージ収納の際に用いられる多層リードフ
レームに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-layered lead frame used for packaging semiconductor devices such as ICs and LSIs.
【０００２】[0002]
【従来の技術】近年、半導体装置に搭載されるＩＣ，Ｌ
ＳＩ等の半導体素子はますます高集積化し、その端子数
が増大しつつあるので、端子に対応する多数の入出力ピ
ンを備えたリードフレームが要望されている。そして、
入出力ピン数の増大に対応する小形のパッケージとして
ＱＦＰ（Quad Flat Package)が注目されており、例えば
入出力端子数が200 ピン程度、リード間ピッチ0.5 mm前
後までのものが実用化されている。2. Description of the Related Art In recent years, ICs and Ls mounted on semiconductor devices
Since semiconductor devices such as SI are highly integrated and the number of terminals is increasing, a lead frame having a large number of input / output pins corresponding to the terminals is desired. And
A QFP (Quad Flat Package) is attracting attention as a small package that can accommodate an increase in the number of input / output pins. For example, a package with about 200 input / output terminals and a lead pitch of around 0.5 mm has been put to practical use. .
【０００３】図10は、従来の一般的な多層リードフレー
ムの断面図であり、ＬＳＩ51を載置する電源層（または
接地層）となる第１の金属板52と、第１の絶縁テープ53
と、接地層（または電源層）となる第２の金属板54と、
第２の絶縁テープ55と、信号線，電源線及び接地線で構
成されたリードフレーム56とを、下方から順に積層した
構成をなす。第１の金属板52に載置されたＬＳＩ51と、
第１の金属板52，第２の金属板54及びリードフレーム56
とはワイヤ57, 57, 57にてボンディング接続されてい
る。第１の金属板52とリードフレーム56との接続部Ａに
おいては、電源層（または接地層）となる第１の金属板
52の端部に金属突起部52a が設けられ、これを介してリ
ードフレーム56の電源線（または接地線）と接続されて
いる。同様に、接地層（または電源層）となる第２の金
属板54とリードフレーム56との接続部Ｂにおいては、第
２の金属板54の接続部として金属突起部54a が設けら
れ、これを介してリードフレーム56の接地線（または電
源線）に接続されている。FIG. 10 is a cross-sectional view of a conventional general multi-layered lead frame, which shows a first metal plate 52 serving as a power supply layer (or a ground layer) on which an LSI 51 is mounted, and a first insulating tape 53.
And a second metal plate 54 serving as a ground layer (or a power layer),
The second insulating tape 55 and a lead frame 56 including a signal line, a power line and a ground line are laminated in this order from the bottom. The LSI 51 mounted on the first metal plate 52,
First metal plate 52, second metal plate 54 and lead frame 56
And are connected by bonding with wires 57, 57, 57. In the connection portion A between the first metal plate 52 and the lead frame 56, the first metal plate that serves as a power supply layer (or a ground layer)
A metal projection 52a is provided at the end of 52, and is connected to the power supply line (or ground line) of the lead frame 56 via this. Similarly, at the connecting portion B between the second metal plate 54, which serves as the ground layer (or the power supply layer), and the lead frame 56, a metal protrusion 54a is provided as a connecting portion for the second metal plate 54. It is connected to the ground wire (or power supply wire) of the lead frame 56 through.
【０００４】[0004]
【発明が解決しようとする課題】上述の構成をなす従来
の多層リードフレームでは、リードフレーム56に第１の
金属板52の金属突起部52a 及び第２の金属板54の金属突
起部54a を接続させるためには、金属突起部52a, 54aが
リードフレーム56と接触するように、金属突起部52a, 5
4aを折り曲げ加工しなければならず、この折り曲げ加工
時の位置合わせを行う必要がある。また、これらの金属
突起部52a, 54aの幅は、接続するリードフレーム56のリ
ード幅と同寸法かまたはそれより小さくなければ、隣合
うリードと接触して電気的短絡が生じる可能性が高い。
更に、金属突起部とリードフレーム56との接続は、スポ
ット抵抗溶接にて行われているが、このスポット抵抗溶
接では、溶接対象の電極サイズに限界がある。以上のよ
うな各事項は、多層リードフレームの狭ピッチ，多ピン
化には障害となり、前述したような多層リードフレーム
（ピッチ0.5 mm前後，200 ピン程度）が限界となってい
る。In the conventional multi-layered lead frame having the above-mentioned structure, the metal projection 52a of the first metal plate 52 and the metal projection 54a of the second metal plate 54 are connected to the lead frame 56. In order to make the metal projections 52a, 54a contact the lead frame 56,
The 4a must be bent, and the alignment at the time of this bending must be performed. If the widths of the metal protrusions 52a and 54a are equal to or smaller than the lead width of the lead frame 56 to be connected, there is a high possibility that an electrical short circuit will occur due to contact with an adjacent lead.
Furthermore, the connection between the metal projection and the lead frame 56 is performed by spot resistance welding, but in this spot resistance welding, the size of the electrode to be welded is limited. Each of the above items is an obstacle to narrowing the pitch and increasing the pin count of the multilayer lead frame, and the above-mentioned multilayer lead frame (pitch of about 0.5 mm, about 200 pins) is the limit.
【０００５】また、信号線（リードフレーム56）が最上
層に配置されているので、電気的雑音が高いという問題
がある。Further, since the signal line (lead frame 56) is arranged in the uppermost layer, there is a problem that electric noise is high.
【０００６】本発明は斯かる事情に鑑みてなされたもの
であり、従来より、狭ピッチ，多ピン化を実現でき、電
気的雑音も低減できる多層リードフレームを提供するこ
とを目的とする。The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a multilayer lead frame which can realize a narrower pitch and a larger number of pins and which can reduce electrical noise.
【０００７】[0007]
【課題を解決するための手段】本発明に係る多層リード
フレームは、リードフレームと、絶縁材からなる保持体
に形成された貫通孔にその両端部を前記保持体の両面か
ら露出させて導電体を埋設した構成をなし、前記リード
フレームの片面または両面にその一方の露出部を接して
配設された１または２枚の電気的接続部材と、該電気的
接続部材の他方の露出部に接する平面状の１または２枚
の金属板とを有し、前記リードフレームと前記金属板と
が前記電気的接続部材により電気的に接続されて構成さ
れていることを特徴とする。A multi-layer lead frame according to the present invention is a conductor in which a lead frame and a through hole formed in a holder made of an insulating material have both ends exposed from both sides of the holder. And one or two electrical connection members arranged so that one exposed portion is in contact with one surface or both surfaces of the lead frame and the other exposed portion of the electrical connection member. It is characterized in that it has one or two planar metal plates, and is configured such that the lead frame and the metal plate are electrically connected by the electrical connecting member.
【０００８】[0008]
【作用】本発明の多層リードフレームでは、リードフレ
ームと金属板との間に介在させる電気的接続部材が、従
来例の絶縁テープ及び金属突起部の役割を果たす。この
電気的接続部材は、絶縁性の保持体の表面から導電体が
露出しているので、接続部における金属板を折り曲げる
ことなく、電気的接続部材（導電体）を介してリードフ
レームと金属板とを接続できる。従って、従来のような
折り曲げ加工における位置合わせが不要である。また、
リードフレーム及び金属板の接続部分に金属膜を前処理
として形成しておけば、熱圧着法または超音波併用熱圧
着法にて電気的接続部材（導電材）とリードフレーム及
び金属板とが容易に接合される。以上の理由により、従
来に比べて狭ピッチ，多ピン化を実現できる。In the multilayer lead frame of the present invention, the electrical connecting member interposed between the lead frame and the metal plate serves as the insulating tape and the metal projection of the conventional example. In this electrical connection member, since the conductor is exposed from the surface of the insulating holder, the lead frame and the metal plate can be connected via the electrical connection member (conductor) without bending the metal plate in the connection portion. And can be connected. Therefore, there is no need for the conventional alignment in the bending process. Also,
If a metal film is formed as a pre-treatment on the connection part of the lead frame and the metal plate, the electrical connection member (conductive material) and the lead frame and the metal plate can be easily formed by the thermocompression bonding method or the ultrasonic thermocompression bonding method. To be joined to. For the above reasons, it is possible to realize a narrower pitch and a larger number of pins than the conventional one.
【０００９】また、リードフレームを２枚の金属板にて
挟む構成にすると、電気的雑音は低くなる。If the lead frame is sandwiched between two metal plates, electrical noise will be reduced.
【００１０】[0010]
【実施例】以下、本発明をその実施例を示す図面に基づ
いて具体的に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to the drawings showing the embodiments.
【００１１】まず、本発明の多層リードフレームに使用
する電気的接続部材について説明する。図１, 図２はこ
の電気的接続部材の平面図，断面図である。電気的接続
部材１は、ポリイミド樹脂からなる保持体２（厚さ10μ
ｍ程度）に形成された多数の貫通孔2a中に、例えば金
（Ａｕ）からなる複数の導電体３を、夫々の導電体３同
士が電気的絶縁状態になるように埋設させて構成されて
いる。各導電体３の両端部は、保持体２の表面から露出
しており、その露出する両端部の径は保持体２内に埋設
される部分の径より大きくなっている。First, the electrical connection member used in the multilayer lead frame of the present invention will be described. 1 and 2 are a plan view and a sectional view of this electrical connection member. The electrical connection member 1 is a holder 2 made of polyimide resin (thickness 10 μm).
a plurality of conductors 3 made of, for example, gold (Au) are embedded in a large number of through-holes 2a formed in about (m) so that the conductors 3 are electrically insulated from each other. There is. Both ends of each conductor 3 are exposed from the surface of the holding body 2, and the diameter of the exposed both ends is larger than the diameter of the portion embedded in the holding body 2.
【００１２】図３は、本発明の一実施例における多層リ
ードフレームの断面図、図４はこの実施例における多層
リードフレームの構成部材を示す斜視図である。また、
図５に、一般的なＱＦＰにおけるリードフレームの電源
ピンｐ1 と接地ピンｐ2 との配置例を示す。なお、この
電源ピンｐ1 及び接地ピンｐ2 の配置位置は、設計する
ＬＳＩによって決定される。FIG. 3 is a sectional view of a multi-layer lead frame according to an embodiment of the present invention, and FIG. 4 is a perspective view showing constituent members of the multi-layer lead frame according to this embodiment. Also,
FIG. 5 shows an arrangement example of the power supply pin p1 and the ground pin p2 of the lead frame in a general QFP. The arrangement positions of the power supply pin p1 and the ground pin p2 are determined by the LSI to be designed.
【００１３】図３，４に示す実施例の多層リードフレー
ムは、ＬＳＩ11を載置する電源層（または接地層）とな
る平板状の銅（Ｃｕ）またはＣｕ合金製の第１の金属板
12aと、図１，２に示す構成をなす第１の電気的接続部
材1aと、信号線，電源線及び接地線で構成されたＱＦＰ
用の一般的なＣｕまたはＣｕ合金製のリードフレーム13
と、図１，２に示す構成をなす第２の電気的接続部材1b
と、接地層（または電源層）となる平板状のＣｕまたは
Ｃｕ合金製の第２の金属板12b とを、下方から順に積層
した構成をなす。第１の金属板12a に載置されたＬＳＩ
11と、第１の金属板12a,リードフレーム13及び第２の金
属板12b とはＡｕまたはアルミニウム（Ａｌ）からなる
ワイヤ14, 14, 14にてボンディング接続されている。こ
れらの各部材は、リードフレーム13の各リードを外部に
引き出した状態で、樹脂にて一体的に封止されている。The multi-layered lead frame of the embodiment shown in FIGS. 3 and 4 is a first metal plate made of flat copper (Cu) or Cu alloy which serves as a power supply layer (or ground layer) on which the LSI 11 is mounted.
12a, a first electrical connection member 1a having the configuration shown in FIGS. 1 and 2, and a QFP including a signal line, a power supply line, and a ground line.
General Cu or Cu alloy leadframes for
And a second electrical connection member 1b having the configuration shown in FIGS.
And a second metal plate 12b made of a flat plate of Cu or a Cu alloy, which serves as a ground layer (or a power supply layer), are laminated in this order from the bottom. LSI mounted on the first metal plate 12a
The first metal plate 12a, the lead frame 13 and the second metal plate 12b are bonded to each other by wires 14, 14 and 14 made of Au or aluminum (Al). Each of these members is integrally sealed with resin in a state where each lead of the lead frame 13 is drawn to the outside.
【００１４】ＱＦＰにおける電気特性の改善（インダク
タンス，雑音の低減）を図るためには、本実施例のよう
に、電源層，接地層を平板状の金属板として接続し、多
層化することが有効である。リードフレーム13の下側に
設けられる第１の金属板12aのＬＳＩ11が載置される部
分とワイヤボンディングされる部分とには、メッキ，蒸
着，スパッタリング法等によって銀（Ａｇ），Ａｕまた
はＡｌの金属薄膜が形成されており、また、第１の電気
的接続部材1aの導電体３との接続部分には、メッキ，蒸
着，スパッタリング法等によってＡｇ，ＡｕまたはＡｌ
膜が形成されている。この第１の金属板12a とリードフ
レーム13との間には、これらを接続するための第１の電
気的接続部材1aが介装される。第１の電気的接続部材1a
の中央部にはＬＳＩ11を設置するための開口部10a が設
けられており、第１の金属板12aと接続させたいリード
フレーム13の電源（または接地）ピンだけに接触するよ
うに複数の導電体３が設けられている。リードフレーム
13のワイヤボンディングされる部分には、メッキ，蒸
着，スパッタリング法等によってＡｇ，ＡｕまたはＡｌ
の金属薄膜が形成されており、第１，第２の電気的接続
部材1a，1bの導電体３，３との接続部分には、メッキ，
蒸着，スパッタリング法等によってＡｇ，ＡｕまたはＡ
ｌ膜が形成されている。リードフレーム13の上側に設け
られる第２の金属板12b の中央部にはＬＳＩ11を設置す
るための開口部20が設けられている。第２の金属板12b
のワイヤボンディングされる部分には、メッキ，蒸着，
スパッタリング法等によってＡｇ，ＡｕまたはＡｌの金
属薄膜が形成されており、第２の電気的接続部材1bの導
電体３との接続部分には、メッキ，蒸着，スパッタリン
グ法等によってＡｇ，ＡｕまたはＡｌ膜が形成されてい
る。この第２の金属板12bとリードフレーム13との間に
は、これらを接続するための第２の電気的接続部材1bが
介装される。第２の電気的接続部材1bの中央部にはＬＳ
Ｉ11を設置するための開口部10b が設けられており、第
２の金属板12b と接続させたいリードフレーム13の接地
（または電源）ピンだけに接触するように複数の導電体
３が設けられている。In order to improve the electric characteristics (inductance and noise reduction) in the QFP, it is effective to connect the power supply layer and the ground layer as a flat metal plate as in this embodiment to form a multilayer structure. Is. A portion of the first metal plate 12a provided on the lower side of the lead frame 13 where the LSI 11 is mounted and a portion where wire bonding is performed are made of silver (Ag), Au or Al by plating, vapor deposition, sputtering or the like. A metal thin film is formed, and Ag, Au or Al is formed on the connection portion of the first electrical connection member 1a with the conductor 3 by plating, vapor deposition, sputtering or the like.
A film is formed. A first electrical connecting member 1a for connecting the first metal plate 12a and the lead frame 13 is interposed between the first metal plate 12a and the lead frame 13. First electrical connection member 1a
An opening 10a for installing the LSI 11 is provided in the central part of the plurality of conductors so as to contact only the power (or ground) pin of the lead frame 13 to be connected to the first metal plate 12a. 3 is provided. Lead frame
The wire-bonded portion of 13 is made of Ag, Au or Al by plating, vapor deposition, sputtering, etc.
Of the metal thin film is formed on the connecting portions of the first and second electrical connecting members 1a and 1b with the conductors 3 and 3.
Ag, Au or A by vapor deposition, sputtering method, etc.
l film is formed. An opening 20 for installing the LSI 11 is provided at the center of the second metal plate 12b provided on the upper side of the lead frame 13. Second metal plate 12b
The parts to be wire-bonded are plated, evaporated,
A metal thin film of Ag, Au or Al is formed by a sputtering method or the like, and Ag, Au or Al is formed by a plating method, a vapor deposition method, a sputtering method or the like at a connection portion of the second electrical connection member 1b with the conductor 3. A film is formed. A second electrical connection member 1b for connecting the second metal plate 12b and the lead frame 13 is interposed between the second metal plate 12b and the lead frame 13. The LS is provided at the center of the second electrical connection member 1b.
An opening 10b for installing I11 is provided, and a plurality of conductors 3 are provided so as to contact only the ground (or power) pin of the lead frame 13 to be connected to the second metal plate 12b. There is.
【００１５】図６に、第１の電気的接続部材1bを用いた
リードフレーム13と第２の金属板12b との接合例を示
す。リードフレーム13の接地ピンｐ2(または電源ピンｐ
1)と同じ大きさ（幅）の導電体３を有する電気的接続部
材を用いても良いが、導電体３の位置合わせを容易にす
るために、小さな導電体３を多数配置させた電気的接続
部材を使用しても良い。使用する第１の電気的接続部材
1bにおける導電体３の寸法，配置パターンなどは、リー
ドフレーム13の寸法，形状，接地ピンｐ2(または電源ピ
ンｐ1)の位置によって決定される。なお、第２の電気的
接続部材1aを用いたリードフレーム13と第１の金属板12
a との接合例もこれと同様である。FIG. 6 shows an example of joining the lead frame 13 and the second metal plate 12b using the first electrical connection member 1b. Ground pin p2 (or power pin p of lead frame 13)
Although an electrical connecting member having the conductor 3 having the same size (width) as 1) may be used, an electrical connection member in which a large number of small conductors 3 are arranged to facilitate the alignment of the conductors 3 is used. You may use a connection member. First electrical connection member used
The size and arrangement pattern of the conductor 3 in 1b are determined by the size and shape of the lead frame 13 and the position of the ground pin p2 (or the power pin p1). The lead frame 13 and the first metal plate 12 using the second electrical connection member 1a are used.
The example of joining with a is similar to this.
【００１６】第１，第２の金属板12a, 12bとリードフレ
ーム13との位置合わせは、それぞれに設けた位置合わせ
用の貫通孔にピンを差し込んで行うが、ラフな位置合わ
せで十分である。リードフレーム13の電源ピンｐ1 及び
接地ピンｐ2 と第１，第２の電気的接続部材1a, 1bとの
位置合わせは、それぞれに付けられた位置合わせマーク
を用いて行う。更に、目視にて確認したい場合には、図
７に示すように、例えば第２の金属板12b に金属突起部
21を設けることによって、容易に位置合わせを調節でき
る。なお、図７に示すように、辺縁部全域に導電体３を
設けた第２の電気的接続部材1b（または第１の電気的接
続部材1a）を使用すれば、位置合わせの自由度は更に向
上する。この例は、第２の金属板12b の金属突起部21に
接続した導電体３のみがリードフレーム13との電気的接
続を行うというものである。The first and second metal plates 12a, 12b and the lead frame 13 are aligned by inserting pins into the through holes provided for alignment, respectively, but rough alignment is sufficient. . The power source pin p1 and the ground pin p2 of the lead frame 13 and the first and second electrical connecting members 1a and 1b are aligned with each other by using alignment marks attached to them. Further, when it is desired to visually confirm, as shown in FIG. 7, for example, a metal protrusion is formed on the second metal plate 12b.
By providing 21, the alignment can be easily adjusted. As shown in FIG. 7, if the second electrical connection member 1b (or the first electrical connection member 1a) having the conductors 3 provided on the entire edge portion is used, the degree of freedom of alignment can be increased. Further improve. In this example, only the conductor 3 connected to the metal projection 21 of the second metal plate 12b is electrically connected to the lead frame 13.
【００１７】位置合わせを終了した後に、これらのリー
ドフレーム13と第１，第２の電気的接続部材1a, 1bと第
１，第２の金属板12a, 12bとを一体的に接合する。この
際の接合方法には、熱圧着法，超音波併用熱圧着法，電
気抵抗溶接法などを利用する。また、これらの接合形態
は、全リードに対して一括に行う一括接合法，各リード
について１本ずつ行うシングルポイント接合法の何れで
もよい。第１，第２の金属板12a, 12bに金属突起部21を
設けない場合には、熱圧着法による一括接合が一般的で
あり、第１，第２の金属板12a, 12bに金属突起部21を設
ける場合には、熱圧着法によるシングルポイント接合が
一般的である。After the alignment is completed, the lead frame 13, the first and second electrical connecting members 1a and 1b, and the first and second metal plates 12a and 12b are integrally joined. As a joining method at this time, a thermocompression bonding method, an ultrasonic combined thermocompression bonding method, an electric resistance welding method, or the like is used. Further, these joining forms may be either a collective joining method which is performed collectively for all leads or a single point joining method which is performed one for each lead. When the metal protrusions 21 are not provided on the first and second metal plates 12a and 12b, collective bonding by a thermocompression bonding method is generally used, and the metal protrusions are formed on the first and second metal plates 12a and 12b. When 21 is provided, single point joining by a thermocompression bonding method is generally used.
【００１８】なお、接合性を高めるために、第１，第２
の電気的接続部材1a, 1bの保持体２の表面に接着剤、及
び／またはリードフレーム13，第１，第２の金属板12a,
12bの表面に接着剤を塗布するようにしてもよい。但
し、この接着剤はエレクトロマイグレーションを誘発す
るおそれがあるので、導電体３の接合力にて十分な電気
的接続が得られる場合には、接着剤を塗布しない方がよ
い。In order to improve the bondability, the first, second
On the surface of the holding body 2 of the electrical connection members 1a, 1b, and / or the lead frame 13, the first and second metal plates 12a,
An adhesive may be applied to the surface of 12b. However, since this adhesive may induce electromigration, it is better not to apply the adhesive when a sufficient electric connection can be obtained by the bonding force of the conductor 3.
【００１９】なお、上述の実施例において、リードフレ
ーム13と第１，第２の金属板12a, 12bとをＣｕまたはＣ
ｕ合金製とし、第１，第２の電気的接続部材1a, 1bとの
接続部分にはＡｇ，ＡｕまたはＡｌ膜を形成している
が、この場合に、Ａｇ，ＡｕまたはＡｌへのＣｕの拡散
を防止するために、中間層としてＮｉまたはＭｏ層を設
けるようにしてもよい。また、ＣｕまたはＣｕ合金は最
も電気的特性は優れるが、リードフレーム13と第１，第
２の金属板12a, 12bとをＦｅ−42％Ｎｉ合金製としても
よい。更に、上述の実施例では導電体３の全部がＡｕか
らなるが、その接合部にのみハンダを被せた構成として
もよい。このような場合には、接合方法としてハンダリ
フローが用いられる。In the above embodiment, the lead frame 13 and the first and second metal plates 12a and 12b are made of Cu or C.
It is made of a u alloy, and an Ag, Au or Al film is formed in the connection portion with the first and second electrical connection members 1a, 1b. In this case, Cu to Ag, Au or Al is formed. To prevent diffusion, a Ni or Mo layer may be provided as an intermediate layer. Although Cu or Cu alloy has the most excellent electrical characteristics, the lead frame 13 and the first and second metal plates 12a and 12b may be made of Fe-42% Ni alloy. Further, although the conductor 3 is entirely made of Au in the above-mentioned embodiment, the joint may be covered with solder only. In such a case, solder reflow is used as the joining method.
【００２０】なお、上述の実施例では、リードフレーム
13及び第１，第２の金属板12a, 12bの電気的接続部分に
のみＡｇ，ＡｕまたはＡｌ膜が形成されているが、それ
らの全表面にメッキ，蒸着，スパッタリング法等によっ
てＡｕ膜を形成するようにしてもよい。In the above embodiment, the lead frame
The Ag, Au, or Al film is formed only on the electrically connecting portions of 13 and the first and second metal plates 12a, 12b, but the Au film is formed on the entire surface thereof by plating, vapor deposition, sputtering, or the like. You may do it.
【００２１】従来の多層リードフレームでは、金属板間
を絶縁するために絶縁テープを必要とし、またリードフ
レームと金属板とを接続するために金属突起部を必要と
し、しかも金属板の折り曲げ加工処理が必要である。と
ころが、本実施例にあっては、絶縁材からなる保持体２
と保持体２から両端部が露出している接続用の導電体３
とから構成される電気的接続部材１を用いることによっ
て、折り曲げ工程は不要となり、容易に多層リードフレ
ームを製造でき、狭ピッチ，多ピン化を実現できる。In the conventional multi-layer lead frame, an insulating tape is required to insulate the metal plates from each other, a metal projection is required to connect the lead frame and the metal plates, and the metal plate is bent. is necessary. However, in this embodiment, the holder 2 made of an insulating material is used.
And a conductor 3 for connection, both ends of which are exposed from the holder 2.
By using the electrical connection member 1 composed of (1) and (2), the bending step is unnecessary, the multilayer lead frame can be easily manufactured, and the narrow pitch and the increased number of pins can be realized.
【００２２】また、従来のようなスポット抵抗溶接を用
いなくても接合が可能であるので、この点からも狭ピッ
チ，多ピン化を推進させることが可能である。Further, since the joining can be performed without using the conventional spot resistance welding, it is possible to promote the narrow pitch and the increase in the number of pins also from this point.
【００２３】さらに、信号線であるリードフレーム13を
電源層, 接地層の２枚の金属板12a,12bにて挟む構成に
なっているので、電気的雑音の低減化を図ることができ
る。また、これらの上下の金属板12a, 12bは放熱板とし
ての役割を果たすことになり、ＬＳＩ11からの熱を放散
する機能が高い。Further, since the lead frame 13 which is a signal line is sandwiched between the two metal plates 12a and 12b of the power supply layer and the ground layer, electrical noise can be reduced. Further, the upper and lower metal plates 12a and 12b serve as heat dissipation plates, and have a high function of dissipating heat from the LSI 11.
【００２４】従来の多層リードフレームでは、前述した
ように、リードピッチは0.5 mmが限界であり、リード数
は最大200 ピンであったが、本実施例の多層リードフレ
ームでは、リードピッチを0.1 mm程度まで狭小化でき、
リード数も最大600 ピン程度まで増大できる。As described above, in the conventional multilayer lead frame, the lead pitch is limited to 0.5 mm and the maximum number of leads is 200 pins. However, in the multilayer lead frame of this embodiment, the lead pitch is 0.1 mm. Can be narrowed to a certain degree,
The number of leads can be increased up to about 600 pins.
【００２５】図８は、本発明の変形例における多層リー
ドフレームの断面図、図９はこの実施例における多層リ
ードフレームの構成部材を示す斜視図である。図８に示
す実施例の多層リードフレームは、ＬＳＩ11を載置する
電源層（または接地層）となる平板状のＣｕまたはＣｕ
合金製の第１の金属板12a と、絶縁テープ15と、接地層
（または電源層）となる平板状のＣｕまたはＣｕ合金製
の第２の金属板12b と、図１，２に示す構成をなす電気
的接続部材１と、信号線，電源線および接続線からなる
ＱＦＰ用の一般的なＣｕまたはＣｕ合金製のリードフレ
ーム13とを、下方から順に積層した構成をなす。絶縁テ
ープ15，第２の金属板12b 及び電気的接続部材１の各中
央部にはＬＳＩ11を設置するための開口部が設けられ、
また、第１，第２の金属板12a, 12bには金属突起部21a,
21bが形成されている。リードフレーム13と第１の金属
板12a の金属突起部21a 、リードフレーム13と第２の金
属板12b の金属突起部21b とは、電気的接続部材１の導
電体３を介して電気的に接続されている。但し、本実施
例では、第１の金属板12a の金属突起部21a の折り曲げ
加工を必要とする。第１の金属板12a に載置されたＬＳ
Ｉ11と、第１の金属板12a ，リードフレーム13及び第２
の金属板12b とはＡｕまたはＡｌからなるワイヤ14, 1
4, 14にてボンディング接続されている。なお、この実
施例における他の構成、位置合わせ、接合動作などは、
前述した実施例（図３，４相当）に準じるので、その説
明は省略する。FIG. 8 is a cross-sectional view of a multi-layer lead frame according to a modification of the present invention, and FIG. 9 is a perspective view showing constituent members of the multi-layer lead frame according to this embodiment. The multilayer lead frame of the embodiment shown in FIG. 8 is a flat plate-shaped Cu or Cu serving as a power supply layer (or ground layer) on which the LSI 11 is mounted.
The first metal plate 12a made of an alloy, the insulating tape 15, the second metal plate 12b made of a flat plate of Cu or Cu alloy to be the ground layer (or the power supply layer), and the configuration shown in FIGS. The electrical connection member 1 and the general lead frame 13 made of Cu or Cu alloy for QFP, which is composed of a signal line, a power supply line and a connection line, are laminated in this order from the bottom. The insulating tape 15, the second metal plate 12b, and the electrical connection member 1 are provided at their respective central portions with openings for installing the LSI 11.
In addition, the first and second metal plates 12a and 12b have metal projections 21a,
21b is formed. The lead frame 13 and the metal protrusion 21a of the first metal plate 12a, and the lead frame 13 and the metal protrusion 21b of the second metal plate 12b are electrically connected via the conductor 3 of the electrical connection member 1. Has been done. However, in this embodiment, it is necessary to bend the metal projection 21a of the first metal plate 12a. The LS mounted on the first metal plate 12a
I11, the first metal plate 12a, the lead frame 13 and the second
The metal plate 12b of is a wire made of Au or Al 14, 1
Bonding connection at 4, 14. Other configurations, alignment, joining operation, etc. in this embodiment are as follows.
Since it is based on the above-described embodiment (corresponding to FIGS. 3 and 4), its explanation is omitted.
【００２６】[0026]
【発明の効果】以上のように、本発明の多層リードフレ
ームでは、絶縁性の保持体から両端部を露出させた複数
の導電体を備えた電気的接続部材を用いて、リードフレ
ームと金属板とを接続するように構成したので、従来例
に比べて、狭ピッチ，多ピン化を実現することができ
る。また、リードフレームを２枚の金属板にて挟む構成
にしたので、従来例に比べて、電気的雑音の低減化な
ど、電気特性の改善を図ることができる。As described above, in the multi-layered lead frame of the present invention, the lead frame and the metal plate are formed by using the electrical connecting member having a plurality of conductors whose both ends are exposed from the insulating holder. Since they are connected to each other, it is possible to realize a narrower pitch and a larger number of pins than the conventional example. Further, since the lead frame is sandwiched between two metal plates, it is possible to improve electrical characteristics such as reduction of electrical noise as compared with the conventional example.
【図１】本発明の多層リードフレームに使用する電気的
接続部材の平面図である。FIG. 1 is a plan view of an electrical connecting member used in the multilayer lead frame of the present invention.
【図２】本発明の多層リードフレームに使用する電気的
接続部材の断面図である。FIG. 2 is a cross-sectional view of an electrical connecting member used in the multilayer lead frame of the present invention.
【図３】本発明の多層リードフレームの断面図である。FIG. 3 is a cross-sectional view of the multilayer lead frame of the present invention.
【図４】本発明の多層リードフレームの構成部材を示す
斜視図である。FIG. 4 is a perspective view showing constituent members of the multilayer lead frame of the present invention.
【図５】ＱＦＰにおけるリードフレームの電源ピンと接
地ピンとの配置例を示す平面図である。FIG. 5 is a plan view showing an arrangement example of power supply pins and ground pins of a lead frame in QFP.
【図６】電気的接続部材を用いたリードフレームと金属
板との接合例を示す断面図である。FIG. 6 is a cross-sectional view showing an example of joining a lead frame and a metal plate using an electrical connecting member.
【図７】電気的接続部材及び金属板の他の実施例を示す
斜視図である。FIG. 7 is a perspective view showing another embodiment of the electrical connection member and the metal plate.
【図８】本発明の変形例の多層リードフレームの断面図
である。FIG. 8 is a cross-sectional view of a multilayer lead frame of a modified example of the present invention.
【図９】本発明の変形例の多層リードフレームの構成部
材を示す斜視図である。FIG. 9 is a perspective view showing constituent members of a multilayer lead frame of a modified example of the invention.
【図１０】従来の多層リードフレームの断面図である。FIG. 10 is a cross-sectional view of a conventional multilayer lead frame.
１ 電気的接続部材 ２ 保持体 2a 貫通孔 ３ 導電体 1a 第１の電気的接続部材 1b 第２の電気的接続部材 11 ＬＳＩ 12a 第１の金属板 12b 第２の金属板 13 リードフレーム 14 ワイヤ 1 Electrical Connection Member 2 Holder 2a Through Hole 3 Conductor 1a First Electrical Connection Member 1b Second Electrical Connection Member 11 LSI 12a First Metal Plate 12b Second Metal Plate 13 Lead Frame 14 Wire
Claims (1)
体に形成された貫通孔にその両端部を前記保持体の両面
から露出させて導電体を埋設した構成をなし、前記リー
ドフレームの片面または両面にその一方の露出部を接し
て配設された１または２枚の電気的接続部材と、該電気
的接続部材の他方の露出部に接する平面状の１または２
枚の金属板とを有し、前記リードフレームと前記金属板
とが前記電気的接続部材により電気的に接続されて構成
されていることを特徴とする多層リードフレーム。1. A lead frame and a through hole formed in a holding member made of an insulating material, both ends of which are exposed from both sides of the holding member, and a conductor is embedded in the through hole formed on one side of the lead frame. One or two electrical connecting members arranged so as to contact one of the exposed portions on both sides, and a planar one or two that contacts the other exposed portion of the electrical connecting member.
A multi-layered lead frame, comprising: a single metal plate, wherein the lead frame and the metal plate are electrically connected by the electrical connecting member.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27527992A JPH06104369A (en) | 1992-09-19 | 1992-09-19 | Multilayer lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27527992A JPH06104369A (en) | 1992-09-19 | 1992-09-19 | Multilayer lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06104369A true JPH06104369A (en) | 1994-04-15 |
Family
ID=17553215
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27527992A Pending JPH06104369A (en) | 1992-09-19 | 1992-09-19 | Multilayer lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06104369A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5767570A (en) * | 1993-03-18 | 1998-06-16 | Lsi Logic Corporation | Semiconductor packages for high I/O semiconductor dies |
| US5818102A (en) * | 1995-12-29 | 1998-10-06 | Lsi Logic Corporation | System having integrated circuit package with lead frame having internal power and ground busses |
| US5864173A (en) * | 1995-04-05 | 1999-01-26 | National Semiconductor Corporation | Multi-layer lead frame |
| KR100708040B1 (en) * | 2001-04-20 | 2007-04-16 | 앰코 테크놀로지 코리아 주식회사 | Circuit tape and semiconductor package using it and its manufacturing method |
| CN111864050A (en) * | 2020-04-16 | 2020-10-30 | 诺思(天津)微***有限责任公司 | Semiconductor device, semiconductor module, and electronic apparatus |
| JP2021082638A (en) * | 2019-11-15 | 2021-05-27 | 新光電気工業株式会社 | Wiring board, electronic device, and manufacturing method of wiring board |
-
1992
- 1992-09-19 JP JP27527992A patent/JPH06104369A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5767570A (en) * | 1993-03-18 | 1998-06-16 | Lsi Logic Corporation | Semiconductor packages for high I/O semiconductor dies |
| US5864173A (en) * | 1995-04-05 | 1999-01-26 | National Semiconductor Corporation | Multi-layer lead frame |
| US5994768A (en) * | 1995-04-05 | 1999-11-30 | National Semiconductor Corporation | Multi-layer lead frame |
| US6087204A (en) * | 1995-04-05 | 2000-07-11 | National Semiconductor Corporation | Method of making a multi-layer lead frame |
| US5818102A (en) * | 1995-12-29 | 1998-10-06 | Lsi Logic Corporation | System having integrated circuit package with lead frame having internal power and ground busses |
| KR100708040B1 (en) * | 2001-04-20 | 2007-04-16 | 앰코 테크놀로지 코리아 주식회사 | Circuit tape and semiconductor package using it and its manufacturing method |
| JP2021082638A (en) * | 2019-11-15 | 2021-05-27 | 新光電気工業株式会社 | Wiring board, electronic device, and manufacturing method of wiring board |
| CN111864050A (en) * | 2020-04-16 | 2020-10-30 | 诺思(天津)微***有限责任公司 | Semiconductor device, semiconductor module, and electronic apparatus |
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