JPH0582567A - Structure for mounting electronic part - Google Patents

Structure for mounting electronic part

Info

Publication number
JPH0582567A
JPH0582567A JP24389791A JP24389791A JPH0582567A JP H0582567 A JPH0582567 A JP H0582567A JP 24389791 A JP24389791 A JP 24389791A JP 24389791 A JP24389791 A JP 24389791A JP H0582567 A JPH0582567 A JP H0582567A
Authority
JP
Japan
Prior art keywords
lsi
tab
substrate
sealing resin
cap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24389791A
Other languages
Japanese (ja)
Inventor
Fumio Mori
史男 森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24389791A priority Critical patent/JPH0582567A/en
Publication of JPH0582567A publication Critical patent/JPH0582567A/en
Pending legal-status Critical Current

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  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:Not only to enable the connecting lead terminal of a TAB-LSI to be protected against deformation and enhanced in heat dissipating properties but also to protect the TAB-LSI against failure. CONSTITUTION:A hole 2 is provided to the center of a substrate 1 of ceramic or the like, a TAB-LSI 6 die-bonded to the substrate 1 is sealed up with a cap 8, and a sealing resin 11 is filled between the substrate 1 and the TAB-LSI 6 to hermetically seal up the hole 2 provided to the substrate 1. When a TAB- LSI is die-bonded, sealing resin is injected and a pressure is applied onto the TAB-LSI 6, whereby the TAB-LSI is completely die-bonded, and all the circuit surface of the TAB-LSI is covered with sealing resin.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子部品の実装構造に
係り、特にTAB(Tape Automated B
onding)方式で組み立てられたLSIの実装構造
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure for electronic parts, and more particularly to a TAB (Tape Automated B).
The present invention relates to a mounting structure of an LSI assembled by an on-dose method.

【0002】[0002]

【従来の技術】従来、この種の電子部品の実装構造は、
図2に示すようにセラミックス又はPWD(Print
ed Wiring Boards)等の基板21と、
この基板21の接続用パッド22に接続用リード端子2
3を介して接続されるTAB−LSI24をその放熱と
絶縁を目的として、良熱伝導性接着剤2でダイ・ボンデ
ィングして気密に封止した絶縁性の高いキャップ26と
を備えている。
2. Description of the Related Art Conventionally, the mounting structure of this type of electronic component is
As shown in FIG. 2, ceramics or PWD (Print
a substrate 21 such as ed Wiring Boards),
The connection lead terminals 2 are connected to the connection pads 22 of the substrate 21.
A TAB-LSI 24 connected via 3 is provided with a highly insulating cap 26 which is hermetically sealed by die bonding with a good thermal conductive adhesive 2 for the purpose of heat dissipation and insulation.

【0003】図2において27は基板21上面に設けら
れた接続用リングで、キャップ26が接合されるもので
ある。又、28は基板21の内部配線で、基板21上面
の接続用パッド22と裏面の接続用バンプ29とを電気
的に導通している。
In FIG. 2, reference numeral 27 denotes a connecting ring provided on the upper surface of the substrate 21, to which the cap 26 is joined. Further, 28 is an internal wiring of the substrate 21, which electrically connects the connection pad 22 on the upper surface of the substrate 21 and the connection bump 29 on the back surface.

【0004】上記TAB−LSIの実装構造において、
TAB−LSI24から発生する熱は、キャップ26を
通して放熱されるものである。
In the above-mentioned TAB-LSI mounting structure,
The heat generated from the TAB-LSI 24 is radiated through the cap 26.

【0005】[0005]

【発明が解決しようとする課題】この従来の電子部品の
実装構造では、封止用のキャップを封着する際に、TA
B−LSIを上方より押しながらダイ・ボンディングす
るため、TAB−LSIの接続用リード端子が、図3に
示すように変形してしまう問題があった。
In this conventional mounting structure for electronic parts, when the cap for sealing is sealed, the TA
Since the die bonding is performed while pushing the B-LSI from above, there is a problem that the connecting lead terminals of the TAB-LSI are deformed as shown in FIG.

【0006】又、上方より押す力によって、TAB−L
SIが下方に下がってしまい、TAB−LSIとキャッ
プの密着が十分に行われず、十分な放熱が行われないこ
とがある問題があった。
[0006] Further, the TAB-L is pushed by the pushing force from above.
There is a problem that the SI drops downward, the TAB-LSI and the cap are not sufficiently adhered, and sufficient heat is not released.

【0007】更に基材にセラミックス等の材料を使用す
る際は、その材料から発生されるα線等により、TAB
−LSIが動作不良を起こす問題があった。
Further, when a material such as ceramics is used as the base material, the TAB is generated by the α rays or the like generated from the material.
-There was a problem that the LSI malfunctioned.

【0008】そこで、本発明は、TAB−LSIの接続
用リード端子が変形することがないと共に、放熱が十分
に行われ、かつTAB−LSIが動作不良を起こすこと
のない電子部品の実装構造の提供を目的とする。
Therefore, the present invention provides a mounting structure of an electronic component in which the connecting lead terminals of the TAB-LSI are not deformed, heat is sufficiently dissipated, and the TAB-LSI does not malfunction. For the purpose of provision.

【0009】[0009]

【課題を解決するための手段】本発明の電子部品の実装
構造は、中央部分に穴を設けたセラミックス等からなる
基板と、この基板に接続されるTAB−LSIをダイ・
ボンディングして封止したキャップと、前記基板とTA
B−LSIとの間に基板の穴を密閉するように充填され
た封止樹脂とを備えている。
The electronic component mounting structure of the present invention comprises a substrate made of ceramics or the like having a hole in the center thereof, and a TAB-LSI connected to the substrate.
Bonded and sealed cap, the substrate and TA
A sealing resin filled so as to seal the hole of the substrate between the B-LSI and the B-LSI.

【0010】封止樹脂は、硬化前において所要の粘性を
有していることが好ましい。
The sealing resin preferably has a required viscosity before being cured.

【0011】又、封止樹脂は、透明であることが好まし
い。
Further, the sealing resin is preferably transparent.

【0012】[0012]

【作用】上記手段においては、TAB−LSIのダイ・
ボンディング時に封止樹脂を注入して、TAB−LSI
に圧力を加えることにより、TAB−LSIのダイ・ボ
ンディングが完全に行われ、かつTAB−LSIの回路
面全体が封止樹脂によってカバーされる。
In the above means, the TAB-LSI die
Injection of sealing resin at the time of bonding, TAB-LSI
By applying pressure to the TAB-LSI, the die-bonding of the TAB-LSI is completed, and the entire circuit surface of the TAB-LSI is covered with the sealing resin.

【0013】封止樹脂が硬化前において所要の粘性を有
していることにより、TAB−LSIに加える圧力がコ
ントロールされる。
Since the sealing resin has a required viscosity before being cured, the pressure applied to the TAB-LSI is controlled.

【0014】又、封止樹脂が透明であることにより、T
AB−LSIの回路面の観察が外部より行うことが可能
となる。
Further, since the sealing resin is transparent, T
It becomes possible to observe the circuit surface of the AB-LSI from the outside.

【0015】[0015]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments of the present invention will now be described with reference to the drawings.

【0016】図1は本発明の一実施例の電子部品の実装
構造の縦断面図である。
FIG. 1 is a vertical cross-sectional view of a mounting structure for electronic components according to an embodiment of the present invention.

【0017】セラミックス又はPWB等からなる基板1
は、中央部分に穴2を設けてあると共に上面の接続用パ
ッド3と裏面の接続用バンプ4とを内部配線5により接
続している。基板1上面には、回路面を下向きのフェー
スダウンとしたTAB−LSI6が、接続用リード端子
7を接続用パッド3にはんだ付け、あるいは熱圧着、又
は超音波ボンディング等の方法により接続してマウント
されている。TAB−LSI6の接続用リード端子7
は、上記接続方法とするため、はんだメッキリード、錫
メッキリード、又は金メッキリード等のメッキが施され
ている。
Substrate 1 made of ceramics or PWB
Has a hole 2 in the central portion, and connects the connection pad 3 on the upper surface and the connection bump 4 on the back surface with the internal wiring 5. On the upper surface of the substrate 1, a TAB-LSI 6 having a circuit face facing down is mounted by connecting a connecting lead terminal 7 to a connecting pad 3 by a method such as soldering, thermocompression bonding, or ultrasonic bonding. Has been done. Lead terminal 7 for connection of TAB-LSI 6
In order to use the above-mentioned connection method, a plating such as a solder-plated lead, a tin-plated lead, or a gold-plated lead is applied.

【0018】TAB−LSI6は、その上面と絶縁性の
高いキャップ8の内面との間に介在した良熱伝導性の接
着剤9によりキャップ8にダイ・ボンディングされてお
り、キャップ8はその周縁を基板1上面に設けた接続用
リング5とはんだ付け、溶接又はロー付け等の方法によ
り接合し、基板1に封着されている。そして、基板1と
TAB−LSI6との間には、硬化前において所要の粘
性を有する透明な封止樹脂11が基板1の穴2を密閉す
るように充填されている。
The TAB-LSI 6 is die-bonded to the cap 8 with an adhesive 9 having good heat conductivity interposed between the upper surface of the TAB-LSI 6 and the inner surface of the cap 8 having high insulation properties. It is joined to the connecting ring 5 provided on the upper surface of the substrate 1 by a method such as soldering, welding or brazing, and is sealed to the substrate 1. Then, a space between the substrate 1 and the TAB-LSI 6 is filled with a transparent sealing resin 11 having a required viscosity before curing so as to seal the hole 2 of the substrate 1.

【0019】上記TAB−LSI6のダイ・ボンディン
グに際しては、適量の接着剤9をTAB−LSI6又は
キャップ8の内面に均一に塗布し、キャップ8をTAB
−LSI6に被せてこれに上方から圧力を加え、TAB
−LSI6とキャップ8の間の接着剤9をなじませるよ
うにして接着すると同時に、基板1の穴2から封止樹脂
11を注入し、TAB−LSI6に下方から圧力を加
え、さらに強くTAB−LSI6とキャップ8とが圧着
されて接着剤9が十分に広がるようにする。この封止樹
脂11の粘性は、TAB−LSI6の接続用リード端子
7が変形しないように、TAB−LSI6に下方から加
える圧力をコントロールできる程度のものである。又、
封止樹脂11の注入量は、図1に示すようにTAB−L
SI6の接続用リード端子7によって包絡される領域内
までとするか、キャップ8内全領域までとするかは、T
AB−LSI6に対する封止樹脂11の影響、又はこの
後のキャップ8の封差工程への影響により、適量が選択
される。
At the time of die bonding of the TAB-LSI 6, the appropriate amount of adhesive 9 is uniformly applied to the inner surface of the TAB-LSI 6 or the cap 8, and the cap 8 is attached to the TAB.
-Cover the LSI6 and apply pressure from above to TAB,
-At the same time as bonding the adhesive 9 between the LSI 6 and the cap 8 so that the adhesive 9 fits in, the sealing resin 11 is injected from the hole 2 of the substrate 1 and pressure is applied to the TAB-LSI 6 from below to make the TAB-LSI 6 stronger. And the cap 8 are pressure-bonded to each other so that the adhesive 9 spreads sufficiently. The viscosity of the sealing resin 11 is such that the pressure applied from below to the TAB-LSI 6 can be controlled so that the connecting lead terminals 7 of the TAB-LSI 6 are not deformed. or,
As shown in FIG. 1, the injection amount of the sealing resin 11 is TAB-L.
Whether it is within the area enveloped by the connecting lead terminals 7 of SI6 or within the entire area of the cap 8 is T
An appropriate amount is selected depending on the effect of the sealing resin 11 on the AB-LSI 6 or the subsequent sealing process of the cap 8.

【0020】又、キャップ8の封着に際しては、キャッ
プ8に上方から圧力を加え、内部に封入された封止樹脂
11の必要な量を押し出しながら行う。そして、キャッ
プ8の封着後、基板1の穴2からはみ出た封止樹脂11
の余分な部分を取り除き、封止樹脂11を硬化処理す
る。封止樹脂11の硬化処理は、封止樹脂11の種類に
より、熱硬化、自然硬化又は紫外線硬化処理等が施さ
れ、封止樹脂11の硬化によって、電子部品が完成す
る。
When the cap 8 is sealed, pressure is applied to the cap 8 from above, and a necessary amount of the sealing resin 11 sealed inside is pushed out. Then, after sealing the cap 8, the sealing resin 11 protruding from the hole 2 of the substrate 1
The excess portion of is removed and the sealing resin 11 is cured. The encapsulating resin 11 is cured by heat curing, natural curing, ultraviolet curing, or the like depending on the type of the encapsulating resin 11, and the electronic component is completed by curing the encapsulating resin 11.

【0021】[0021]

【発明の効果】以上説明したように本発明によれば、T
AB−LSIのダイ・ボンディング時に封止樹脂を注入
してTAB−LSIに圧力を加えることにより、TAB
−LSIのダイ・ボンディングが完全に行われるので、
TAB−LSIの接続用リード端子が変形することがな
いと共に、TAB−LSIの放熱をキャップを介して、
効率よく行うことができる。
As described above, according to the present invention, T
By injecting the sealing resin and applying pressure to the TAB-LSI during die bonding of the AB-LSI,
-Since the die bonding of the LSI is completed,
The connecting lead terminals of the TAB-LSI will not be deformed, and the heat dissipation of the TAB-LSI will be transferred through the cap.
It can be done efficiently.

【0022】又、TAB−LSIの回路面全体が封止樹
脂によってカバーされるので、基板材料等から発生され
るα線等を吸収することができ、TAB−LSIの動作
不良の発生を防止できると共に、TAB−LSIの放熱
を封止樹脂を介して効率良く行うことができ、上記キャ
ップを介した放熱と相俟ってTAB−LSIの放熱を十
分に行うことができる。
Further, since the entire circuit surface of the TAB-LSI is covered with the sealing resin, it is possible to absorb the α rays and the like generated from the substrate material and the like, and prevent the occurrence of malfunction of the TAB-LSI. At the same time, the heat dissipation of the TAB-LSI can be efficiently performed through the sealing resin, and the heat dissipation of the TAB-LSI can be sufficiently performed in combination with the heat dissipation through the cap.

【0023】一方、封止樹脂が硬化前において所要の粘
性を有していることにより、TAB−LSIに加える圧
力をコントロールできる。
On the other hand, since the sealing resin has the required viscosity before being cured, the pressure applied to the TAB-LSI can be controlled.

【0024】又、封止樹脂が透明であることにより、T
AB−LSIの回路面の観察が外部より行うことが可能
となり、解析等を行いやすいという効果を有する。
Further, since the sealing resin is transparent, T
It is possible to observe the circuit surface of the AB-LSI from the outside, and it is easy to perform analysis and the like.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の電子部品の実装構造の縦断
面図である。
FIG. 1 is a vertical sectional view of a mounting structure for an electronic component according to an embodiment of the present invention.

【図2】従来の電子部品の実装構造の縦断面図である。FIG. 2 is a vertical cross-sectional view of a conventional electronic component mounting structure.

【図3】図2の部分拡大図である。FIG. 3 is a partially enlarged view of FIG.

【符号の説明】[Explanation of symbols]

1 基板 2 穴 6 TAB−LSI 8 キャップ 11 封止樹脂 1 substrate 2 hole 6 TAB-LSI 8 cap 11 sealing resin

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】中央部分に穴を設けたセラミックス等から
なる基板と、この基板に接続されるTAB−LSIをダ
イ・ボンディングして封止したキャップと、前記基板と
TAB−LSIとの間に基板の穴を密閉するように充填
された封止樹脂とを備えることを特徴とする電子部品の
実装構造。
1. A substrate made of ceramics or the like having a hole in its central portion, a cap formed by die bonding a TAB-LSI connected to this substrate and sealed, and between the substrate and the TAB-LSI. A mounting structure for an electronic component, comprising: a sealing resin filled so as to seal a hole of a substrate.
【請求項2】請求項1記載の電子部品の実装構造におい
て、前記封止樹脂が硬化前において所要の粘性を有して
いることを特徴とする電子部品の実装構造。
2. The electronic component mounting structure according to claim 1, wherein the sealing resin has a required viscosity before being cured.
【請求項3】請求項1又は2記載の電子部品の実装構造
において、前記封止樹脂が透明であることを特徴とする
電子部品の実装構造。
3. The mounting structure for an electronic component according to claim 1 or 2, wherein the sealing resin is transparent.
JP24389791A 1991-09-25 1991-09-25 Structure for mounting electronic part Pending JPH0582567A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24389791A JPH0582567A (en) 1991-09-25 1991-09-25 Structure for mounting electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24389791A JPH0582567A (en) 1991-09-25 1991-09-25 Structure for mounting electronic part

Publications (1)

Publication Number Publication Date
JPH0582567A true JPH0582567A (en) 1993-04-02

Family

ID=17110629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24389791A Pending JPH0582567A (en) 1991-09-25 1991-09-25 Structure for mounting electronic part

Country Status (1)

Country Link
JP (1) JPH0582567A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6404049B1 (en) 1995-11-28 2002-06-11 Hitachi, Ltd. Semiconductor device, manufacturing method thereof and mounting board
US7193306B2 (en) 1998-08-28 2007-03-20 Micron Technology, Inc. Semiconductor structure having stacked semiconductor devices

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6404049B1 (en) 1995-11-28 2002-06-11 Hitachi, Ltd. Semiconductor device, manufacturing method thereof and mounting board
US6563212B2 (en) 1995-11-28 2003-05-13 Hitachi, Ltd. Semiconductor device
US6621160B2 (en) 1995-11-28 2003-09-16 Hitachi, Ltd. Semiconductor device and mounting board
US7193306B2 (en) 1998-08-28 2007-03-20 Micron Technology, Inc. Semiconductor structure having stacked semiconductor devices

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