JPH0575272A - Manufacture of printed-wiring board - Google Patents
Manufacture of printed-wiring boardInfo
- Publication number
- JPH0575272A JPH0575272A JP3232713A JP23271391A JPH0575272A JP H0575272 A JPH0575272 A JP H0575272A JP 3232713 A JP3232713 A JP 3232713A JP 23271391 A JP23271391 A JP 23271391A JP H0575272 A JPH0575272 A JP H0575272A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- mounting
- conduction hole
- resin
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は印刷配線板の製造方法に
関し、特に表面実装部品搭載による高密度対応が可能な
印刷配線板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board capable of high density mounting of surface mount components.
【０００２】[0002]
【従来の技術】従来の表面実装部品を搭載する印刷配線
板は、まず図４（ａ）に示すように、表面に表層導通孔
２と内装パターン７を形成した内装基材５と樹脂層６を
重ね積層し積層板１０を形成する。次に、図４（ｂ）に
示すように、積層板１０の表面と貫通孔内面にめっきを
施しめっき層を形成した後、エッチングを行い表層導通
孔２を被覆する実装用パッド１と導通孔３とこれらを接
続する配線パターンを形成する。2. Description of the Related Art First, as shown in FIG. 4 (a), a conventional printed wiring board on which surface-mounted components are mounted has an inner base material 5 and a resin layer 6 each having a surface conductive hole 2 and an inner pattern 7 formed on the surface. Are stacked and laminated to form a laminated plate 10. Next, as shown in FIG. 4B, the surface of the laminated plate 10 and the inner surface of the through hole are plated to form a plated layer, which is then etched to cover the surface layer conductive hole 2 and the mounting pad 1 and the conductive hole. 3 and a wiring pattern for connecting them are formed.
【０００３】このようにして得られた印刷配線板は、図
５に示すように、表面実装部品搭載用の実装パッド１領
域内に導通孔３を設けることにより表裏内面の接続が可
能となり配線パターン４を減らすことができ高密度配線
を実現するとともに、内装基材５に穿孔、めっきを施し
た後樹脂層６を積層した印刷配線板において、表面導通
孔２を設けることにより配線パターン４を短い配線で接
続できるようにしている。In the printed wiring board thus obtained, as shown in FIG. 5, by providing the through hole 3 in the area of the mounting pad 1 for mounting surface mounting components, the front and back inner surfaces can be connected and the wiring pattern can be obtained. 4 can be reduced to realize high-density wiring, and the wiring pattern 4 can be shortened by providing the surface conduction hole 2 in the printed wiring board in which the resin layer 6 is laminated after the interior base material 5 is perforated and plated. It is possible to connect by wiring.
【０００４】[0004]
【発明が解決しようとする課題】従来の表層導通孔を有
する印刷配線板では、積層後の樹脂が表面に突出してい
るため表層導通孔を被覆している実装用パッド表面も突
出した面となり、表面実装部品搭載が不可能となるの
で、この実装用パッドに接続した部品実装用パッドを他
に設けなければならないという問題点があった。In a conventional printed wiring board having surface layer conduction holes, since the resin after lamination protrudes to the surface, the surface of the mounting pad covering the surface layer conduction holes also becomes a protruding surface, Since it becomes impossible to mount the surface mount component, there is a problem that another component mount pad connected to this mount pad must be provided.
【０００５】本発明の目的は、表層導通孔を被覆してい
る実装パッド表面が平坦で直接表面実装部品搭載が可能
な印刷配線板の製造方法を提供することにある。An object of the present invention is to provide a method of manufacturing a printed wiring board in which the surface of the mounting pad covering the surface layer conductive hole is flat and direct surface mounting components can be mounted.
【０００６】[0006]
【課題を解決するための手段】本発明の印刷配線板の製
造方法は、表面実装部品搭載用の実装パッド内に表層導
通孔を有する内層基材と樹脂層を積層し前記表層導通孔
を樹脂材にて孔埋めして積層板を形成する工程と、該積
層板の表面の突出樹脂材を平坦にした後電気めっきを施
し前記表層導通孔を被覆する実装用パッドと該実装用パ
ッドに接続する配線パターンを形成する工程とを含む。According to the method of manufacturing a printed wiring board of the present invention, an inner layer base material having a surface layer conductive hole in a mounting pad for mounting a surface mount component and a resin layer are laminated, and the surface layer conductive hole is made of a resin. A step of filling a hole with a material to form a laminated plate, and a mounting pad for flattening the protruding resin material on the surface of the laminated plate and then electroplating to cover the surface layer conduction hole, and connecting to the mounting pad And a step of forming a wiring pattern.
【０００７】[0007]
【実施例】次に、本発明の実施例について図面を参照し
て説明する。Embodiments of the present invention will now be described with reference to the drawings.
【０００８】図１は、本発明の第１の実施例による印刷
配線板の一部切欠き斜視図、図２（ａ）〜（ｄ）は本発
明の第１の実施例を説明する工程順に示した断面図であ
る。FIG. 1 is a partially cutaway perspective view of a printed wiring board according to a first embodiment of the present invention, and FIGS. 2A to 2D are process steps for explaining the first embodiment of the present invention. It is the sectional view shown.
【０００９】第１の実施例は、図２（ａ）に示すよう
に、まず、内層基材５と樹脂層６を重ね積層し積層板１
０を形成する。このとき、表層導通孔２を有する場合、
表面への樹脂の突出しが生じ突出樹脂材６ｂが形成され
る。このため、図２（ｂ）に示すように、銅箔８と平坦
になるような表面研磨を機械的に行い、平坦樹脂材６ａ
を得る。次に、図２（ｃ）に示すように、電気めっきを
１０〜２０ミクロン程度施し電気めっき層９を形成す
る。次に、図２（ｄ）に示すように、エッチング等によ
り、表層導通孔２を被覆する実装用パッド１を配線パタ
ーンと同時に形成し、図１に示す印刷配線板を得る。In the first embodiment, as shown in FIG. 2A, first, the inner layer base material 5 and the resin layer 6 are laminated and laminated to form a laminated plate 1.
Form 0. At this time, when the surface layer conduction hole 2 is provided,
The resin is projected onto the surface to form the protruding resin material 6b. Therefore, as shown in FIG. 2B, the surface of the copper foil 8 is polished so as to be flat, and the flat resin material 6a
To get Next, as shown in FIG. 2C, electroplating is performed on the order of 10 to 20 microns to form the electroplating layer 9. Next, as shown in FIG. 2D, the mounting pad 1 that covers the surface layer conduction holes 2 is formed simultaneously with the wiring pattern by etching or the like to obtain the printed wiring board shown in FIG.
【００１０】図３（ａ）〜（ｄ）は本発明の第２の実施
例を説明する工程順に示した断面図である。FIGS. 3A to 3D are sectional views showing the second embodiment of the present invention in the order of steps.
【００１１】第２の実施例は、図３（ａ）に示すよう
に、まず、積層工程で表層導通孔２の部位より樹脂流れ
を防止する樹脂流れ止め２０を配置する。次に図３
（ｂ）に示すように、積層して平坦樹脂材６ａを得る。
次に、図３（ｃ）に示すように、電気めっきを１０〜２
０ミクロン程度施し、電気めっき層９を形成する。In the second embodiment, as shown in FIG. 3 (a), first, a resin flow stopper 20 for preventing resin flow from the portion of the surface layer conduction hole 2 in the laminating step is arranged. Next in FIG.
As shown in (b), the flat resin material 6a is obtained by laminating.
Next, as shown in FIG.
The electroplating layer 9 is formed by applying about 0 micron.
【００１２】次に、図３（ｄ）に示すように、エッチン
グ等により、表層導通孔２を被覆する実装用パッド１を
配線パターンと同時に形成し、第２の実施例による印刷
配線板を得る。Next, as shown in FIG. 3D, a mounting pad 1 for covering the surface layer conduction holes 2 is formed simultaneously with the wiring pattern by etching or the like to obtain a printed wiring board according to the second embodiment. .
【００１３】[0013]
【発明の効果】以上説明したように本発明は、表層導通
孔を表面実装部品搭載用の実装用パッド内に配設し、か
つ、平坦な実装用パッド面としたので、表面実装用のペ
ーストはんだによるリフロー時のはんだブリッジ、また
は、表面実装部品のはんだ不着，部品の傾き，浮き等の
はんだ付け不良を防止できる効果がある。As described above, according to the present invention, the surface layer conduction holes are arranged in the mounting pads for mounting surface mounting components, and the surface of the mounting pads is flat, so that the surface mounting paste is used. This has the effect of preventing solder bridges during reflow due to solder, or soldering defects such as non-bonding of surface-mounted components, component inclination, and floating.
【００１４】また、表層導通孔より内層パターンを配線
できるため外層での配線密度及び部品実装密度を増大に
する効果を有する。Further, since the inner layer pattern can be wired from the surface layer conduction hole, there is an effect of increasing the wiring density and the component mounting density in the outer layer.
【図１】本発明の第１の実施例による印刷配線板の一部
切欠き斜視図である。FIG. 1 is a partially cutaway perspective view of a printed wiring board according to a first embodiment of the present invention.
【図２】本発明の第１の実施例を説明する工程順に示し
た断面図である。2A to 2D are cross-sectional views showing a process sequence for explaining the first embodiment of the present invention.
【図３】本発明の第２の実施例を説明する工程順に示し
た断面図である。3A to 3D are cross-sectional views showing a second embodiment of the present invention in the order of steps.
【図４】従来の印刷配線板の製造方法の一例を説明する
工程順に示した断面図である。4A to 4C are cross-sectional views showing an example of a conventional method for manufacturing a printed wiring board in the order of steps for explaining the method.
【図５】従来の印刷配線板の一例の一部切欠き斜視図で
ある。FIG. 5 is a partially cutaway perspective view of an example of a conventional printed wiring board.
【符号の説明】 １ 実装用パッド ２ 表層導通孔 ３ 導通孔 ４ 配線パターン ５ 内装基材 ６ 樹脂層 ６ａ 平坦樹脂材 ６ｂ 突出樹脂材 ７ 内層パターン ８ 銅箔 ９ 電気めっき層 １０ 積層板 ２０ 樹脂流れ止め[Explanation of reference symbols] 1 mounting pad 2 surface layer conduction hole 3 conduction hole 4 wiring pattern 5 interior base material 6 resin layer 6a flat resin material 6b protruding resin material 7 inner layer pattern 8 copper foil 9 electroplating layer 10 laminated plate 20 resin flow Stop
Claims (1)
層導通孔を有する内層基材と樹脂層を積層し前記表層導
通孔を樹脂材にて孔埋めして積層板を形成する工程と、
該積層板の表面の突出樹脂材を平坦にした後電気めっき
を施し前記表層導通孔を被覆する実装用パッドと該実装
用パッドに接続する配線パターンを形成する工程とを含
むことを特徴とする印刷配線板の製造方法。1. A step of laminating an inner layer base material having a surface layer conduction hole in a mounting pad for mounting a surface mounting component and a resin layer, and filling the surface layer conduction hole with a resin material to form a laminated board,
The method further comprises the steps of flattening the protruding resin material on the surface of the laminate and then performing electroplating to form a mounting pad for covering the surface layer conduction hole and a wiring pattern connected to the mounting pad. Manufacturing method of printed wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3232713A JPH0575272A (en) | 1991-09-12 | 1991-09-12 | Manufacture of printed-wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3232713A JPH0575272A (en) | 1991-09-12 | 1991-09-12 | Manufacture of printed-wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0575272A true JPH0575272A (en) | 1993-03-26 |
Family
ID=16943619
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3232713A Pending JPH0575272A (en) | 1991-09-12 | 1991-09-12 | Manufacture of printed-wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0575272A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60148191A (en) * | 1984-01-13 | 1985-08-05 | 日本電気株式会社 | Method of producing thick film thin film hybrid multilayer circuit board |
| JPS63265493A (en) * | 1987-04-23 | 1988-11-01 | Fujitsu Ltd | Multilayer ceramic board |
| JPH02126699A (en) * | 1988-11-07 | 1990-05-15 | Fujitsu Ltd | Manufacture of multilayer circuit board |
| JPH04168794A (en) * | 1990-10-31 | 1992-06-16 | Sharp Corp | Manufacture of multilayer printed-circuit board |
-
1991
- 1991-09-12 JP JP3232713A patent/JPH0575272A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60148191A (en) * | 1984-01-13 | 1985-08-05 | 日本電気株式会社 | Method of producing thick film thin film hybrid multilayer circuit board |
| JPS63265493A (en) * | 1987-04-23 | 1988-11-01 | Fujitsu Ltd | Multilayer ceramic board |
| JPH02126699A (en) * | 1988-11-07 | 1990-05-15 | Fujitsu Ltd | Manufacture of multilayer circuit board |
| JPH04168794A (en) * | 1990-10-31 | 1992-06-16 | Sharp Corp | Manufacture of multilayer printed-circuit board |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5317801A (en) | Method of manufacture of multilayer circuit board | |
| JPH0378795B2 (en) | ||
| JPH07283538A (en) | Manufacture of multilayered printed wiring board | |
| JPH06120670A (en) | Multilayer wiring board | |
| JP3289858B2 (en) | Method of manufacturing multi-chip module and method of mounting on printed wiring board | |
| JPH07283539A (en) | Build-up multilayered printed wiring board | |
| US6594893B2 (en) | Method of making surface laminar circuit board | |
| JP2007059588A (en) | Method of manufacturing wiring board, and wiring board | |
| JPH1041631A (en) | Manufacturing method of chip-buried structure high density mounting board | |
| JP2000261147A (en) | Multilayer wiring board and manufacture thereof | |
| JP2000261152A (en) | Printed wiring board assembly | |
| KR100693145B1 (en) | Printed circuit board making method | |
| JP3629149B2 (en) | Multilayer wiring board | |
| JP2001308484A (en) | Circuit board and manufacturing method therefor | |
| JPH11274734A (en) | Electronic circuit device and its manufacture | |
| JP2005236220A (en) | Wiring substrate and its manufacturing method, and semiconductor package | |
| JPH0575272A (en) | Manufacture of printed-wiring board | |
| JP4015858B2 (en) | A method of manufacturing a multilayer printed wiring board with a built-in chip resistor. | |
| JP2886613B2 (en) | Multilayer printed wiring board for surface mounting | |
| JPH11145605A (en) | Printed wiring board | |
| JPH0230199B2 (en) | FUKUGOPURINTOHAISENBANNOSEIZOHOHO | |
| JPH04263493A (en) | Manufacture of printed wiring board | |
| JP2023137136A (en) | Component-embedded board and manufacturing method of component-embedded board | |
| JP3323114B2 (en) | Surface mount pad with adhesion enhancing hole | |
| JPH066042A (en) | Manufacture of printed wiring board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19971202 |