JPH0567702A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPH0567702A
JPH0567702A JP13341691A JP13341691A JPH0567702A JP H0567702 A JPH0567702 A JP H0567702A JP 13341691 A JP13341691 A JP 13341691A JP 13341691 A JP13341691 A JP 13341691A JP H0567702 A JPH0567702 A JP H0567702A
Authority
JP
Japan
Prior art keywords
epoxy resin
resin composition
semiconductor device
resin
general formula
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13341691A
Other languages
Japanese (ja)
Other versions
JP2922672B2 (en
Inventor
Kazumasa Igarashi
一雅 五十嵐
Fujio Kitamura
富士夫 北村
Toku Nagasawa
徳 長沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Priority to JP13341691A priority Critical patent/JP2922672B2/en
Publication of JPH0567702A publication Critical patent/JPH0567702A/en
Application granted granted Critical
Publication of JP2922672B2 publication Critical patent/JP2922672B2/en
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Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Abstract

PURPOSE:To inhibit the moisture absorption of a sealing resin, and to prevent the generation of cracks in a package in solder mounting by resin-sealing a semiconductor with an epoxy resin composition containing epoxy resin, phenol aralkyl resin and inorganic fillers. CONSTITUTION:A biphenyl type epoxy resin is employed as epoxy resin and has molecular structure in formula I. A phenol aralkyl resin has molecular structure in formula II, and works as the curing agent of the epoxy resin. The phenol aralkyl resin is obtained by the reaction of aralkyl ether and the Friedel- Craft's catalyst. Crystalline and melting silica is used as inorganic fillers, and set in 70-85% conent of the whole epoxy resin composition. The epoxy resin composition is prepared through processes such as proper blending, melting and mixing, cooling, grinding, etc., from three kinds of each component. Accordingly, the generation of cracks in a package is suppressed, and the efficiency of sealing workability can be improved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、信頼性に優れた半導体
装置およびその製法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a highly reliable semiconductor device and its manufacturing method.

【0002】[0002]

【従来の技術】トランジスタ,IC,LSI等の半導体
素子は、外部環境からの保護の観点および素子のハンド
リングを可能にする観点から、プラスチツクパツケージ
等により封止され半導体装置化されている。この種のパ
ツケージの代表例としては、デユアルインラインパツケ
ージ(DIP)がある。このDIPは、ピン挿入型のも
のであり、実装基板に対してピンを挿入することにより
半導体装置を取り付けるようになつている。
2. Description of the Related Art Semiconductor elements such as transistors, ICs, and LSIs are made into semiconductor devices by sealing them with a plastic package or the like from the viewpoint of protection from the external environment and the possibility of handling the elements. A typical example of this type of package is a dual in-line package (DIP). This DIP is a pin insertion type, and a semiconductor device is attached by inserting pins into a mounting substrate.

【0003】最近は、LSIチツプ等の半導体装置の高
集積化と高速化が進んでおり、加えて電子装置を小形で
高機能にする要求から、実装の高密度化が進んでいる。
このような観点からDIPのようなピン挿入型のパツケ
ージに代えて、表面実装型パツケージが主流になつてき
ている。この種のパツケージを用いた半導体装置におい
ては、平面的にピンを取り出し、これを実装基板表面に
直接半田等によつて固定するようになつている。このよ
うな表面実装型半導体装置は、上記のように平面的にピ
ンが取り出せるようになつており、薄い,軽い,小さい
という利点を備えている。したがつて、実装基板に対す
る占有面積が小さくてすむという利点を備えている他、
基板に対する両面実装も可能であるという長所も有して
いる。
In recent years, semiconductor devices such as LSI chips have been highly integrated and operated at high speeds. In addition, the demand for miniaturized and highly functional electronic devices has resulted in higher density packaging.
From this point of view, surface mount type packages have become mainstream instead of pin insertion type packages such as DIP. In a semiconductor device using this type of package, the pins are taken out in a plane and are fixed directly to the surface of the mounting substrate by soldering or the like. Such a surface-mounting type semiconductor device is capable of taking out pins in a plane as described above, and has the advantages of being thin, light and small. Therefore, in addition to having the advantage that the area occupied by the mounting board is small,
It also has the advantage that it can be mounted on both sides of a board.

【0004】[0004]

【発明が解決しようとする課題】ところが、上記のよう
な表面実装用パツケージを用いた半導体装置において表
面実装前にパツケージ自体が吸湿している場合には、半
田実装時に水分の蒸気圧によつて、パツケージにクラツ
クが生じるという問題がある。すなわち、図1に示すよ
うな表面実装型半導体装置において、水分は矢印Aのよ
うに封止樹脂1を通つて、パツケージ3内に浸入し、主
としてSi−チツプ7の表面やダイボンドパツド4の裏
面に滞溜する。そして、ベーパーフエーズソルダリング
等の半田表面実装を行う際に、上記滞溜水分が、上記半
田実装における加熱により気化し、その蒸気圧により、
図2に示すようにダイボンドパツド4の裏面の樹脂部分
を下方に押しやり、そこに空隙5をつくると同時にパツ
ケージ3にクラツク6を生じさせる。図1および図2に
おいて、2はリードフレーム、8はボンデイングワイヤ
ーである。
However, in a semiconductor device using a surface mounting package as described above, if the package itself absorbs moisture before surface mounting, it is possible that the vapor pressure of water causes soldering during mounting. However, there is a problem that the package is cracked. That is, in the surface mount type semiconductor device as shown in FIG. 1, moisture penetrates into the package 3 through the sealing resin 1 as shown by an arrow A, and mainly the surface of the Si-chip 7 and the die bond pad 4 are exposed. Accumulates on the back side. Then, when solder surface mounting such as vapor phase soldering is performed, the accumulated water is vaporized by heating in the solder mounting, and by its vapor pressure,
As shown in FIG. 2, the resin portion on the back surface of the die bond pad 4 is pushed downward to form a void 5 therein and at the same time a crack 6 is generated in the package 3. 1 and 2, 2 is a lead frame and 8 is a bonding wire.

【0005】このような問題に対する解決策として、半
導体素子をパツケージで封止した後、得られる半導体装
置全体を密封し、表面実装の直前に開封して使用する方
法や、表面実装の直前に上記半導体装置を100℃で2
4時間乾燥させ、その後半田実装を行うという方法が提
案され、すでに実施されている。しかしながら、このよ
うな前処理方法によれば、製造工程が長くなる上、手間
がかかるという問題がある。
As a solution to such a problem, after sealing the semiconductor element with a package, the entire semiconductor device obtained is hermetically sealed and opened just before the surface mounting, or the method is used just before the surface mounting. Semiconductor device at 100 ℃ 2
A method of drying for 4 hours and then performing solder mounting has been proposed and already implemented. However, according to such a pretreatment method, there is a problem that the manufacturing process becomes long and it takes time.

【0006】本発明は、このような事情に鑑みなされた
もので、電子機器への実装に際して前処理を要すること
なく、しかも半田実装時の加熱に耐えうる低応力性に優
れた半導体装置および製造工程が簡略化された半導体装
置の製法の提供をその目的とする。
The present invention has been made in view of the above circumstances, and does not require pretreatment for mounting on an electronic device and is excellent in low stress that can withstand heating during solder mounting and manufacturing. It is an object of the present invention to provide a method for manufacturing a semiconductor device having a simplified process.

【0007】[0007]

【課題を解決するための手段】上記の目的を達成するた
め、本発明は、下記の(A)〜(C)成分を含み、下記
の(C)成分の配合量がエポキシ樹脂組成物全体の70
〜85重量%に設定されているエポキシ樹脂組成物を用
いて半導体素子を封止してなる半導体装置を第1の要旨
とし、 (A)下記の一般式(1)で表される結晶性エポキシ樹
脂。
In order to achieve the above object, the present invention includes the following components (A) to (C), and the blending amount of the following component (C) is the same as that of the whole epoxy resin composition. 70
A semiconductor device obtained by encapsulating a semiconductor element with an epoxy resin composition set to ˜85 wt% is a first gist, and (A) a crystalline epoxy represented by the following general formula (1): resin.

【化7】 (B)下記の一般式(2)で表されるフエノールアラル
キル樹脂。
[Chemical 7] (B) A phenol aralkyl resin represented by the following general formula (2).

【化8】 (C)無機質充填剤。 エポキシ樹脂組成物を用い半導体素子をトランスフアー
成形により樹脂封止して半導体装置を製造する方法であ
つて、上記エポキシ樹脂組成物として下記の(A)〜
(C)成分を含み、下記の(C)成分の含有量がエポキ
シ樹脂組成物全体の70〜85重量%に設定されている
エポキシ樹脂組成物を用い、かつエポキシ樹脂組成物に
よる樹脂封止時に、後硬化工程を省略する半導体装置の
製法を第2の要旨とする。 (A)下記の一般式(1)で表される結晶性エポキシ樹
脂。
[Chemical 8] (C) Inorganic filler. A method of manufacturing a semiconductor device by resin-sealing a semiconductor element using an epoxy resin composition by transfer molding, comprising:
When an epoxy resin composition containing the component (C) and the content of the component (C) below is set to 70 to 85 wt% of the entire epoxy resin composition, and at the time of resin sealing with the epoxy resin composition A second gist is a method of manufacturing a semiconductor device in which a post-curing step is omitted. (A) A crystalline epoxy resin represented by the following general formula (1).

【化9】 (B)下記の一般式(2)で表されるフエノールアラル
キル樹脂。
[Chemical 9] (B) A phenol aralkyl resin represented by the following general formula (2).

【化10】 (C)無機質充填剤。[Chemical 10] (C) Inorganic filler.

【0008】[0008]

【作用】エポキシ樹脂を主成分とする熱硬化型樹脂組成
物を用いトランスフアー成形により樹脂封止された半導
体パツケージは、印刷配線回路基板(PCB)に半田浸
漬して表面実装されるが、この際に発生するパツケージ
クラツクを防止する方法としては、封止樹脂に対する
吸湿を抑制する、ダイボンドパツドの裏面および半導
体素子の表面と封止樹脂との間の接着力を高める、封
止樹脂自体の強度を高めるという3つの方法が考えられ
る。本発明者らは、上記の封止樹脂に対する吸湿を抑
制するという方法に注目し、これを中心に研究を重ねた
結果、疎水性エポキシ樹脂骨格を有するトランスフアー
成形用エポキシ樹脂組成物を用いると、封止樹脂に対す
る吸湿が抑制され、耐半田パツケージクラツク性が大幅
に改善向上するということを突き止めた。そして、この
疎水性エポキシ樹脂骨格からなるトランスフアー成形用
封止樹脂組成物について、それが低吸湿性であるための
最良成形条件および最良硬化条件等について一連の研究
を重ねた結果、本発明に係る特殊なエポキシ樹脂組成物
を用いると、後硬化(アフターキユア)工程を経由させ
ることなく樹脂封止が可能になり、このように後硬化工
程を経由させないことにより、封止樹脂の吸水率が低く
なり、半導体装置の信頼性の低下も生じなくなることを
突き止め本発明に到達した。
A semiconductor package resin-sealed by transfer molding using a thermosetting resin composition containing an epoxy resin as a main component is surface-mounted by solder immersion in a printed wiring circuit board (PCB). As a method of preventing package cracks that occur at this time, suppressing moisture absorption to the sealing resin, increasing the adhesive force between the back surface of the die bond pad and the surface of the semiconductor element and the sealing resin, the sealing resin itself There are three possible methods of increasing the strength of the. The present inventors have paid attention to the method of suppressing moisture absorption to the encapsulating resin, and as a result of repeated research focusing on this method, as a result of using an epoxy resin composition for transfer molding having a hydrophobic epoxy resin skeleton, The inventors have found that the moisture absorption of the sealing resin is suppressed and the solder package crack resistance is significantly improved. Then, for the transfer resin molding encapsulating resin composition composed of the hydrophobic epoxy resin skeleton, as a result of a series of studies on the best molding conditions and the best curing conditions for its low hygroscopicity, the present invention was obtained. When such a special epoxy resin composition is used, resin encapsulation is possible without going through a post-curing step, and by not going through such a post-curing step, the water absorption rate of the encapsulating resin is low. As a result, the inventors have found that the reliability of the semiconductor device is not deteriorated and have reached the present invention.

【0009】つぎに、本発明を詳しく説明する。Next, the present invention will be described in detail.

【0010】本発明に用いられるエポキシ樹脂組成物
は、特殊なエポキシ樹脂(A成分)と、フエノールアラ
ルキル樹脂(B成分)と、無機質充填剤(C成分)とを
用いて得られるものであつて、通常、粉末状もしくはそ
れを打錠したタブレツト状になつている。
The epoxy resin composition used in the present invention is obtained by using a special epoxy resin (component A), a phenol aralkyl resin (component B) and an inorganic filler (component C). Usually, it is in the form of powder or a tablet made by compressing it.

【0011】上記特殊なエポキシ樹脂(A成分)は、ビ
フエニル型エポキシ樹脂で、下記の一般式(1)で表さ
れる結晶性エポキシ樹脂である。
The special epoxy resin (component A) is a biphenyl type epoxy resin, which is a crystalline epoxy resin represented by the following general formula (1).

【0012】[0012]

【化11】 [Chemical 11]

【0013】このように、グリシジル基を有するフエニ
ル環に低級アルキル基を付加することにより撥水性を有
するようになる。そして、上記一般式(1)で表される
結晶性エポキシ樹脂のみでエポキシ樹脂成分を構成して
もよいし、半田パツケージクラツク性の劣化を招かない
範囲でそれ以外の通常用いられるエポキシ樹脂と併用し
てもよい。後者の場合には、エポキシ樹脂成分の一部が
上記一般式(1)で表される結晶性エポキシ樹脂で構成
されることとなる。上記通常用いられるエポキシ樹脂と
しては、クレゾールノボラツク型エポキシ樹脂,フエノ
ールノボラツク型エポキシ樹脂,ノボラツクビスA型や
ビスフエノールA型エポキシ樹脂等各種のエポキシ樹脂
があげられる。このように両者を併用する場合には、上
記一般式(1)で表されるエポキシ樹脂(A成分)をエ
ポキシ樹脂成分全体の50重量%(以下「%」と略す)
以上に設定するのが好ましく、特に好ましくは80%以
上である。
As described above, by adding a lower alkyl group to the phenyl ring having a glycidyl group, it becomes water repellent. The epoxy resin component may be composed only of the crystalline epoxy resin represented by the above general formula (1), and other epoxy resins usually used within the range that does not deteriorate the solder package cracking property. You may use together. In the latter case, a part of the epoxy resin component will be composed of the crystalline epoxy resin represented by the general formula (1). Examples of the epoxy resin usually used include various epoxy resins such as cresol novolak type epoxy resin, phenol novolak type epoxy resin, novolak bis A type and bisphenol A type epoxy resin. When both are used in this way, the epoxy resin (A component) represented by the above general formula (1) is 50% by weight (hereinafter abbreviated as "%") of the entire epoxy resin component.
It is preferably set to the above, particularly preferably 80% or more.

【0014】上記フエノールアラルキル樹脂(B成分)
は、下記の一般式(2)で表される。
The above-mentioned phenol aralkyl resin (component B)
Is represented by the following general formula (2).

【0015】[0015]

【化12】 [Chemical formula 12]

【0016】上記一般式(2)で表されるフエノールア
ラルキル樹脂は、上記特殊なエポキシ樹脂(A成分)の
硬化剤として作用するものであり、アラルキルエーテル
とフエノールとをフリーデルクラフツ触媒で反応させる
ことにより得られる。一般に、α,α’−ジメトキシ−
p−キシレンとフエノールモノマーの縮合重合化合物が
知られている。そして、上記フエノールアラルキル樹脂
としては、軟化点50〜110℃,水酸基当量150〜
220を有するものを用いるのが好ましい。
The phenol aralkyl resin represented by the above general formula (2) acts as a curing agent for the special epoxy resin (component A), and reacts the aralkyl ether and the phenol with a Friedel-Crafts catalyst. It is obtained by Generally, α, α'-dimethoxy-
A condensation polymerization compound of p-xylene and a phenol monomer is known. The above-mentioned phenol aralkyl resin has a softening point of 50 to 110 ° C. and a hydroxyl equivalent of 150 to
It is preferable to use one having 220.

【0017】上記特殊なエポキシ樹脂(A成分)とフエ
ノールアラルキル樹脂(B成分)の配合割合は、化学量
論的当量比で、特殊なエポキシ樹脂(A成分)中のエポ
キシ基1当量に対してフエノールアラルキル樹脂(B成
分)中の水酸基が0.9〜1.3となるように配合する
ことが好適である。
The mixing ratio of the special epoxy resin (component A) and the phenol aralkyl resin (component B) is a stoichiometric equivalent ratio with respect to 1 equivalent of epoxy groups in the special epoxy resin (component A). It is preferable to mix the phenol aralkyl resin (component B) so that the hydroxyl group is 0.9 to 1.3.

【0018】上記特殊なエポキシ樹脂(A成分)および
フエノールアラルキル樹脂(B成分)とともに用いられ
る無機質充填剤(C成分)としては、結晶性および溶融
性シリカが用いられ、なかでも平均粒子径が3〜20μ
mで最大粒子径が100μm未満の不定形破砕溶融シリ
カを用いるのが好ましい。そして、この無機質充填剤
(C成分)の含有量は、エポキシ樹脂組成物全体の70
〜85%の範囲に設定する必要がある。すなわち、無機
質充填剤の含有量が70%未満では一般に封止樹脂組成
物の硬化物の吸湿量が増加し、85%を超えると一般に
トランスフアー成形時の熔融粘度が高くなり、成形物の
ボイドの残存,キヤビテイ充填不良,ワイヤーフローお
よびステージシフトの増大等と成形物の品質が低下する
からである。
As the inorganic filler (component C) used together with the special epoxy resin (component A) and phenol aralkyl resin (component B), crystalline and fusible silica are used, and among them, the average particle diameter is 3 ~ 20μ
It is preferable to use amorphous crushed fused silica having a maximum particle size of less than 100 μm in m. The content of the inorganic filler (C component) is 70% of the total amount of the epoxy resin composition.
It is necessary to set in the range of ~ 85%. That is, when the content of the inorganic filler is less than 70%, the moisture absorption of the cured product of the encapsulating resin composition generally increases, and when it exceeds 85%, the melt viscosity at the time of transfer molding generally increases and the voids of the molded product are increased. This is because the quality of the molded product deteriorates due to the remaining of the resin, poor filling of the cavity, increased wire flow and increased stage shift.

【0019】なお、本発明に用いられるエポキシ樹脂組
成物には、上記A〜C成分以外にも、必要に応じて従来
から用いられているその他の添加剤が含有される。
The epoxy resin composition used in the present invention contains, in addition to the components A to C, other additives which have been conventionally used, if necessary.

【0020】上記その他の添加剤としては、硬化促進
剤,難燃剤,難燃助剤,内部離型剤,着色剤,接着助
剤,低応力化付与剤,ハイドロタルサイト等の各種イオ
ントラツプ剤等があげられる。
As the above-mentioned other additives, curing accelerators, flame retardants, flame retardant assistants, internal release agents, colorants, adhesion assistants, stress-reducing agents, various ion trap agents such as hydrotalcite, etc. Can be given.

【0021】上記硬化促進剤としては、アミン系,アミ
ン系−ホウ素系混合物,リン系,リン系−ホウ素系混合
物等の硬化促進剤等があげられ、単独でもしくは併せて
用いられる。
Examples of the above curing accelerator include amine type, amine type-boron type mixture, phosphorus type, phosphorus type-boron type mixture and the like, which may be used alone or in combination.

【0022】上記難燃剤および難燃助剤としては、ノボ
ラツク型ブロム化エポキシ樹脂,ビスA型ブロム化エポ
キシ樹脂,三酸化アンチモンもしくは五酸化アンチモン
等の化合物等が用いられ、これらは単独でもしくは併せ
て用いられる。
As the above flame retardant and flame retardant aid, novolak type brominated epoxy resin, bis A type brominated epoxy resin, compounds such as antimony trioxide or antimony pentoxide are used, and these are used alone or in combination. Used.

【0023】上記内部離型剤としては、高級脂肪酸,高
級脂肪酸エステル,高級脂肪酸カルシウム,高級脂肪酸
アミド,ポリエチレン等の公知のワツクス化合物等があ
げられ、単独でもしくは併せて用いられる。
Examples of the internal release agent include known wax compounds such as higher fatty acids, higher fatty acid esters, higher fatty acid calcium, higher fatty acid amides and polyethylene, which may be used alone or in combination.

【0024】上記着色剤としては、各種カーボンブラツ
ク,酸化チタンおよびその他必要に応じて公知の各種顔
料や染料等があげられ、これらは単独でもしくは併せて
用いられる。
Examples of the colorant include various types of carbon black, titanium oxide, and other various known pigments and dyes, if necessary, and these may be used alone or in combination.

【0025】上記接着助剤としては、従来公知の各種シ
ラン系カツプリング剤,各種チタン系カツプリング剤等
があげられる。上記シラン系カツプリング剤としては、
グリシジルエーテルタイプ,アミンタイプ,チオシアン
タイプ,ウレアタイプ等のメトキシないしはエトキシシ
ラン等があげられ、単独でもしくは併せて用いられる。
そして、上記接着助剤は、場合により、例えば前記フエ
ノールアラルキル樹脂(B成分)を用いて攪拌装置付き
の反応容器を120〜180℃、特に好ましくは130
〜150℃に昇温させて反応させるように用いることが
できる。
Examples of the adhesion aid include various conventionally known silane coupling agents and various titanium coupling agents. As the silane coupling agent,
Examples thereof include glycidyl ether type, amine type, thiocyan type, urea type and other methoxy or ethoxysilane, which may be used alone or in combination.
Then, the above-mentioned adhesion aid may be used, for example, in a reaction vessel equipped with a stirrer at 120 to 180 ° C., particularly preferably 130, using the above-mentioned phenol aralkyl resin (component B).
It can be used such that the temperature is raised to 150 ° C. to react.

【0026】本発明に用いられるエポキシ樹脂組成物
は、上記各成分を用いて、例えばつぎのようにして製造
することができる。すなわち、上記各成分を適宜配合し
予備混合した後、ミキシングロール機等の混練機にかけ
加熱状態で混練して溶融混合する。そして、これを室温
に冷却した後、公知の手段によつて粉砕し、必要に応じ
て打錠するという一連の工程により製造することができ
る。
The epoxy resin composition used in the present invention can be produced, for example, as follows using the above-mentioned components. That is, the above components are appropriately blended and premixed, and then the mixture is kneaded in a heating state by a kneading machine such as a mixing roll machine and melt mixed. Then, it can be manufactured by a series of steps in which it is cooled to room temperature, pulverized by a known means, and tableted if necessary.

【0027】このようなエポキシ樹脂組成物を用いての
半導体素子の封止は、例えば、金線等で電気的接続のな
された半導体素子を搭載したリードフレームを成形金型
を用いてトランスフアー成形によりモールド成形するこ
とができる。このようなトランスフアー成形としては、
一般に、多数のキヤビテイーを同時にレジンモールドす
るタイプや1ポツト1キヤビテイーから1ポツト数個ど
り1キヤビテイまでの小ポツト径でトランスフアー成形
するマルチプランジヤーシステムまでの各種トランスフ
アーモールド方式等があげられる。そして、上記トラン
スフアー成形では、150〜200℃までの温度範囲に
おいて数10秒から数100秒の成形時間をかけてモー
ルドを行う。このモールド過程では、エポキシ樹脂組成
物を加熱し、溶融状態で成形機のプランジヤーによつて
キヤビテイー内に移送し、ゲル化して硬化した形状で成
形を終了し、金型から離型して半導体装置としてのプラ
スチツク封止が完了する。
The semiconductor element is sealed with such an epoxy resin composition by, for example, transfer molding using a molding die to form a lead frame on which the semiconductor element electrically connected by a gold wire or the like is mounted. It can be molded by. For such transfer molding,
Generally, there are various types of transfer molding such as a type in which a large number of cavities are resin-molded at the same time, and a multi-plunger system in which transfer molding is carried out with a small pot diameter from one pot and one pot to several pots and one pot. In the transfer molding, molding is performed in the temperature range of 150 to 200 ° C. for a molding time of several tens of seconds to several hundreds of seconds. In this molding process, the epoxy resin composition is heated and transferred in the molten state into the cavity by the plunger of the molding machine, the molding is completed in the gelled and cured shape, and the semiconductor device is released from the mold. As a result, the plastic sealing is completed.

【0028】そして、上記工程の後、通常、150〜2
00℃の温度で数10分から数時間、具体的には175
℃で3〜20時間の後硬化(アフターキユア)工程で封
止樹脂の架橋反応を促進させるのが一般的である。しか
し、本発明のエポキシ樹脂組成物は、上記後硬化工程を
行うことなく硬化可能であり、このように後硬化工程を
経由させない方がパツケージに対する吸湿抑制効果が一
層発揮される。すなわち、本発明の半導体装置の製造工
程において、例えば、トランスフアー成形温度でのエポ
キシ樹脂組成物のゲル化時間を、好適には10〜40
秒、特に好適には10〜25秒に設定することにより、
成形金型からの離型の際に全く不具合を生じず、しかも
パツケージは、後硬化工程を経由した場合に比べて低吸
湿性に優れるようになる。すなわち、上記のようにして
樹脂封止を行うことにより、半田実装工程時において、
パツケージクラツクの発生が抑制され、半田耐熱性に優
れた高い信頼性を有する半導体装置が得られるようにな
る。
After the above steps, usually 150 to 2
10 minutes to several hours at a temperature of 00 ° C., specifically 175
It is common to promote the crosslinking reaction of the sealing resin in a post-curing step at 3 ° C. for 3 to 20 hours. However, the epoxy resin composition of the present invention can be cured without performing the post-curing step, and the moisture absorption suppressing effect on the package is further exhibited when the post-curing step is not performed. That is, in the manufacturing process of the semiconductor device of the present invention, for example, the gelling time of the epoxy resin composition at the transfer molding temperature is preferably 10 to 40.
Seconds, particularly preferably 10 to 25 seconds,
No problems occur at the time of release from the molding die, and the package has a low hygroscopicity as compared with the case of passing through the post-curing step. That is, by performing resin sealing as described above, during the solder mounting process,
Generation of package cracks is suppressed, and a highly reliable semiconductor device having excellent solder heat resistance can be obtained.

【0029】[0029]

【発明の効果】以上のように、本発明の半導体装置は、
前記特殊なエポキシ樹脂(A成分)と、フエノールアラ
ルキル樹脂(B成分)と、特定範囲に配合された無機質
充填剤(C成分)とを含む特殊なエポキシ樹脂組成物を
用いて半導体素子を樹脂封止して構成されており、上記
各成分の相互作用により、封止樹脂の吸湿が抑制され、
半田実装におけるような過酷な条件下においてもパツケ
ージクラツクが生ずることがなく、優れた耐湿信頼性を
備えている。しかも、本発明の方法は、上記耐湿信頼性
に富んだ半導体装置を、封止樹脂の後硬化工程を省略し
て製造するのであつて、従来のように封止樹脂の後硬化
工程という長時間の工程が省略されていることから封止
作業性の高効率化を実現できる。
As described above, the semiconductor device of the present invention is
A semiconductor element is sealed with a resin by using a special epoxy resin composition containing the special epoxy resin (component A), a phenol aralkyl resin (component B), and an inorganic filler (component C) mixed in a specific range. It is configured to stop, by the interaction of the above components, moisture absorption of the sealing resin is suppressed,
Even under severe conditions such as solder mounting, package cracking does not occur and it has excellent moisture resistance reliability. Moreover, the method of the present invention manufactures the above-described semiconductor device having high moisture resistance reliability by omitting the post-curing step of the sealing resin. Since the step is omitted, it is possible to realize high efficiency of sealing workability.

【0030】つぎに、実施例について比較例と併せて説
明する。
Next, examples will be described together with comparative examples.

【0031】先ず、エポキシ樹脂組成物の作製に際し
て、下記に示す化合物を準備した。
First, when preparing an epoxy resin composition, the following compounds were prepared.

【0032】《エポキシ樹脂A》4,4’−ビス(2,
3−エポキシプロポキシ)−3,3’,5,5’−テト
ラメチルビフエニル:エポキシ当量195 《エポキシ樹脂B》o−クレゾールノボラツク型エポキ
シ樹脂:エポキシ当量195
<< Epoxy Resin A >>4,4'-bis (2
3-epoxypropoxy) -3,3 ′, 5,5′-tetramethylbiphenyl: epoxy equivalent 195 << epoxy resin B >> o-cresol novolak type epoxy resin: epoxy equivalent 195

【0033】《硬化剤A》前記一般式(2)で表される
繰り返し数n=1〜100のフエノールアラルキル樹
脂:軟化点76℃,水酸基当量175 《無機質充填剤》破砕溶融シリカ:平均粒子径7μm,
最大粒子径90μm 《硬化促進剤A》トリフエニルホスフイン 《硬化促進剤B》1,8−ジアザビシクロ(4,3,
0)ノネン−5 《難燃剤A》ノボラツク型ブロム化エポキシ樹脂:エポ
キシ当量275 《難燃剤B》三酸化アンチモン 《着色剤》カーボンブラツク 《内部離型剤》高級脂肪酸エステルワツクス 《接着助剤》3−グリシドキシプロピルトリメトキシシ
ラン
<< Curing agent A >> A phenol aralkyl resin having a number of repetitions n = 1 to 100 represented by the general formula (2): Softening point 76 ° C., hydroxyl equivalent 175 << Inorganic filler >> Crushed fused silica: Average particle diameter 7 μm,
Maximum particle size 90 μm << Curing accelerator A >> Triphenylphosphine << Curing accelerator B >> 1,8-diazabicyclo (4,3,
0) Nonene-5 << Flame Retardant A >> Novolac Brominated Epoxy Resin: Epoxy Equivalent 275 << Flame Retardant B >> Antimony Trioxide << Colorant >> Carbon Black << Internal Release Agent >> Higher Fatty Acid Ester Wax << Adhesion Aid >> 3-glycidoxypropyltrimethoxysilane

【0034】[0034]

【実施例1〜5】下記の表1に示す各成分を用い同表に
示す割合で配合し、ミキシングロール機にかけて100
℃で5分間混練してシート状樹脂組成物を作製した。つ
いで、このシート状樹脂組成物を粉砕し、目的とするト
ランスフアー成形用エポキシ樹脂組成物を得た。
[Examples 1 to 5] The components shown in Table 1 below were used and blended in the proportions shown in the same table.
A sheet-shaped resin composition was prepared by kneading at 5 ° C. for 5 minutes. Then, the sheet-shaped resin composition was pulverized to obtain the target epoxy resin composition for transfer molding.

【0035】[0035]

【表1】 [Table 1]

【0036】[0036]

【参考例1〜5】後硬化工程を行つた場合の硬化物特性
および半導体装置の特性を測定するため、上記実施例に
より得られたトランスフアー成形用エポキシ樹脂組成物
を参考例として準備した。
Reference Examples 1 to 5 In order to measure the characteristics of the cured product and the characteristics of the semiconductor device when the post-curing step was performed, the epoxy resin composition for transfer molding obtained in the above Examples was prepared as a Reference Example.

【0037】[0037]

【比較例1〜4】下記の表2に示す各成分を用い、同表
に示す割合で配合した。それ以外は実施例1と同様にし
て目的とするトランスフアー成形用エポキシ樹脂組成物
を得た。
Comparative Examples 1 to 4 The components shown in Table 2 below were used and blended in the proportions shown in the same table. Otherwise in the same manner as in Example 1, an intended epoxy resin composition for transfer molding was obtained.

【0038】[0038]

【表2】 [Table 2]

【0039】上記実施例,参考例および比較例で得られ
たトランスフアー成形用エポキシ樹脂組成物の175℃
ゲル化時間(熱盤法)、硬化物特性(ガラス転移温度、
線膨張係数、25℃および260℃における曲げ弾性
率,曲げ強度、85℃/85%RH×168hrにおけ
る吸水率)を測定した。なお、参考例および比較例の硬
化物は175℃の恒温槽中にて5時間の後硬化工程を行
つた。
The epoxy resin compositions for transfer molding obtained in the above Examples, Reference Examples and Comparative Examples were tested at 175 ° C.
Gelation time (hot plate method), cured product characteristics (glass transition temperature,
The coefficient of linear expansion, the bending elastic modulus at 25 ° C. and 260 ° C., the bending strength, and the water absorption at 85 ° C./85% RH × 168 hr) were measured. The cured products of Reference Example and Comparative Example were subjected to a post-curing step for 5 hours in a constant temperature bath at 175 ° C.

【0040】また、上記トランスフアー成形用エポキシ
樹脂組成物を用いて、公知のトランスフアー成形法によ
り、175±5℃に加熱された成形用金型を用いて半導
体素子をモールド(成形時間120秒)して半導体装置
を得た。この半導体装置は、80pin四方向フラツト
パツケージ(QFP:20mm×14mm×厚み2.0mm)
で、サイズ8mm×8mmのダイボンドプレート上に熱硬化
エポキシ銀ペーストを用いて7.5mm×7.5mmの半導
体素子が接合されており、42アロイリードフレームの
インナーリードと20μm金線により電気的に接続され
ている。さらに、参考例品および比較例品は、175℃
の恒温槽中にて5時間の後硬化工程を行つた。このよう
にして作製した半導体装置を、85℃で85%RH恒温
恒湿槽に96時間放置した後、260℃の半田浴中に1
0秒間浸漬し、パツケージクラツクの発生を観察した。
その結果を後記の表3,表4および表5に示した。
Using the above-mentioned transfer molding epoxy resin composition, a semiconductor element was molded by a known transfer molding method using a molding die heated to 175 ± 5 ° C. (molding time: 120 seconds). ) And obtained a semiconductor device. This semiconductor device has an 80-pin four-way flat package (QFP: 20 mm × 14 mm × thickness 2.0 mm).
Then, a semiconductor element of 7.5 mm × 7.5 mm is bonded to the die bond plate of size 8 mm × 8 mm by using a thermosetting epoxy silver paste. The inner lead of the 42 alloy lead frame and the 20 μm gold wire electrically It is connected. Further, the reference example product and the comparative example product are 175 ° C.
The post-curing step was carried out for 5 hours in the constant temperature bath. The semiconductor device thus manufactured was left in a constant temperature and humidity bath of 85% RH at 85 ° C. for 96 hours, and then placed in a solder bath at 260 ° C. for 1 hour.
Immersion was carried out for 0 seconds, and the occurrence of package cracks was observed.
The results are shown in Tables 3, 4 and 5 below.

【0041】[0041]

【表3】 [Table 3]

【0042】[0042]

【表4】 [Table 4]

【0043】[0043]

【表5】 [Table 5]

【0044】*:比較例3では熔融粘度が極めて高くな
り、トランスフアー成形に用いる試験片が作製できなか
つた。
*: In Comparative Example 3, the melt viscosity was extremely high, and the test piece used for transfer molding could not be prepared.

【0045】上記表3,表4および表5の結果から、比
較例の硬化物は強度が低く吸水率が高い。また、半田ク
ラツク試験でのクラツク発生数も多い。そして、参考実
施例の硬化物は比較例に比べて若干特性に優れている。
また、半田クラツク試験でのクラツク発生数も比較例品
と比較して良好である。これに対して、実施例の硬化物
は強度が高く吸水率も比較例に比べて低い。しかも、半
田クラツク試験でのクラツク発生数も少ない。
From the results shown in Tables 3, 4 and 5, the cured products of Comparative Examples have low strength and high water absorption. In addition, there are many cracks in the solder crack test. The cured product of the reference example is slightly superior to the comparative example in characteristics.
Further, the number of cracks generated in the solder crack test is also better than that of the comparative example product. On the other hand, the cured products of Examples have high strength and lower water absorption than Comparative Examples. Moreover, the number of cracks generated in the solder crack test is small.

【図面の簡単な説明】[Brief description of drawings]

【図1】従来の半導体装置のパツケージクラツク発生状
況を説明する縦断面図である。
FIG. 1 is a vertical cross-sectional view illustrating a situation where a package crack occurs in a conventional semiconductor device.

【図2】従来の半導体装置のパツケージクラツク発生状
況を説明する縦断面図である。
FIG. 2 is a vertical cross-sectional view illustrating a situation where a package crack occurs in a conventional semiconductor device.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 下記の(A)〜(C)成分を含み、下記
の(C)成分の含有量がエポキシ樹脂組成物全体の70
〜85重量%に設定されているエポキシ樹脂組成物を用
いて半導体素子を封止してなる半導体装置。 (A)下記の一般式(1)で表される結晶性エポキシ樹
脂。 【化1】 (B)下記の一般式(2)で表されるフエノールアラル
キル樹脂。 【化2】 (C)無機質充填剤。
1. The following components (A) to (C) are contained, and the content of the following component (C) is 70% of the total amount of the epoxy resin composition.
A semiconductor device obtained by encapsulating a semiconductor element with an epoxy resin composition set to be about 85% by weight. (A) A crystalline epoxy resin represented by the following general formula (1). [Chemical 1] (B) A phenol aralkyl resin represented by the following general formula (2). [Chemical 2] (C) Inorganic filler.
【請求項2】 エポキシ樹脂組成物を用い半導体素子を
トランスフアー成形により樹脂封止して半導体装置を製
造する方法であつて、上記エポキシ樹脂組成物として下
記の(A)〜(C)成分を含み、下記の(C)成分の含
有量がエポキシ樹脂組成物全体の70〜85重量%に設
定されているエポキシ樹脂組成物を用い、かつエポキシ
樹脂組成物による樹脂封止時に、後硬化工程を省略する
ことを特徴とする半導体装置の製法。 (A)下記の一般式(1)で表される結晶性エポキシ樹
脂。 【化3】 (B)下記の一般式(2)で表されるフエノールアラル
キル樹脂。 【化4】 (C)無機質充填剤。
2. A method for producing a semiconductor device by resin-sealing a semiconductor element using an epoxy resin composition by transfer molding, comprising the following components (A) to (C) as the epoxy resin composition. A post-curing step is used at the time of resin encapsulation using the epoxy resin composition containing the following component (C), the content of which is set to 70 to 85 wt% of the total epoxy resin composition. A method for manufacturing a semiconductor device, which is characterized by being omitted. (A) A crystalline epoxy resin represented by the following general formula (1). [Chemical 3] (B) A phenol aralkyl resin represented by the following general formula (2). [Chemical 4] (C) Inorganic filler.
【請求項3】 エポキシ樹脂組成物が、トランスフアー
成形温度におけるゲル化時間が10〜40秒である請求
項2記載の半導体装置の製法。
3. The method for producing a semiconductor device according to claim 2, wherein the epoxy resin composition has a gel time of 10 to 40 seconds at a transfer molding temperature.
【請求項4】 下記の(A)〜(C)成分を含み、下記
の(C)成分の含有量がエポキシ樹脂組成物全体の70
〜85重量%に設定されている半導体封止用エポキシ樹
脂組成物。 (A)下記の一般式(1)で表される結晶性エポキシ樹
脂。 【化5】 (B)下記の一般式(2)で表されるフエノールアラル
キル樹脂。 【化6】 (C)無機質充填剤。
4. The following (A) to (C) components are contained, and the content of the following (C) component is 70% of the total epoxy resin composition.
The epoxy resin composition for semiconductor encapsulation set to ˜85 wt%. (A) A crystalline epoxy resin represented by the following general formula (1). [Chemical 5] (B) A phenol aralkyl resin represented by the following general formula (2). [Chemical 6] (C) Inorganic filler.
JP13341691A 1991-05-08 1991-05-08 Semiconductor device manufacturing method Expired - Lifetime JP2922672B2 (en)

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Application Number Priority Date Filing Date Title
JP13341691A JP2922672B2 (en) 1991-05-08 1991-05-08 Semiconductor device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13341691A JP2922672B2 (en) 1991-05-08 1991-05-08 Semiconductor device manufacturing method

Publications (2)

Publication Number Publication Date
JPH0567702A true JPH0567702A (en) 1993-03-19
JP2922672B2 JP2922672B2 (en) 1999-07-26

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Family Applications (1)

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Country Status (1)

Country Link
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5976916A (en) * 1995-03-07 1999-11-02 Nitto Denko Corporation Method of producing semiconductor device and encapsulating pellet employed therein
KR100500067B1 (en) * 1997-01-24 2005-09-26 신에쓰 가가꾸 고교 가부시끼가이샤 Epoxy Resin Composition and Semiconductor Device
US7098276B1 (en) 1998-10-21 2006-08-29 Nec Corporation Flame-retardant epoxy resin composition and semiconductor device made using the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5976916A (en) * 1995-03-07 1999-11-02 Nitto Denko Corporation Method of producing semiconductor device and encapsulating pellet employed therein
KR100500067B1 (en) * 1997-01-24 2005-09-26 신에쓰 가가꾸 고교 가부시끼가이샤 Epoxy Resin Composition and Semiconductor Device
US7098276B1 (en) 1998-10-21 2006-08-29 Nec Corporation Flame-retardant epoxy resin composition and semiconductor device made using the same
US7799852B2 (en) 1998-10-21 2010-09-21 Nec Corporation Composition of biphenyl epoxy resin, phenolbiphenylaralkyl resin and filler

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