JPH0555419A - Structure of fitting semiconductor device to heat sink - Google Patents
Structure of fitting semiconductor device to heat sinkInfo
- Publication number
- JPH0555419A JPH0555419A JP3212359A JP21235991A JPH0555419A JP H0555419 A JPH0555419 A JP H0555419A JP 3212359 A JP3212359 A JP 3212359A JP 21235991 A JP21235991 A JP 21235991A JP H0555419 A JPH0555419 A JP H0555419A
- Authority
- JP
- Japan
- Prior art keywords
- metal carrier
- heat dissipation
- chassis
- packing
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】無線通信装置あるいはレーダー等
の高出力マイクロ波電力増幅器や高出力マイクロ波発振
器における半導体デバイスの放熱取付け構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat dissipation mounting structure for a semiconductor device in a high power microwave power amplifier or a high power microwave oscillator such as a wireless communication device or radar.
【０００２】[0002]
【従来の技術及び発明が解決しようとする課題】高出力
マイクロ波電力増幅器は、増幅素子であるトランジスタ
チップ内で発生する多量の熱を能率的に外部に放熱して
トランジスタチップの温度を低く保つために、図３に示
すような構造が一般的にとられている。すなわち、熱伝
導性の良い銅又はアルミニュウム等の金属キャリア１の
上に半導体パッケージ２を搭載し、その左右にマイクロ
波インピーダンス整合回路、バイアス回路等からなる回
路基板３，４を配置したものを、アルミ等より成る筐体
シャーシ（又は放熱台）５に取り付けているものが多
い。金属キャリア１には半導体パッケージ２の基底部２
ｂを埋め込むためのパッケージ用溝１ａが形成される。2. Description of the Related Art A high output microwave power amplifier efficiently radiates a large amount of heat generated in a transistor chip, which is an amplifying element, to the outside to keep the temperature of the transistor chip low. Therefore, the structure shown in FIG. 3 is generally adopted. That is, a semiconductor package 2 is mounted on a metal carrier 1 such as copper or aluminum having good thermal conductivity, and circuit boards 3 and 4 including a microwave impedance matching circuit and a bias circuit are arranged on the left and right sides of the semiconductor package 2. Many are attached to a chassis chassis (or heat sink) 5 made of aluminum or the like. The metal carrier 1 has a base portion 2 of the semiconductor package 2.
A package groove 1a for burying b is formed.
【０００３】半導体パッケージ２のトランジスタ等の半
導体チップ２ａ内で発生した熱は、図中に矢印で示した
ように、まず銅又はベリリアより成るパッケージの基底
部２ｂに伝わり、次に金属キャリア１に伝熱し、横方向
にも拡がり、更に筐体シャーシ（又は放熱台）５に伝わ
り、横方向にいっそう拡散され、最終的には空気中へ放
散される。熱が伝わっていく過程には、パッケージ基底
部２ｂ、金属キャリア１、筐体シャーシ（あるいは放熱
台）５がある。放熱系の性能は、これらの部材の機械的
寸法から主に決まる伝熱性能（熱伝導率）と、各部材間
に存在する接触熱抵抗によって左右される。The heat generated in the semiconductor chip 2a such as the transistor of the semiconductor package 2 is first transferred to the base 2b of the package made of copper or beryllia and then to the metal carrier 1 as shown by the arrow in the figure. The heat is transferred, spreads in the lateral direction, further propagates to the chassis chassis (or heat dissipation table) 5, is further diffused in the lateral direction, and is finally dissipated in the air. There are the package base 2b, the metal carrier 1, and the chassis (or heat sink) 5 in the process of heat transfer. The performance of the heat radiation system depends on the heat transfer performance (thermal conductivity) mainly determined by the mechanical dimensions of these members and the contact thermal resistance existing between the members.
【０００４】その接触熱抵抗は、図３の例では、半導体
パッケージ２と金属キャリア１間、金属キャリア１と筐
体シャーシ（あるいは放熱台）５間に存在し、発熱源に
近いところのものほど、熱の横方向の拡がりが少なく、
接触面積も小さいので、接触熱抵抗値が大きくなり、そ
の影響も大きくなり無視できない。従って、パッケージ
基底部２ｂと金属キャリア１の接触熱抵抗が特に重要で
ある。In the example of FIG. 3, the contact thermal resistance exists between the semiconductor package 2 and the metal carrier 1, between the metal carrier 1 and the chassis (or heat sink) 5, and the closer to the heat source, , Little lateral spread of heat,
Since the contact area is also small, the contact thermal resistance value is large, and its influence is large and cannot be ignored. Therefore, the contact thermal resistance between the package base 2b and the metal carrier 1 is particularly important.
【０００５】上述の熱的接触はいずれもネジの締付けに
よって行われる機械的圧力接触の形態をとるのが一般的
方法である。従って、少しでも隙間ができると、接触面
積が小さくなり、さらに接触熱抵抗値が大きくなってし
まう。この隙間（２０〜１００μ）は、機械加工精度、
熱膨張係数差および内部応力によるソリなどに起因して
いる。All of the above-mentioned thermal contacts generally take the form of mechanical pressure contacts, which are carried out by tightening screws. Therefore, if a gap is formed even a little, the contact area becomes smaller and the contact thermal resistance value becomes larger. This clearance (20 to 100 μ) is
This is due to the difference in thermal expansion coefficient and warpage due to internal stress.
【０００６】上述のパッケージ基底部２ｂと金属キャリ
ア１の間の隙間が、近年無視できなくなってきた。それ
は、半導体デバイスが近年高出力化されたためと、整合
回路をパッケージ内にチップと一緒に封入してより高性
能化を図るため、パッケージの基底部が大面積化（１５
０mm2 以上に）され、そこにソリ等が発生しやすくなっ
てきたためである。大面積化により接触熱抵抗値は小さ
くなると期待されていたのに、ソリ等のために実際に有
効な接触面積は小さくなってしまうという皮肉な現象す
ら起きている。In recent years, the gap between the package base 2b and the metal carrier 1 cannot be ignored. This is because the output of semiconductor devices has been increased in recent years, and because the matching circuit is enclosed together with the chip in the package to achieve higher performance, the package has a large base area (15
0 mm 2 or more), and warps are more likely to occur there. Although it was expected that the contact thermal resistance value would decrease with the increase in area, there is even the ironic phenomenon that the actual effective contact area decreases due to warpage and the like.
【０００７】一方、高出力化とともに発生する熱も大き
くなり、より一層の放熱性能の改善を図る必要があるの
に、現実は放熱特性の悪化のため、信頼性だけでなく、
出力電力、利得等のマイクロ波特性の電気的性能をも劣
化させる状況にある。また、隙間ができると、半導体デ
バイスの高周波的接地にアンバランスを生じてくる。従
来は、これらの問題点を改善するために、接触面にシ
リコーンコンパウンドを介在させて、ネジ締めする。
パッケージ基底部を金属キャリアにはんだ付けする。な
どの方法も一部で行われている。しかし、これらの方法
は以下に述べるような問題点を持っている。即ち、 （１）シリコーンコンパウンドはあまり熱伝導度が高く
なく（アルミの１／１００程度）、接触熱抵抗値の改善
量が十分でない。 （２）シリコーンコンパウンドは絶縁性なので、高周波
の接地に害を及ぼす。 （３）はんだ付けは、接触熱抵抗と高周波接地の初期性
能は改善されるが、温度サイクル、間欠動作試験あるい
は長時間動作によって劣化する。 （４）はんだ付けの際の熱によって、半導体デバイスお
よび他の回路部品、材料が劣化することがある。 （５）はんだ付けは半導体デバイスの取りはずし、取り
付けの作業がやりにくい。On the other hand, the amount of heat generated increases with the increase in output, and it is necessary to further improve the heat radiation performance. However, in reality, not only the reliability but also the heat radiation characteristic deteriorates.
The electric performance of microwave characteristics such as output power and gain is also deteriorated. Further, if a gap is formed, imbalance occurs in high frequency grounding of the semiconductor device. Conventionally, in order to improve these problems, a silicone compound is interposed on the contact surface and the screw is tightened.
Solder the package base to the metal carrier. Some of these methods are also used. However, these methods have the following problems. That is, (1) the silicone compound does not have a very high thermal conductivity (about 1/100 of that of aluminum), and the amount of improvement in the contact thermal resistance value is not sufficient. (2) Silicone compounds are insulative and therefore damage the grounding of high frequencies. (3) Soldering improves contact thermal resistance and high-frequency grounding initial performance, but deteriorates due to temperature cycle, intermittent operation test, or long-term operation. (4) The semiconductor device, other circuit components, and materials may be deteriorated by the heat during soldering. (5) Soldering makes it difficult to remove and attach semiconductor devices.
【０００８】この発明の目的は、半導体パッケージ２の
基底部２ｂと金属キャリア１間、あるいは筐体シャーシ
又は放熱台５と金属キャリア１間の接触熱抵抗に関する
従来の問題点を解決し、接触熱抵抗値の低減と安定化、
均一化を図ろうとするものである。The object of the present invention is to solve the conventional problems relating to the contact thermal resistance between the base portion 2b of the semiconductor package 2 and the metal carrier 1 or between the housing chassis or the heat dissipation table 5 and the metal carrier 1 and solve the contact heat. Resistance reduction and stabilization,
It is intended to achieve uniformity.
【０００９】[0009]
【課題を解決するための手段】（１）半導体パッケージ
を放熱用の板状の金属キャリア上に搭載し、その金属キ
ャリアを筐体シャーシ又は放熱台上に搭載して成る半導
体デバイスの放熱取付け構造において、請求項１の発明
では、上記金属キャリアの上記半導体パッケージの基底
部と対向する上面の周辺にリング状のパッキング用溝が
形成され、その溝にリング状のパッキングが充填され、
上記パッキング用溝に囲まれた上記金属キャリアの上面
と上記半導体パッケージの基底部との間にＩｎＧａフィ
ラーが介在される。 （２）上記（１）項において、上記パッキング用溝に囲
まれた金属キャリアの上面と、その上面と対向する上記
半導体パッケージの基底部とに、互いに噛み合う凹凸面
がそれぞれ形成されているのが望ましい。 （３）半導体パッケージを放熱用の板状の金属キャリア
上に搭載し、その金属キャリアを筐体シャーシ又は放熱
台上に搭載して成る半導体デバイスの放熱取付け構造に
おいて、請求項３の発明では、上記筐体シャーシ又は放
熱台の上記金属キャリアと対向する上面の周辺にリング
状のパッキング用溝が形成され、その溝にリング状のパ
ッキングが充填され、上記パッキング用溝に囲まれた上
記筐体シャーシ又は放熱台の上面と上記金属キャリアの
底面との間にＩｎＧａフィラーが介在される。 （４）上記（３）項において、上記パッキング用溝に囲
まれた筐体シャーシ又は放熱台の上面と、その上面と対
向する上記金属キャリアの底面とに、互いに噛み合う凹
凸面がそれぞれ形成されているのが望ましい。(1) A semiconductor device heat radiation mounting structure in which a semiconductor package is mounted on a heat-dissipating plate-shaped metal carrier and the metal carrier is mounted on a chassis chassis or a heat sink. In the invention of claim 1, a ring-shaped packing groove is formed around an upper surface of the metal carrier facing the base of the semiconductor package, and the groove is filled with ring-shaped packing.
InGa filler is interposed between the upper surface of the metal carrier surrounded by the packing groove and the base of the semiconductor package. (2) In the above item (1), uneven surfaces that mesh with each other are formed on the upper surface of the metal carrier surrounded by the packing groove and on the base portion of the semiconductor package that faces the upper surface. desirable. (3) In a heat dissipation mounting structure for a semiconductor device, wherein a semiconductor package is mounted on a plate-shaped metal carrier for heat dissipation, and the metal carrier is mounted on a chassis chassis or a heat dissipation base. A ring-shaped packing groove is formed around an upper surface of the housing chassis or the heat dissipation table facing the metal carrier, and the groove is filled with a ring-shaped packing, and the housing is surrounded by the packing groove. An InGa filler is interposed between the top surface of the chassis or the heat sink and the bottom surface of the metal carrier. (4) In the above item (3), the upper and lower surfaces of the chassis chassis or heat sink surrounded by the packing groove and the bottom surface of the metal carrier facing the upper surface are provided with indented surfaces which mesh with each other. Is desirable.
【００１０】[0010]
【実施例】この発明の実施例を図１に、図３と対応する
部分に同じ符号を付して示し、重複説明を省略する。こ
の発明では、パッケージ基底部２ｂと金属キャリア１と
の接触部の隙間に、従来のシリコーンコンパウンドに代
えて、熱伝導率が高く（シリコーンコンパウンドの５０
〜８０倍）、導電性の半凝固性金属のＩｎＧａフィラー
１１を数百μｍ以下の厚さで介在させ、かつ、その溶融
状のＩｎＧａフィラー１１が周囲に流出散逸するのを防
ぐために、ＩｎＧａフィラー介在領域の周囲をとり囲む
ように弾力性、圧縮性のある例えばシリコンゴム等より
成るリング状（ロ字状）のパッキング１２を装着して、
ネジ締めにより両者を機械的圧接する構造とする。パッ
ケージ用溝１ａの底面には、半導体パッケージ２を締め
付けるためのネジ穴１５，１６が形成される。パッキン
グ１２は、パッケージ用溝１ａの底面に、一段低くリン
グ状（ロ字状）の細い溝１ｂを掘り込み、そこに装着す
る。パッキング１２は、ＩｎＧａフィラー１１の流出を
防止するとともに、湿気の侵入を防いで、ＩｎＧａフィ
ラーの性能劣化を防止している。また、余分のＩｎＧａ
フィラーは、このパッキング用溝１ｂに溜り、溝１ｂが
ＩｎＧａフィラー１１の熱収縮を吸収する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention is shown in FIG. 1 by giving the same reference numerals to the portions corresponding to those in FIG. In the present invention, in the gap between the contact portion between the package base 2b and the metal carrier 1, a high thermal conductivity (50% of the silicone compound) is used instead of the conventional silicone compound.
In order to prevent the molten InGa filler 11 from flowing out and dissipating to the surroundings, the InGa filler 11 made of a conductive semi-solidifying metal is interposed at a thickness of several hundreds of μm or less. A ring-shaped (square-shaped) packing 12 made of, for example, silicon rubber having elasticity and compressibility is attached so as to surround the intervening region,
The structure is such that both are mechanically pressure-welded by tightening screws. Screw holes 15 and 16 for tightening the semiconductor package 2 are formed on the bottom surface of the package groove 1a. The packing 12 is formed by digging a ring-shaped (square-shaped) thin groove 1b, which is one step lower, in the bottom surface of the package groove 1a, and is mounted therein. The packing 12 prevents the outflow of the InGa filler 11 and prevents the ingress of moisture to prevent the performance deterioration of the InGa filler. Also, extra InGa
The filler collects in the packing groove 1b, and the groove 1b absorbs the thermal contraction of the InGa filler 11.
【００１１】また、接触部の接触面積を大きくして、接
触熱抵抗値を小さくするためにパッケージ基底部２ｂと
金属キャリア１との対接面にそれぞれ凹凸面２ｄ，１ｄ
を形成し、互いに噛み合せる構造とする。半凝固性金属
ＩｎＧａフィラー１１は常温以上の温度では溶融状態で
あるので半導体パッケージの基底部２ｂの表面や金属キ
ャリア１の表面をよくぬらし、従ってそれらの間の接触
熱抵抗は固体と固体の、即ち基底部２ｂと金属キャリア
１との直接接触の状態の接触熱抵抗にくらべて無視でき
るくらい小さい。さらに、機械加工精度やソリ等に起因
する隙間も完全に埋められ、しかもＩｎＧａフィラー１
１の熱伝導率は、従来用いられていたシリコーンコンパ
ウンドに比べて５０〜８０倍も高いので、実効的な接触
熱抵抗値は後で述べるように格段に小さい値に改善され
る。Further, in order to increase the contact area of the contact portion and reduce the contact thermal resistance value, the concavo-convex surfaces 2d and 1d are respectively formed on the contact surfaces of the package base 2b and the metal carrier 1.
Are formed so that they are engaged with each other. Since the semi-solidifying metal InGa filler 11 is in a molten state at a temperature higher than room temperature, it wets the surface of the base 2b of the semiconductor package and the surface of the metal carrier 1 well, so that the contact thermal resistance between them is solid or solid. That is, it is negligibly smaller than the contact thermal resistance in the state of direct contact between the base portion 2b and the metal carrier 1. Furthermore, the gaps caused by machining accuracy and warpage are completely filled, and InGa filler 1
Since the thermal conductivity of No. 1 is 50 to 80 times higher than that of the conventionally used silicone compound, the effective contact thermal resistance value is improved to a significantly small value as described later.
【００１２】図１Ａ，Ｂの例について、接触熱抵抗値の
具体的数値例を以下に示し、本発明の効果を明らかにす
る。マイクロ波出力電力１８Ｗクラスの半導体デバイス
のパッケージ基底部２ｂの接触面積Ａ＝１５５mm2 、Ａ
クラス無信号時の消費電力Pd＝４８Ｗ、基底部２ｂと金
属キャリア１の材質が共に銅の場合について、銅と銅と
の理想的接触状態での接触熱抵抗値Rcs は、Rcs ＝１／
hcA で表わされる。１／hcは接触コンダクタンスと呼ば
れ、銅の場合１／hc＝０．１８×１０-4m2・℃／Ｗであ
るので、Rcs＝０．１１６℃／Ｗとなる。その時の温度
差はΔTcs ＝Rcs ×Pd＝５．６℃である。ソリ等により
接触面積が１／４になった場合、Rcs2＝０．４６４℃／
Ｗ，ΔTcs2＝２２．３℃となる。With respect to the examples of FIGS. 1A and 1B, specific numerical examples of the contact thermal resistance value will be shown below to clarify the effect of the present invention. Microwave output power 18 W class semiconductor device package base 2b contact area A = 155 mm 2 , A
When the class has no signal power consumption Pd = 48W and the base 2b and the metal carrier 1 are both made of copper, the contact thermal resistance Rcs in an ideal copper-copper contact state is Rcs = 1 /
It is represented by hcA. 1 / hc is called contact conductance, and in the case of copper, 1 / hc = 0.18 × 10 −4 m 2 · ° C./W, so that Rcs = 0.116 ° C./W. The temperature difference at that time is ΔTcs = Rcs × Pd = 5.6 ° C. If the contact area becomes 1/4 due to warping, etc., Rcs 2 = 0.464 ° C /
W, ΔTcs 2 = 22.3 ° C.
【００１３】実際上は、先に述べたように、機械加工精
度やソリ等の問題を補償し、安定化、均一化を図るため
従来はシリコーンコンパウンドを介在させている。この
場合の接触熱抵抗値の相当値Rcc は、Rcc ＝δG ／λc
A で表わされ、シリコンコンパウンドの平均厚さδG ＝
５０μ、熱伝導率λc ＝０．７９５Ｗ／ｍ℃の場合、Rc
c ＝０．４０６℃／Ｗ、ΔTcc ＝Rcc ×Pd＝１９．５℃
となる。In practice, as described above, a silicone compound is conventionally interposed to compensate for problems such as machining accuracy and warpage, and to stabilize and uniformize the problem. The equivalent value of contact thermal resistance Rcc in this case is Rcc = δ G / λc
A, the average thickness of the silicon compound δ G =
Rc at 50μ and thermal conductivity λc = 0.795W / m ° C
c = 0.406 ° C / W, ΔTcc = Rcc x Pd = 19.5 ° C
Becomes
【００１４】本発明のＩｎＧａフィラーを介在させた場
合の接触熱抵抗値の相当値Rci は、ＩｎＧａフィラーの
平均厚さδG ＝５０μ、熱伝導率λi ＝４３．５Ｗ／ｍ
℃として、Rci ＝δG ／λi A ＝０．００７４℃／Ｗ、
ΔTci ＝Rci ×Pd＝０．３６℃となる。このように、Ｉ
ｎＧａフィラーを用いることにより従来のシリコーンコ
ンパウンドの場合に比べて、接触熱抵抗値、接触部の温
度差は１／５４に低減し、改善される。The equivalent value Rci of the contact thermal resistance value when the InGa filler of the present invention is interposed is such that the average thickness of the InGa filler is δ G = 50 μ, and the thermal conductivity λ i = 43.5 W / m.
℃, Rci = δ G / λi A = 0.0074 ℃ / W,
ΔTci = Rci × Pd = 0.36 ° C. Thus, I
By using the nGa filler, the contact thermal resistance value and the temperature difference at the contact portion are reduced to 1/54 and improved as compared with the case of the conventional silicone compound.
【００１５】更に、接触抵抗の低減のため、図１Ｃに示
すような凹凸の噛み合せ構造を採用して、パッケージ基
底部２ｂと金属キャリア１との実効的な接触面積を拡大
する場合について数値例を示す。図１Ａの平面形（凹凸
面を設けない場合）に比べた接触面積の増大係数ｍは、
図２Ａに示すように、凹凸のピッチをＰ、深さをｄとす
れば、 ｍ＝（Ｐ＋ｄ）／Ｐ＝１＋ｄ／Ｐ （１） となる。これにより接触抵抗値及び温度差はさらに１／
ｍに低減される。Further, in order to reduce the contact resistance, a concave-convex meshing structure as shown in FIG. 1C is adopted to enlarge the effective contact area between the package base 2b and the metal carrier 1 by using a numerical example. Show. The increase factor m of the contact area as compared with the planar shape of FIG. 1A (when the uneven surface is not provided) is
As shown in FIG. 2A, when the pitch of the unevenness is P and the depth is d, m = (P + d) / P = 1 + d / P (1) As a result, the contact resistance value and temperature difference are 1 /
m.
【００１６】例としてＰ＝１．５mmとし、ｄ＝０．７
５，１．０，１．５又は３．０mmとすれば、それぞれｍ
＝１．５，１．６７，２．０又は３．０である。凹凸の
形状を図２Ｂに示すようにノコギリ波形にした場合に
は、 ｍ＝｛（Ｐ2 ＋ｄ2 ）1/2 ＋ｄ｝／Ｐ＝｛１＋（ｄ／Ｐ）2 ｝1/2 ＋ｄ／Ｐ (2) となる。Ｐ＝１．５mmとし、ｄ＝０．７５，１．０，
１．５又は３．０mmとすれば、それぞれｍ＝１．６２，
１．８７，２．４１又は４．２４となる。As an example, P = 1.5 mm and d = 0.7
If 5, 1.0, 1.5 or 3.0 mm, m
= 1.5, 1.67, 2.0 or 3.0. When the shape of the unevenness is a sawtooth waveform as shown in FIG. 2B, m = {(P 2 + d 2 ) 1/2 + d} / P = {1+ (d / P) 2 } 1/2 + d / P (2) P = 1.5 mm, d = 0.75,1.0,
If 1.5 or 3.0 mm, m = 1.62, respectively
It becomes 1.87, 2.41 or 4.24.
【００１７】凹凸形状を図２Ｃに示すように二等辺三角
形にした場合には、 ｍ＝２｛（Ｐ／２）2 ＋ｄ2 ｝1/2 ／Ｐ＝｛１＋（２ｄ／Ｐ）2 ｝1/2 (3) となる。Ｐ＝１．５mmとし、ｄ＝０．７５，１．０，
１．５又は３．０mmとすれば、それぞれｍ＝１．４１，
１．６７，２．２４又は４．１２となる。凹凸形状を図
２Ｄに示すように正弦波形にした場合には、接触面積の
増大係数ｍは図２Ｃの場合（（３）式）より更に大きく
なる。When the uneven shape is an isosceles triangle as shown in FIG. 2C, m = 2 {(P / 2) 2 + d 2 } 1/2 / P = {1+ (2d / P) 2 } 1 It becomes / 2 (3). P = 1.5 mm, d = 0.75,1.0,
If 1.5 or 3.0 mm, m = 1.41, respectively
It becomes 1.67, 2.24 or 4.12. When the concavo-convex shape has a sinusoidal waveform as shown in FIG. 2D, the contact area increase coefficient m becomes even larger than in the case of FIG. 2C (equation (3)).
【００１８】これまでの説明では、金属キャリア１にパ
ッケージ用溝１ａを設けるものとしたが、これを省略
し、パッキング用溝１ｂのみとしてもよい。また、図１
の実施例では、半導体パッケージの基底部２ｂが方形で
あるため、パッキング用溝１ｂ及びパッキング１２をロ
字状に形成したが、もし基底部２ｂが他の形状（例えば
円又はだ円状）であれば、パッキング用溝１ｂ及びパッ
キング１２はその形状に合せればよい。In the above description, the metal carrier 1 is provided with the package groove 1a, but it may be omitted and only the packing groove 1b may be provided. Also, FIG.
In the embodiment, since the base portion 2b of the semiconductor package is rectangular, the packing groove 1b and the packing 12 are formed in a square shape, but if the base portion 2b has another shape (for example, a circle or an ellipse). If so, the packing groove 1b and the packing 12 may be matched to their shapes.
【００１９】また、これまでの説明では、ＩｎＧａフィ
ラー１１、パッキング用溝１ｂ及びパッキング１２或い
は凹凸の噛み合せ構造をパッケージ基底部２ｂと金属キ
ャリア１との対向部に設けるものとしたが、これらを金
属キャリア１と筐体シャーシ（又は放熱台）５との対向
部に設けても同様の効果が得られることは明らかであ
る。Further, in the above description, the InGa filler 11, the packing groove 1b and the packing 12 or the engaging structure of the concavities and convexities are provided at the opposing portion between the package base portion 2b and the metal carrier 1, but these are made of metal. It is obvious that the same effect can be obtained even if the carrier 1 and the chassis chassis (or the heat dissipation table) 5 are provided at the facing portions.
【００２０】[0020]
【発明の効果】この発明によれば、パッケージ基底部２
ｂと金属キャリア１或いは金属キャリア１と筐体シャー
シ（又は放熱台）５との接触部の隙間をＩｎＧａフィラ
ーで完全に埋めることができ、しかもＩｎＧａフィラー
の溶液性のため、熱膨張／収縮のため隙間が変化して
も、常にＩｎＧａフィラーで満たされている。このた
め、熱が流れる接触面積が増大し、しかも一定化でき、
接触熱抵抗値の低減および安定化、均一化が可能とな
る。これによって半導体チップの動作温度が低下し、ま
た、均一化し、信頼性が高くなるのみならず、電気的特
性の向上、均一化の効果にも寄与する。またＩｎＧａフ
ィラーの導電性のため、高周波接地も良好、均一化する
利点もある。According to the present invention, the package base 2
It is possible to completely fill the gap between the b and the metal carrier 1 or the metal carrier 1 and the housing chassis (or heat dissipation table) 5 with InGa filler, and the thermal expansion / contraction of the InGa filler due to its solution nature. Therefore, even if the gap changes, it is always filled with the InGa filler. For this reason, the contact area through which heat flows can be increased and can be made uniform,
The contact heat resistance value can be reduced, stabilized, and made uniform. This not only lowers the operating temperature of the semiconductor chip and also makes the semiconductor chip uniform and highly reliable, but also contributes to the effect of improving and uniforming the electrical characteristics. Further, due to the conductivity of the InGa filler, there is an advantage that the high frequency grounding is good and uniform.
【００２１】さらに、はんだ付けの場合と違い、半導体
デバイスの取付け、取外しの場合に、加熱が必要でな
く、従来のネジ止めの場合と同様に簡単に行える。ま
た、上記接触部に、互いに噛み合う凹凸面を設けた場合
には接着面積が増大し接触熱抵抗値をいっそう低減でき
る。上述したように、放熱性、高周波接地特性が良くな
るため、従来使用が制限されていたものよりも高出力お
よび大型の半導体デバイスの使用が可能になり、マイク
ロ波機器の高出力化、高性能化が実現できる。Further, unlike the case of soldering, heating is not required when attaching and detaching a semiconductor device, and it can be easily performed as in the case of conventional screwing. Further, when the contact portion is provided with the uneven surface which meshes with each other, the adhesion area is increased and the contact thermal resistance value can be further reduced. As described above, the heat dissipation and high-frequency grounding characteristics are improved, making it possible to use higher-power and larger-sized semiconductor devices than previously restricted in use, and to achieve higher output and higher performance in microwave equipment. Can be realized.
【図１】Ａはこの発明の実施例を示す縦断面図、Ｂは回
路基板３，４を搭載したＡの金属キャリア１の平面図、
ＣはＡのパッケージ基底部２ｂと金属キャリア１との対
接面に互いに噛み合う凹凸面を形成した場合を示す要部
の縦断面図。1 is a longitudinal sectional view showing an embodiment of the present invention, B is a plan view of a metal carrier 1 of A on which circuit boards 3 and 4 are mounted,
C is a longitudinal cross-sectional view of a main part showing a case where a concavo-convex surface that meshes with each other is formed on the contact surface between the package base portion 2b of A and the metal carrier 1.
【図２】図１Ｃの凹凸面１ｄ，２ｄの種々の形状を示す
要部の縦断面図。FIG. 2 is a vertical cross-sectional view of a main part showing various shapes of uneven surfaces 1d and 2d of FIG. 1C.
【図３】従来の半導体デバイスの放熱取付け構造を示す
要部の縦断面図。FIG. 3 is a vertical cross-sectional view of a main part showing a conventional heat dissipation mounting structure for a semiconductor device.
Claims (4)
キャリア上に搭載し、その金属キャリアを筐体シャーシ
又は放熱台上に搭載して成る半導体デバイスの放熱取付
け構造において、 上記金属キャリアの上記半導体パッケージの基底部と対
向する上面の周辺にリング状のパッキング用溝が形成さ
れ、その溝にリング状のパッキングが充填され、 上記パッキング用溝に囲まれた上記金属キャリアの上面
と上記半導体パッケージの基底部との間にＩｎＧａフィ
ラーが介在されることを特徴とする、 半導体デバイスの放熱取付け構造。1. A heat dissipation mounting structure for a semiconductor device, comprising: mounting a semiconductor package on a plate-shaped metal carrier for heat dissipation; and mounting the metal carrier on a chassis chassis or a heat dissipation base. A ring-shaped packing groove is formed around an upper surface facing the base of the semiconductor package, and the ring-shaped packing is filled in the groove, and the upper surface of the metal carrier surrounded by the packing groove and the semiconductor package. A heat dissipation mounting structure for a semiconductor device, characterized in that an InGa filler is interposed between the base part and the bottom part of the.
に囲まれた金属キャリアの上面と、その上面と対向する
上記半導体パッケージの基底部とに、互いに噛み合う凹
凸面がそれぞれ形成されていることを特徴とする半導体
デバイスの放熱取付け構造。2. The uneven surface which meshes with each other is formed on an upper surface of the metal carrier surrounded by the packing groove and a base portion of the semiconductor package facing the upper surface, respectively. The heat dissipation mounting structure of the characteristic semiconductor device.
キャリア上に搭載し、その金属キャリアを筐体シャーシ
又は放熱台上に搭載して成る半導体デバイスの放熱取付
け構造において、 上記筐体シャーシ又は放熱台の上記金属キャリアと対向
する上面の周辺にリング状のパッキング用溝が形成さ
れ、その溝にリング状のパッキングが充填され、 上記パッキング用溝に囲まれた上記筐体シャーシ又は放
熱台の上面と上記金属キャリアの底面との間にＩｎＧａ
フィラーが介在されることを特徴とする、 半導体デバイスの放熱取付け構造。3. A heat dissipation mounting structure for a semiconductor device, comprising: mounting a semiconductor package on a plate-shaped metal carrier for heat dissipation; and mounting the metal carrier on a chassis chassis or a heat dissipation base. A ring-shaped packing groove is formed around the upper surface of the heat sink facing the metal carrier, and the ring-shaped packing is filled in the groove, and the housing chassis or the heat sink is surrounded by the packing groove. InGa between the top surface and the bottom surface of the metal carrier
A heat dissipation mounting structure for semiconductor devices, characterized in that a filler is interposed.
に囲まれた筐体シャーシ又は放熱台の上面と、その上面
と対向する上記金属キャリアの底面とに、互いに噛み合
う凹凸面がそれぞれ形成されていることを特徴とする半
導体デバイスの放熱取付け構造。4. An uneven surface that meshes with each other is formed on an upper surface of a chassis chassis or a heat sink surrounded by the packing groove and a bottom surface of the metal carrier facing the upper surface. A heat dissipation mounting structure for semiconductor devices.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3212359A JPH0555419A (en) | 1991-08-23 | 1991-08-23 | Structure of fitting semiconductor device to heat sink |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3212359A JPH0555419A (en) | 1991-08-23 | 1991-08-23 | Structure of fitting semiconductor device to heat sink |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0555419A true JPH0555419A (en) | 1993-03-05 |
Family
ID=16621244
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3212359A Pending JPH0555419A (en) | 1991-08-23 | 1991-08-23 | Structure of fitting semiconductor device to heat sink |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0555419A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6845012B2 (en) | 2000-04-19 | 2005-01-18 | Denso Corporation | Coolant cooled type semiconductor device |
| JP2005203778A (en) * | 2004-01-07 | 2005-07-28 | Thermagon Inc | Heat sink and heat spreader assembly |
| JP2007234905A (en) * | 2006-03-01 | 2007-09-13 | Nec Corp | High power amplifier |
| US7285429B2 (en) | 2002-11-12 | 2007-10-23 | Fujitsu Limited | Mounting device for high frequency microwave devices |
| JP2008004745A (en) * | 2006-06-22 | 2008-01-10 | Denso Corp | Electronic apparatus |
| JP2011071550A (en) * | 2010-12-21 | 2011-04-07 | Denso Corp | Electronic apparatus |
| JP2011187331A (en) * | 2010-03-09 | 2011-09-22 | Stanley Electric Co Ltd | Headlight for vehicle |
| JP2015056608A (en) * | 2013-09-13 | 2015-03-23 | 株式会社東芝 | Semiconductor package and semiconductor device |
| US20150102479A1 (en) * | 2013-10-15 | 2015-04-16 | Infineon Technologies Ag | Electrically insulating thermal interface on the discontinuity of an encapsulation structure |
-
1991
- 1991-08-23 JP JP3212359A patent/JPH0555419A/en active Pending
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7027302B2 (en) | 2000-04-19 | 2006-04-11 | Denso Corporation | Coolant cooled type semiconductor device |
| US7106592B2 (en) | 2000-04-19 | 2006-09-12 | Denso Corporation | Coolant cooled type semiconductor device |
| US7248478B2 (en) | 2000-04-19 | 2007-07-24 | Denso Corporation | Coolant cooled type semiconductor device |
| US7250674B2 (en) | 2000-04-19 | 2007-07-31 | Denso Corporation | Coolant cooled type semiconductor device |
| US6845012B2 (en) | 2000-04-19 | 2005-01-18 | Denso Corporation | Coolant cooled type semiconductor device |
| US7729129B2 (en) | 2002-11-12 | 2010-06-01 | Fujitsu Limited | Mounting device for high frequency microwave devices |
| US7285429B2 (en) | 2002-11-12 | 2007-10-23 | Fujitsu Limited | Mounting device for high frequency microwave devices |
| JP2005203778A (en) * | 2004-01-07 | 2005-07-28 | Thermagon Inc | Heat sink and heat spreader assembly |
| JP2007234905A (en) * | 2006-03-01 | 2007-09-13 | Nec Corp | High power amplifier |
| JP2008004745A (en) * | 2006-06-22 | 2008-01-10 | Denso Corp | Electronic apparatus |
| JP4710735B2 (en) * | 2006-06-22 | 2011-06-29 | 株式会社デンソー | Manufacturing method of electronic device |
| JP2011187331A (en) * | 2010-03-09 | 2011-09-22 | Stanley Electric Co Ltd | Headlight for vehicle |
| JP2011071550A (en) * | 2010-12-21 | 2011-04-07 | Denso Corp | Electronic apparatus |
| JP2015056608A (en) * | 2013-09-13 | 2015-03-23 | 株式会社東芝 | Semiconductor package and semiconductor device |
| US20150102479A1 (en) * | 2013-10-15 | 2015-04-16 | Infineon Technologies Ag | Electrically insulating thermal interface on the discontinuity of an encapsulation structure |
| US9437513B2 (en) * | 2013-10-15 | 2016-09-06 | Infineon Technologies Ag | Electrically insulating thermal interface on the discontinuity of an encapsulation structure |
| US20160372399A1 (en) * | 2013-10-15 | 2016-12-22 | Infineon Technologies Ag | Electrically insulating thermal interface on the discontinuity of an encapsulation structure |
| US11049790B2 (en) * | 2013-10-15 | 2021-06-29 | Infineon Technologies Ag | Electrically insulating thermal interface on the discontinuity of an encapsulation structure |
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