JPH0553281B2 - - Google Patents

Info

Publication number
JPH0553281B2
JPH0553281B2 JP62267839A JP26783987A JPH0553281B2 JP H0553281 B2 JPH0553281 B2 JP H0553281B2 JP 62267839 A JP62267839 A JP 62267839A JP 26783987 A JP26783987 A JP 26783987A JP H0553281 B2 JPH0553281 B2 JP H0553281B2
Authority
JP
Japan
Prior art keywords
electrode
resistor
substrate
electrodes
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62267839A
Other languages
Japanese (ja)
Other versions
JPH01109702A (en
Inventor
Sunao Oosato
Koji Azuma
Mitsuru Yokoyama
Yozo Obara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hokuriku Electric Industry Co Ltd
Original Assignee
Hokuriku Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hokuriku Electric Industry Co Ltd filed Critical Hokuriku Electric Industry Co Ltd
Priority to JP62267839A priority Critical patent/JPH01109702A/en
Publication of JPH01109702A publication Critical patent/JPH01109702A/en
Publication of JPH0553281B2 publication Critical patent/JPH0553281B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C13/00Resistors not provided for elsewhere
    • H01C13/02Structural combinations of resistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Details Of Resistors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Adjustable Resistors (AREA)
  • Thermistors And Varistors (AREA)

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) この発明は、チツプ状の絶縁体基板の表面に抵
抗体が設けられ、この基板の両端部に電極が形成
されたチツプ抵抗器との製造方法に関する。
[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to a chip in which a resistor is provided on the surface of a chip-shaped insulating substrate, and electrodes are formed on both ends of this substrate. The present invention relates to a resistor and a manufacturing method thereof.

(従来の技術) 従来、チツプ抵抗器の電極の構造は、ガラスを
バインダに用いてAg−Pt等を成分とするいわゆ
るメタルグレーズペーストを塗布し焼成して形成
したものであつた。
(Prior Art) Conventionally, the electrode structure of a chip resistor was formed by applying a so-called metal glaze paste containing Ag-Pt or the like as a component using glass as a binder and firing the paste.

また、特公昭58−46161号公報に開示されてい
るように、メタルグレーズによる電極を、熱硬化
性樹脂中にAgを混入したAg−レンジ系の導電性
ペーストによつて内包し加熱硬化させて電極を形
成したものもある。
Furthermore, as disclosed in Japanese Patent Publication No. 58-46161, metal glaze electrodes are encapsulated in an Ag-range conductive paste containing Ag mixed into a thermosetting resin and cured by heating. Some have electrodes formed on them.

(発明が解決しようとする問題点) 上記従来の技術の前者の場合、ハンダ付けの際
にメタルグレーズ中のAg粒子がハンダと合金し、
いわゆるハンダくわれが生じ、ハンダ強度が低下
するとともに、ハンダの付け直しもできないとい
う問題点がある。さらに、この場合電極は抵抗体
が設けられた側にのみ形成されているので、回路
基板にハンダ付けした際の固着力強度が低いとい
う問題点がある。
(Problem to be Solved by the Invention) In the former case of the above conventional technology, Ag particles in the metal glaze alloy with the solder during soldering,
There is a problem in that so-called solder cracks occur, which reduces solder strength and makes it impossible to resolder. Furthermore, in this case, since the electrode is formed only on the side where the resistor is provided, there is a problem that the strength of the adhesion force when soldering to the circuit board is low.

また、上記従来の技術の後者の場合、メタルグ
レーズの電極をAg−レジンペーストで全体的に
被わなければならず、極めて小さいチツプ抵抗器
の電極部を正確に内包するように塗布するのは比
較的難しい上、樹脂で電極全体を被うため電極を
ハンダ付けした後のハンダ強度が弱いという問題
点がある。
In addition, in the latter case of the above-mentioned conventional technology, the metal glaze electrode must be entirely covered with Ag-resin paste, and it is difficult to apply the paste so as to precisely cover the electrode part of the extremely small chip resistor. In addition to being relatively difficult, there is a problem in that the solder strength after soldering the electrodes is weak because the entire electrode is covered with resin.

この発明は上記従来の技術の問題点に鑑みて成
されたもので、ハンダくわれに強く、回路基板に
ハンダ付けした際の固着力が大きく、製造も容易
なチツプ抵抗器とその製造方法を提供することを
目的とする。
This invention was made in view of the problems of the prior art described above, and provides a chip resistor that is resistant to solder cracks, has a large adhesion force when soldered to a circuit board, and is easy to manufacture, and a method for manufacturing the same. The purpose is to provide.

〔発明の構成〕[Structure of the invention]

(問題点を解決するための手段) この発明は、絶縁性セラミツク基板表面の両端
部に抵抗体と直接に接続されたメタルグレーズ系
の第1電極を有し、基板裏面の前記基板を挟んで
この第1電極と対向する位置にもメタルグレーズ
系の第2電極を有し、この第1、及び第2電極と
直接に接続されたAg−レジン系の第3電極を有
し、該第3電極は前記基板の両端面において略コ
の字状にメタルグレーズ系の第1電極および第2
電極上に一部重畳して設けられ、さらに前記第
1、第2電極の一部と第3電極を覆うNiメツキ
層とこのNiメツキ層の上に積層されたハンダメ
ツキ層とを有するチツプ抵抗器である。
(Means for Solving the Problems) This invention has a first electrode of a metal glaze type directly connected to a resistor at both ends of the surface of an insulating ceramic substrate, and has a first electrode of a metal glaze type connected directly to a resistor on both sides of the substrate on the back side of the substrate. A metal glaze-based second electrode is also provided at a position facing the first electrode, and an Ag-resin-based third electrode is directly connected to the first and second electrodes. The electrodes are formed in a substantially U-shape on both end surfaces of the substrate, and are made of a metal glaze type first electrode and a second electrode.
A chip resistor comprising a Ni plating layer which is provided partially overlapping an electrode and further covers parts of the first and second electrodes and a third electrode, and a solder plating layer laminated on the Ni plating layer. It is.

またこの発明は、絶縁性セラミツク基板の表面
にメタルグレーズ系の第1電極を印刷形成する工
程と、基板裏面の前記基板を挟んでこの第1電極
と対向する位置にもメタルグレーズ系の第2電極
を印刷形成する工程と前記第1電極が直接接続さ
れる抵抗体を印刷形成してガラスコートする工程
と、第1、第2電極及び抵抗体が形成された基板
をその表裏面端部に第1、第2電極が位置する状
態にスクライブする工程と、スクライブ後の各基
板の側端部にレジン含有銀塗料を略コの字状に表
裏面の第1、第2電極上に一部重畳する状態に厚
く直接に塗布し低温で加熱処理して第3電極を形
成する工程と、第1、第2及び第3電極の外面側
にNiメツキ処理する工程と、Niメツキ層にさら
にハンダメツキ処理する工程と、基板をスクライ
ブする前又はハンダメツキ処理後に抵抗体にトリ
ミングしてからレジンコートを施す工程とからな
ることを特徴とするチツプ抵抗器の製造方法であ
る。
This invention also includes a step of printing and forming a metal glaze-based first electrode on the surface of an insulating ceramic substrate, and a metal glaze-based second electrode on the back side of the substrate at a position opposite to the first electrode with the substrate sandwiched therebetween. a step of printing and forming an electrode; a step of printing and glass-coating a resistor to which the first electrode is directly connected; and a step of attaching the substrate on which the first and second electrodes and the resistor are formed to the front and back edges thereof. A process of scribing where the first and second electrodes are located, and applying a resin-containing silver paint to the side edges of each substrate after scribing in a roughly U-shape on the first and second electrodes on the front and back surfaces. A process of forming a third electrode by directly applying a thick coating to the overlapping state and heat-treating at a low temperature, a process of applying Ni plating to the outer surfaces of the first, second and third electrodes, and further solder plating to the Ni plating layer. This method of manufacturing a chip resistor is characterized by comprising a step of processing the resistor, and a step of trimming the resistor and applying a resin coating to the resistor before scribing the substrate or after solder plating.

(作用) この発明のチツプ抵抗器は、絶縁体基板の両端
部の表裏面及び端面に設けた第1、第2、第3電
極をNiメツキで覆つてハンダくわれを防ぎ、さ
らにハンダメツキ処理してNiメツキ層のハンダ
濡れ性を改善してある。
(Function) In the chip resistor of the present invention, the first, second, and third electrodes provided on the front and back surfaces and end surfaces of both ends of the insulating substrate are covered with Ni plating to prevent solder cracking, and further solder plating is performed. The solder wettability of the Ni plating layer has been improved.

また基板の下面側では第3電極を第2電極に一
部重畳して設けてあるため、電極が段状に形成さ
れ、本発明チツプ抵抗器をプリント回路基板に取
り付けた際、電極の下面側と回路基板との間に生
じた隙間にハンダが回り込み、本発明チツプ抵抗
器が小さくても充分な固着力が得られるようにな
つている。
In addition, since the third electrode is provided partially overlapping the second electrode on the bottom side of the substrate, the electrode is formed in a stepped shape, and when the chip resistor of the present invention is attached to a printed circuit board, the bottom side of the electrode The solder wraps around the gap created between the chip resistor and the circuit board, and even if the chip resistor of the present invention is small, sufficient adhesion force can be obtained.

さらに本発明のチツプ抵抗器の製造方法では、
スクライブ後の基板の粗い両側面を含む側端部に
レジン含有銀塗料を表裏面の第1、第2電極に一
部重畳して塗布し、低温で加熱処理してAg−レ
ジン系の第3電極を形成するものであるから、基
板に対する固着力が強く、また第3電極が適度の
柔軟性を有するので、大きな機械的強度が得られ
る。
Furthermore, in the method for manufacturing a chip resistor of the present invention,
After scribing, a resin-containing silver paint is applied to the side edges including both rough sides of the substrate, partially overlapping the first and second electrodes on the front and back surfaces, and heat-treated at a low temperature to form an Ag-resin-based third electrode. Since it forms an electrode, it has a strong adhesion to the substrate, and since the third electrode has appropriate flexibility, it can provide high mechanical strength.

加えて、メツキ工程において第3電極及びレジ
ンコートがメツキ液の浸透を効果的に防ぐので、
電極や抵抗体に剥離等の欠陥を生じ難い。
In addition, in the plating process, the third electrode and resin coat effectively prevent penetration of the plating solution,
Defects such as peeling are less likely to occur in electrodes and resistors.

(実施例) 以下この発明の一実施例について図面に基づい
て説明する。
(Example) An example of the present invention will be described below based on the drawings.

この実施例のチツプ抵抗器1は、第1図に示す
ように、セラミツクの基板2の表面に凸型の抵抗
体3が印刷形成され、この両端に電極4が設けら
れている。抵抗体3は、酸化ルテニウム約10μの
厚みに設け、レーザー又はサンドブラストにより
凸型の底辺から上方に向つてトリミング溝5を形
成し、抵抗値のトリミングが成されている。
In the chip resistor 1 of this embodiment, as shown in FIG. 1, a convex resistor 3 is printed on the surface of a ceramic substrate 2, and electrodes 4 are provided at both ends of the convex resistor 3. The resistor 3 is made of ruthenium oxide and has a thickness of about 10 μm, and a trimming groove 5 is formed upward from the bottom of the convex shape by laser or sandblasting to trim the resistance value.

このチツプ抵抗器1の電極4は、抵抗体3が直
接に接続している第1電極6と、この第1電極6
と基板2をはさんで対向して形成された第2電極
7を有し、この第1、第2電極6,7は、Ag−
Pd、Ag−Pt等のメタルグレーズペーストを印刷
形成したものである。さらに、第1、第2電極
6,7をはさんで基板2の端面に、キシレン又は
エポキシフエノール樹脂にAgを混入したAg−レ
ジン系の導電性ペーストによる第3電極8が設け
られ、この第3電極8は、第1、第2電極6,7
を一部被覆するように設けられ、両者の導通を図
つている。そして、この第1、第2、第3電極全
体を覆つてNiメツキ9及びハンダメツキ10が
施されている。
The electrode 4 of this chip resistor 1 includes a first electrode 6 to which the resistor 3 is directly connected, and a first electrode 6 to which the resistor 3 is directly connected.
and a second electrode 7 formed to face each other with the substrate 2 in between, and the first and second electrodes 6 and 7 are made of Ag-
It is formed by printing a metal glaze paste such as Pd or Ag-Pt. Furthermore, a third electrode 8 is provided on the end surface of the substrate 2 with the first and second electrodes 6 and 7 in between, and is made of an Ag-resin conductive paste made by mixing Ag into xylene or epoxy phenol resin. The three electrodes 8 include the first and second electrodes 6 and 7.
It is provided so as to cover a portion of the wafer, thereby providing electrical continuity between the two. Then, Ni plating 9 and solder plating 10 are applied to cover the entire first, second, and third electrodes.

また、抵抗体3の表面には、ガラスコート11
及びレジンコート12を施して保護している。
Further, the surface of the resistor 3 is coated with a glass coat 11.
and is protected by applying a resin coat 12.

この実施例のチツプ抗器の製造方法は、第3図
AないしFに示すように、先ず、基板となるセラ
ミツク板13のスリツト14をはさんで所定間隔
で第1電極6となるメタルグレーズペーストを複
数列印刷して、900℃近い温度で焼成する。さら
に同様にして第2電極7も第1電極6と対向する
位置に形成する。次に、第3図Bに示すように、
第1電極6の間のセラミツク板13上にマトリク
ス状に抵抗体3を印刷形成し、平均850℃の温度
で焼成する。そして、第3図Cに示すように、抵
抗体3の表面にガラスコート11を施し平均650
℃の温度で焼成する。この後、セラミツク板13
を各チツプ抵抗器毎に縦横に設けられたスリツト
14に沿つて切断(スクライブ)し、第3図Dに
示すように、基板2の端面にAg−レジン系の導
電性ペーストの第3電極8を20μ程度の厚みに塗
布し、200℃程度の温度で硬化させる。そして、
第3図E,Fに示すように、Niメツキ9、ハン
ダメツキ10を各々順次施し、第1、第2、第3
電極6,7,8を被覆する。
As shown in FIGS. 3A to 3F, the method for manufacturing the chip resistor of this embodiment is to first apply metal glaze paste, which will become the first electrodes 6, at predetermined intervals across the slits 14 of the ceramic plate 13, which will become the substrate. is printed in multiple rows and fired at a temperature close to 900℃. Furthermore, the second electrode 7 is also formed at a position facing the first electrode 6 in the same manner. Next, as shown in Figure 3B,
The resistors 3 are printed in a matrix on the ceramic plate 13 between the first electrodes 6 and fired at an average temperature of 850°C. Then, as shown in FIG.
Baking at a temperature of °C. After this, the ceramic plate 13
is cut (scribed) along the slits 14 provided vertically and horizontally for each chip resistor, and as shown in FIG. is applied to a thickness of about 20μ and cured at a temperature of about 200℃. and,
As shown in Fig. 3 E and F, Ni plating 9 and solder plating 10 are applied in sequence, and the
Cover the electrodes 6, 7, and 8.

この場合、スリツト14は基板の両側より設け
られているため、セラミツク基板端面に、樹脂を
一部重畳する状態で塗布すると、電気的にも機械
的にも良好な状態が得られる。
In this case, since the slits 14 are provided from both sides of the substrate, good electrical and mechanical conditions can be obtained by applying the resin to the end face of the ceramic substrate so as to partially overlap the resin.

この方法によるとセラミツク基板端面におい
て、端子電極の剥がれやスラツク等の欠陥が生じ
なくなる。なお第1図のように端子電極は即端部
5面に形成することもできる。
According to this method, defects such as peeling of terminal electrodes and slack will not occur on the end face of the ceramic substrate. Incidentally, as shown in FIG. 1, the terminal electrode can also be formed on the 5 surfaces of the immediate end portion.

最後に、各チツプ抵抗器の抵抗体3をトリミン
グして抵抗値を調整し、エポキシ樹脂等のレジン
コート12を施し200℃付近の温度で硬化させる。
Finally, the resistor 3 of each chip resistor is trimmed to adjust the resistance value, and a resin coat 12 of epoxy resin or the like is applied and cured at a temperature around 200°C.

また、トリミングは、第3図Cの状態で行うこ
ともあり、この場合はその後レジンコート12を
施して第3図D以下の工程を行う。これによつ
て、セラミツク板13をチツプ毎に分離しない状
態で抵抗値のトリミングを行うので効率良くトリ
ミング作業を行うことができ、しかもレジンコー
ト12によつて、後のメツキ作業時にも抵抗体に
悪影響を与えることもない。
Further, trimming may be performed in the state shown in FIG. 3C, in which case a resin coat 12 is then applied and the steps shown in FIG. 3D and subsequent steps are performed. As a result, the resistance value can be trimmed without separating the ceramic plate 13 into individual chips, so the trimming work can be carried out efficiently.Furthermore, the resin coat 12 allows the resistance value to be trimmed without separating the ceramic plate 13 into individual chips. It has no negative impact.

この実施例のチツプ抵抗器によれば、ハンダく
われに対して電極4の耐性が向上し、しかも、回
路基板の曲げに対しても、メタルグレーズ系のみ
でできた電極とを比べ柔軟性が高いので強い。ま
た、ハンダ付けの際の回路基板に対する固着力
も、第1、第2電極6,7が回路基板に強固にハ
ンダ付けされるので、極めて強く、第3電極を
Ag−レジン系にしたことによる固着力の低下は
生じない。
According to the chip resistor of this embodiment, the resistance of the electrode 4 to solder cracks is improved, and moreover, it is more flexible than electrodes made only of metal glaze type against bending of the circuit board. It's expensive, so it's strong. In addition, the adhesion to the circuit board during soldering is extremely strong because the first and second electrodes 6 and 7 are firmly soldered to the circuit board, and the third electrode
There is no decrease in adhesion strength due to the Ag-resin system.

尚、この発明のチツプの抵抗器の抵抗体は、金
属皮膜抵抗体、炭素皮膜抵抗体等その用途に合わ
せて適宜選定し得るものである。またメタルグレ
ーズペースト、Ag−レジン系導電性ペーストの
成分は、適宜他の添加物が入つていても良い。本
願のものは抵抗体上にガラスコートを施しトリミ
ングしているが、適宜公知の方法で変更しうるも
のであり、他の抵抗体を用いたチツプ部品にも同
様に応用でき、この実施例のものに限定されるも
のではない。
The resistor of the chip resistor of the present invention may be appropriately selected depending on the intended use, such as a metal film resistor or a carbon film resistor. Further, the components of the metal glaze paste and the Ag-resin conductive paste may contain other additives as appropriate. In the present application, a glass coat is applied and trimmed on the resistor, but this can be changed as appropriate by a known method, and it can be similarly applied to chip parts using other resistors. It is not limited to things.

〔発明の効果〕〔Effect of the invention〕

この発明のチツプ抵抗器は、基板の両面に設け
たメタルグレーズ系の第1、第2電極にまたがつ
て基板の端面にAg−レジン系の第3電極を設け、
この第1、第2、第3電極を覆うNiメツキ層及
び該Niメツキ層を覆うハンダメツキ層を形成し
たので、ハンダくわれに強く、回路基板への付け
直しが可能である。また基板の下面側の第2電極
に一部重畳して第3電極を設けたので、基板の下
面側の電極で段差が形成され、回路基板へハンダ
付けした際、下面側電極と回路基板の間に生じる
〓間にハンダが回り込んで強い固着力が得られ
る。しかも基板の端面に設けたAg−レジン系の
第3電極が適度の柔軟性を有するので、回路基板
の曲げに対しても十分に耐え得るものである。
In the chip resistor of the present invention, a third electrode made of Ag-resin is provided on the end surface of the substrate, spanning the first and second electrodes made of metal glaze provided on both sides of the substrate.
Since a Ni plating layer covering the first, second, and third electrodes and a solder plating layer covering the Ni plating layer were formed, it is resistant to solder cracks and can be reattached to the circuit board. In addition, since the third electrode was provided partially overlapping the second electrode on the bottom side of the board, a step was formed by the electrode on the bottom side of the board, and when soldering to the circuit board, the bottom electrode and the circuit board The solder goes around between the gaps and creates a strong bonding force. Moreover, since the Ag-resin third electrode provided on the end surface of the substrate has appropriate flexibility, it can sufficiently withstand bending of the circuit board.

また本発明によるチツプ抵抗器の製造方法は、
スクライブ後の基板側端部5面にレジン含有銀塗
料を表裏面の第1、第2電極上に一部重畳する状
態で直接に塗布し低温で加熱処置して第3電極を
形成するので、切断されたままの粗い基板断面に
対し直接に接合し第3電極の接着力が強い。また
ハンダ付け用電極にメツキ処理する際、第3電極
がメツキ液の浸透を効果的に防止し、電極に剥れ
やクラツク等の欠陥を生ずることのない高品質の
製品を製造し得る。またメツキ前にレジンコート
をすればメツキ液に弱い抵抗体をレジンコートに
より保護するので、抵抗体の特性も維持できる。
Furthermore, the method for manufacturing a chip resistor according to the present invention includes:
After scribing, the resin-containing silver paint is applied directly to the 5 sides of the substrate side edge in a state that it partially overlaps the first and second electrodes on the front and back sides, and is heated at a low temperature to form the third electrode. The third electrode has a strong adhesion force because it is directly bonded to the rough cross section of the as-cut substrate. Furthermore, when plating soldering electrodes, the third electrode effectively prevents penetration of the plating solution, making it possible to manufacture high-quality products without defects such as peeling or cracks in the electrodes. Furthermore, by applying a resin coat before plating, the resistor, which is susceptible to plating liquid, is protected by the resin coat, so the characteristics of the resistor can be maintained.

従つて、今日の実装密度の高度化の要求により
チツプ抵抗器も小型化しているが、電極が小さく
ても十分な固着力が得られ、電気製品の小型軽量
化、信頼性、耐久性及び生産性の向上に大きく寄
与するものである。
Therefore, chip resistors are also becoming smaller due to today's demands for higher packaging density, but even with small electrodes, sufficient adhesion force can be obtained, making electrical products smaller and lighter, more reliable, more durable, and more productive. This greatly contributes to improving sexual performance.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明のチツプ抵抗器の一実施例の
平面図、第2図は第1図のA−A断面図、第3図
A,B,C,D,E,Fはこの実施例のチツプ抵
抗器の製造工程を示す縦断面図である。 1……チツプ抵抗器、2……基板、3……抵抗
体、4……電極、5……トリミング溝、6……第
1電極、7……第2電極、8……第3電極、9…
…Niメツキ、10……ハンダメツキ、11……
ガラスコート、12……レンジコート、13……
セラミツク板、14……スリツト。
Fig. 1 is a plan view of one embodiment of the chip resistor of the present invention, Fig. 2 is a sectional view taken along line A-A in Fig. 1, and Fig. 3 A, B, C, D, E, and F are this embodiment. FIG. 3 is a vertical cross-sectional view showing the manufacturing process of the chip resistor. DESCRIPTION OF SYMBOLS 1... Chip resistor, 2... Substrate, 3... Resistor, 4... Electrode, 5... Trimming groove, 6... First electrode, 7... Second electrode, 8... Third electrode, 9...
...Ni plating, 10... Solder plating, 11...
Glass coat, 12... Range coat, 13...
Ceramic board, 14...slit.

Claims (1)

【特許請求の範囲】 1 絶縁性セラミツクの基板表面に印刷形成され
た抵抗体の両端に多層構造の電極が設けられたチ
ツプ抵抗器において、絶縁性セラミツク基板表面
の両端部に抵抗体と直接に接続されたメタルグレ
ーズ系の第1電極を有し、基板裏面の前記基板を
挟んでこの第1電極と対向する位置にもメタルグ
レーズ系の第2電極を有し、この第1、及び第2
電極と直接に接続されたAg−レジン系の第3電
極を有し、該第3電極は前記基板の両端面におい
て略コの字状にメタルグレーズ系の第1電極及び
第2電極上に一部重畳して設けられ、さらに前記
第1、第2電極の一部分と第3電極を覆うNiメ
ツキ層とこのNiメツキ層の上に積層されたハン
ダメツキ層とを有することを特徴とするチツプ抵
抗器。 2 絶縁性セラミツク基板の表面にメタルグレー
ズ系の第1電極を印刷形成する工程と、基板裏面
の前記基板を挟んでこの第1電極と対向する位置
にもメタルグレーズ系の第2電極を印刷形成する
工程と、前記第1電極が直接接続される抵抗体を
印刷形成してガラスコートする工程と、第1、第
2電極及び抵抗体が形成された基板をその表裏面
端部に第1、第2電極が位置する状態にスクライ
ブする工程と、スクライブ後の各基板の側端部に
レジン含有銀塗料を略コの字状に表裏面の第1、
第2電極上に一部重畳する状態に厚く直接に塗布
し低温で加熱処理して第3電極を形成する工程
と、第1、第2及び第3電極の外面側にNiメツ
キ処理する工程と、Niメツキ層にさらにハンダ
メツキ処理する工程と、基板をスクライブする前
又はハンダメツキ処理後に抵抗体にトリミングし
てからレジンコートを施す工程とからなることを
特徴とするチツプ抵抗器の製造方法。
[Claims] 1. In a chip resistor in which multilayer structure electrodes are provided at both ends of a resistor printed on the surface of an insulating ceramic substrate, the resistor is directly connected to the resistor at both ends of the surface of the insulating ceramic substrate. A metal glaze-based first electrode is connected thereto, and a metal glaze-based second electrode is also provided at a position opposite to the first electrode on the back side of the substrate across the substrate, and the first and second electrodes are connected to each other.
A third electrode made of Ag-resin is directly connected to the electrode, and the third electrode is arranged on both end surfaces of the substrate in a substantially U-shape on the first and second electrodes made of metal glaze. A chip resistor characterized by comprising a Ni plating layer which is provided partially overlapping with each other and further covers a portion of the first and second electrodes and a third electrode, and a solder plating layer laminated on the Ni plating layer. . 2. Printing and forming a metal glaze-based first electrode on the surface of the insulating ceramic substrate, and printing and forming a metal glaze-based second electrode on the back side of the substrate at a position opposite to the first electrode with the substrate in between. a step of printing and glass-coating a resistor to which the first electrode is directly connected; and a step of printing a resistor to which the first electrode is directly connected and coating it with glass; A process of scribing in a state where the second electrode is located, and applying resin-containing silver paint to the side edges of each substrate after scribing in a substantially U-shape to the first and second electrodes on the front and back surfaces.
A step of directly coating the second electrode in a thick layer partially overlapping the second electrode and heating it at a low temperature to form the third electrode, and a step of Ni plating the outer surfaces of the first, second and third electrodes. A method for manufacturing a chip resistor, comprising the steps of further solder plating the Ni plating layer, and trimming the resistor before scribing the board or after the solder plating and then applying a resin coating.
JP62267839A 1987-10-22 1987-10-22 Chip resistor Granted JPH01109702A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62267839A JPH01109702A (en) 1987-10-22 1987-10-22 Chip resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62267839A JPH01109702A (en) 1987-10-22 1987-10-22 Chip resistor

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP6158706A Division JP2806802B2 (en) 1994-07-11 1994-07-11 Chip resistor
JP8004988A Division JP3012875B2 (en) 1996-01-16 1996-01-16 Manufacturing method of chip resistor

Publications (2)

Publication Number Publication Date
JPH01109702A JPH01109702A (en) 1989-04-26
JPH0553281B2 true JPH0553281B2 (en) 1993-08-09

Family

ID=17450336

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62267839A Granted JPH01109702A (en) 1987-10-22 1987-10-22 Chip resistor

Country Status (1)

Country Link
JP (1) JPH01109702A (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2653588B1 (en) * 1989-10-20 1992-02-07 Electro Resistance ELECTRIC RESISTANCE IN THE FORM OF A CHIP WITH SURFACE MOUNT AND MANUFACTURING METHOD THEREOF.
JPH0629102A (en) * 1992-07-10 1994-02-04 Alps Electric Co Ltd Chip resistor and its manufacturing method
JP2939425B2 (en) * 1994-10-19 1999-08-25 北陸電気工業株式会社 Surface mount type resistor and its manufacturing method
JPH09246013A (en) * 1996-03-13 1997-09-19 Matsushita Electric Ind Co Ltd Chip ptc thermistor
KR20030052196A (en) * 2001-12-20 2003-06-26 삼성전기주식회사 Thin film chip resistor and method of fabricating the same
US7190252B2 (en) * 2005-02-25 2007-03-13 Vishay Dale Electronics, Inc. Surface mount electrical resistor with thermally conductive, electrically insulative filler and method for using same
JP6499007B2 (en) * 2015-05-11 2019-04-10 Koa株式会社 Chip resistor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61210601A (en) * 1985-03-14 1986-09-18 進工業株式会社 Chip resistor
JPS61268001A (en) * 1984-12-28 1986-11-27 コーア株式会社 Chip-shaped electronic component

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59185801U (en) * 1983-05-26 1984-12-10 アルプス電気株式会社 chip resistance

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61268001A (en) * 1984-12-28 1986-11-27 コーア株式会社 Chip-shaped electronic component
JPS61210601A (en) * 1985-03-14 1986-09-18 進工業株式会社 Chip resistor

Also Published As

Publication number Publication date
JPH01109702A (en) 1989-04-26

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