JPH055197B2 - - Google Patents
Info
- Publication number
- JPH055197B2 JPH055197B2 JP59035944A JP3594484A JPH055197B2 JP H055197 B2 JPH055197 B2 JP H055197B2 JP 59035944 A JP59035944 A JP 59035944A JP 3594484 A JP3594484 A JP 3594484A JP H055197 B2 JPH055197 B2 JP H055197B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- circuit
- circuit pattern
- base material
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000463 material Substances 0.000 claims description 35
- 229920005989 resin Polymers 0.000 claims description 29
- 239000011347 resin Substances 0.000 claims description 29
- 238000006243 chemical reaction Methods 0.000 claims description 15
- 239000011342 resin composition Substances 0.000 claims description 13
- 239000011230 binding agent Substances 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 24
- 238000000034 method Methods 0.000 description 23
- 230000008569 process Effects 0.000 description 11
- 238000007639 printing Methods 0.000 description 10
- 239000000843 powder Substances 0.000 description 8
- 239000000758 substrate Substances 0.000 description 7
- 229920001187 thermosetting polymer Polymers 0.000 description 7
- 239000004020 conductor Substances 0.000 description 6
- CXWXQJXEFPUFDZ-UHFFFAOYSA-N tetralin Chemical compound C1=CC=C2CCCCC2=C1 CXWXQJXEFPUFDZ-UHFFFAOYSA-N 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 239000002245 particle Substances 0.000 description 5
- 239000005062 Polybutadiene Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 229920002857 polybutadiene Polymers 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 229920013716 polyethylene resin Polymers 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- JHIVVAPYMSGYDF-UHFFFAOYSA-N cyclohexanone Chemical compound O=C1CCCCC1 JHIVVAPYMSGYDF-UHFFFAOYSA-N 0.000 description 2
- GNTDGMZSJNCJKK-UHFFFAOYSA-N divanadium pentaoxide Chemical compound O=[V](=O)O[V](=O)=O GNTDGMZSJNCJKK-UHFFFAOYSA-N 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- -1 paper-phenol boards Substances 0.000 description 2
- 150000002978 peroxides Chemical class 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- WQGWDDDVZFFDIG-UHFFFAOYSA-N pyrogallol Chemical compound OC1=CC=CC(O)=C1O WQGWDDDVZFFDIG-UHFFFAOYSA-N 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000007666 vacuum forming Methods 0.000 description 2
- OAYXUHPQHDHDDZ-UHFFFAOYSA-N 2-(2-butoxyethoxy)ethanol Chemical compound CCCCOCCOCCO OAYXUHPQHDHDDZ-UHFFFAOYSA-N 0.000 description 1
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QHIWVLPBUQWDMQ-UHFFFAOYSA-N butyl prop-2-enoate;methyl 2-methylprop-2-enoate;prop-2-enoic acid Chemical compound OC(=O)C=C.COC(=O)C(C)=C.CCCCOC(=O)C=C QHIWVLPBUQWDMQ-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- QGBSISYHAICWAH-UHFFFAOYSA-N dicyandiamide Chemical compound NC(N)=NC#N QGBSISYHAICWAH-UHFFFAOYSA-N 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000009472 formulation Methods 0.000 description 1
- 239000005350 fused silica glass Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 239000012456 homogeneous solution Substances 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 238000007641 inkjet printing Methods 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000012046 mixed solvent Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000010680 novolac-type phenolic resin Substances 0.000 description 1
- 238000007645 offset printing Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920002589 poly(vinylethylene) polymer Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229920005990 polystyrene resin Polymers 0.000 description 1
- 229920005749 polyurethane resin Polymers 0.000 description 1
- 229940079877 pyrogallol Drugs 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000005482 strain hardening Methods 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 239000011135 tin Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Description
【発明の詳細な説明】
［発明の技術分野］
本発明は、網状化反応を起して硬化する樹脂を
使用した回路基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a circuit board using a resin that hardens by causing a reticulation reaction.
［発明の技術的背景とその問題点］
従来、樹脂を基材とした回路基板で実用化され
ているものでは、紙−フエノール基板、ガラスマ
ツト・ポリエステル基板、ガラス・エポキシ基板
等の熱硬化性樹脂を主体としたものが知られてい
る。この種の回路基板では従来、銅張の熱硬化性
樹脂板を用い、レジストを印刷しエツチングによ
り不要の銅を溶解・除去することにより回路パタ
ーンを形成していた。[Technical background of the invention and its problems] Conventionally, resin-based circuit boards that have been put to practical use include thermosetting resins such as paper-phenol boards, glass matte polyester boards, and glass-epoxy boards. It is known that the main body is Conventionally, in this type of circuit board, a circuit pattern is formed by using a copper-clad thermosetting resin plate, printing a resist, and dissolving and removing unnecessary copper by etching.
一方、回路の実装密度を高めるため回路パター
ンの多層化が行なわれている。この場合、従来各
層間の回路パターンを接続するにあたり、無電解
メツキを応用した銅スルホールが多用されてい
る。すなわち、銅張積層板をエツチングしたもの
とプリプレグとを交互に重ね合せ熱圧着後、穿孔
して得られた孔壁に無電解メツキを施し、表裏面
を所望パターンにエツチングして多層化するとい
う工程により各層間の回路パターンを接続するも
のである。しかし、この方法は工程が複雑である
ため、回路基板が高価となる欠点がある。 On the other hand, in order to increase the packaging density of circuits, circuit patterns are being multilayered. In this case, conventionally, copper through-holes using electroless plating have been frequently used to connect circuit patterns between layers. That is, etched copper clad laminates and prepreg are alternately layered and bonded under heat, and then electroless plating is applied to the hole walls obtained by drilling, and the front and back surfaces are etched in a desired pattern to create a multilayer structure. This process connects the circuit patterns between each layer. However, this method has the disadvantage that the process is complicated and the circuit board is expensive.
多層回路基板の他の例としては、絶縁基板上に
導体ペーストを印刷・焼成し、次いで絶縁体ペー
ストを印刷・焼成するという工程を繰返して多層
化する厚膜回路基板がある。この方式はスルーホ
ール加工、つまり孔壁への導体被着という工程が
不要であるため工程的には簡単であるが、印刷の
繰返しにより多層化するほど段差が蓄積され、４
層以上の多層になると実際上印刷が困難となると
いう問題があつた。 Another example of a multilayer circuit board is a thick film circuit board that is made into multiple layers by repeating the process of printing and firing a conductive paste on an insulating substrate, and then printing and firing an insulating paste. This method is simple in terms of process because it does not require through-hole processing, that is, the process of attaching a conductor to the hole wall, but the more layers there are due to repeated printing, the more steps accumulate.
There was a problem that printing became difficult in practice when the number of layers increased.
さらに、上述した多層回路基板はいずれも絶縁
性基板面と回路パターン面とが同一平面上にな
く、回路パターン面が基板面より数十μｍ程度突
出することが多い。従つて、回路基板と摺動を要
する部品、例えばコネクタとの結合動作あるいは
スイツチや可変抵抗器の接点の摺動において動作
が不安定となり易く、機械的摩耗や電気アークの
発生を伴うという問題があつた。 Furthermore, in any of the above multilayer circuit boards, the insulating substrate surface and the circuit pattern surface are not on the same plane, and the circuit pattern surface often protrudes from the substrate surface by several tens of micrometers. Therefore, there is a problem in that the operation of parts that require sliding on the circuit board, such as the coupling operation with connectors or the sliding of contacts of switches and variable resistors, tends to become unstable, which is accompanied by mechanical wear and the generation of electric arcs. It was hot.
［発明の目的］
本発明の目的は、多層化に適した構造で工程も
簡単であり、また絶縁性基板面と回路パターン面
とを同一平面上に設定することが容易な回路基板
を提供することである。[Object of the Invention] An object of the present invention is to provide a circuit board that has a structure suitable for multilayering, has a simple process, and allows easy setting of an insulating substrate surface and a circuit pattern surface on the same plane. That's true.
［発明の概要］
この目的を達成するため、本発明に係る回路基
板はＢステージの網状化反応をおこして硬化する
硬化性樹脂からなる基材と、この基材上に形成さ
れた同じくＢステージの網状化反応を起して硬化
する硬化性樹脂をバインダとする導電性樹脂組成
物からなる回路パターンと、この回路パターン上
に被覆されこの回路パターンの特定部分に対応す
る領域が穿孔または切欠されたＢステージあるい
はＣステージの網状化反応を起して硬化する硬化
性樹脂からなる絶縁性フイルムとを有し、前記基
材と前記絶縁性フイルムとが熱圧着されることに
より前記回路パターンが前記絶縁性フイルムの前
記穿孔または切欠された領域により前記絶縁性フ
イルム面と同一平面上に露出するようにしたこと
を特徴としている。ここで、硬化性樹脂とは硬化
前において常温で固体で、熱を加えることによつ
て可塑性を呈し、成型後、網状化反応を行ない硬
化するものである。[Summary of the Invention] In order to achieve this object, the circuit board according to the present invention includes a base material made of a curable resin that is cured by causing a B-stage reticulation reaction, and a base material made of a curable resin that is cured by causing a B-stage reticular reaction, and a B-stage film formed on the base material. A circuit pattern made of a conductive resin composition containing as a binder a curable resin that hardens by causing a reticulation reaction, and a region coated on this circuit pattern that corresponds to a specific part of this circuit pattern is perforated or cut out. and an insulating film made of a curable resin that hardens by causing a B-stage or C-stage reticulation reaction, and the circuit pattern is formed by thermocompression bonding the base material and the insulating film. The invention is characterized in that the perforated or cut out area of the insulating film is exposed on the same plane as the surface of the insulating film. Here, the curable resin is solid at room temperature before curing, exhibits plasticity when heated, and after molding, undergoes a reticulation reaction and hardens.
すなわち、本発明においては回路パターンが形
成された基材と絶縁性フイルムとを熱圧着して一
体化することにより、硬化性樹脂をバインダとす
る導電性樹脂組成物からなる回路パターンは、絶
縁性フイルムの穿孔または切欠された領域を通し
て絶縁性フイルム面と同一平面上に露出するごと
く盛り上がる。 That is, in the present invention, the base material on which the circuit pattern is formed and the insulating film are integrated by thermocompression bonding, so that the circuit pattern made of the conductive resin composition using the curable resin as the binder has an insulating property. It rises through the perforated or cut area of the film so that it is exposed flush with the surface of the insulating film.
また、基材と絶縁性フイルムとを多層に重ねて
熱圧着を行なつた場合は、各層の回路パターンは
それぞれの基材間に介在される絶縁性フイルムの
厚みで形成される空間に盛り上がつてこの空間で
相互に接続され、これにより各層は一体化され
る。 In addition, when thermocompression bonding is performed by stacking a base material and an insulating film in multiple layers, the circuit pattern of each layer is raised in the space formed by the thickness of the insulating film interposed between each base material. The layers are then interconnected in this space, thereby integrating the layers.
［発明の効果］
本発明によれば、基材と絶縁性フイルムとの熱
圧着により、回路基板全体の一体化と同時に層間
の回路パターンの電気的な接続がなされるので、
銅張積層板の多層化の場合のようなスルーホール
加工が特別に必要でなく、工程が簡単化される。[Effects of the Invention] According to the present invention, by thermocompression bonding the base material and the insulating film, the entire circuit board is integrated and at the same time electrical connections between the circuit patterns between the layers are made.
There is no special need for through-hole processing as in the case of multi-layering copper-clad laminates, simplifying the process.
また、回路パターンが予め個々に形成された基
材と絶縁性フイルムとを重ねて熱圧着することで
多層化を行なうことができるため、厚膜回路基板
の多層化の場合のように段差が蓄積されるという
問題がなく、より多層の多層回路基板を実現する
ことが可能となる。 In addition, multilayering can be achieved by stacking and thermocompression bonding a base material on which circuit patterns have been individually formed and an insulating film, so steps may not accumulate as in the case of multilayering thick film circuit boards. This eliminates the problem of multilayer circuit boards having more layers.
［発明の実施例］
以下、本発明の実施例について詳細に説明す
る。第１図ａ〜ｄは本発明に係わる回路基板の一
実施例を説明するための工程図である。[Embodiments of the Invention] Examples of the present invention will be described in detail below. FIGS. 1A to 1D are process diagrams for explaining one embodiment of a circuit board according to the present invention.
第１図ａにおいて１は硬化性樹脂、つまりＢス
テージの樹脂（プレポリマー）からなる基材で、
この基材１の一方の面上に第１図ｂに示すように
後で詳しく述べる方法により回路パターン２が形
成される。回路パターン２は基材１と同種または
異種の未硬化状態の硬化性樹脂をバインダとし、
金属粉または半導電性粉を混入させた導電性樹脂
組成物で形成されている。 In Figure 1a, 1 is a base material made of a curable resin, that is, a B-stage resin (prepolymer).
A circuit pattern 2 is formed on one side of the base material 1 by a method described in detail later, as shown in FIG. 1b. The circuit pattern 2 uses an uncured curable resin of the same type or different type as the base material 1 as a binder,
It is made of a conductive resin composition mixed with metal powder or semiconductive powder.
ここで、基材１および回路パターン２に用いら
れる回路基板材料としては、熱硬化性樹脂に限定
されるものではなく、紫外線等の放射線の照射に
より網状化反応を起して硬化するものであつても
よく、実用可能な電気絶縁性、耐湿性、耐熱性を
兼ね備えたものとして、例えばエポキシ樹脂、ポ
リエステル樹脂、1.2ポリブタジエン樹脂、アク
リル樹脂、ポリウレタン樹脂、ノボラツク型フエ
ノール樹脂、ポリイミド樹脂、ポリスチレン樹
脂、ポリエチレン系樹脂等が使用される。また、
導電性樹脂組成物に使用する金属粉としては、
金、銀、銅、ニツケル、タングステン、モリブデ
ン、白金、アルミニウム、錫およびこれらを主体
とする合金あるいは複合粉等が挙げられ、半導体
粉としてはカーボン粉、炭化珪素粉、五酸化バナ
ジウム粉等が挙げられる。基材１と回路パターン
２に使用される熱硬化性樹脂は同種であることが
最も望ましいが、必ずしも同種でなくともよく、
上記に挙げたプレポリマーとほぼ同等の性質を有
するものであれば、異種の組合せでもよい。導電
性樹脂組成物を所望パターンに形成する方法とし
ては、印刷による方法が好ましく、特に導電性組
成物を溶剤に溶かしてペースト化し、スクリーン
印刷、オフセツト印刷、インクジエツト方式によ
る印刷等の、所要の図形になるように移動させな
がら描画を行なうデスペンサー方式、あるいは導
電性樹脂組成物を粉体状にして静電印刷する方
式、さらに導電性組成物に感熱性を付与せしめ選
択的に加熱してパターン化する方式等がある。 Here, the circuit board material used for the base material 1 and the circuit pattern 2 is not limited to a thermosetting resin, but may be one that hardens by causing a reticulation reaction when irradiated with radiation such as ultraviolet rays. Examples of materials that have practical electrical insulation, moisture resistance, and heat resistance include epoxy resins, polyester resins, 1.2 polybutadiene resins, acrylic resins, polyurethane resins, novolac type phenolic resins, polyimide resins, polystyrene resins, Polyethylene resin etc. are used. Also,
Metal powders used in conductive resin compositions include:
Examples include gold, silver, copper, nickel, tungsten, molybdenum, platinum, aluminum, tin, and alloys or composite powders based on these.Semiconductor powders include carbon powder, silicon carbide powder, vanadium pentoxide powder, etc. It will be done. It is most desirable that the thermosetting resins used for the base material 1 and the circuit pattern 2 are of the same type, but they do not necessarily have to be of the same type.
A combination of different types may be used as long as they have substantially the same properties as the above-mentioned prepolymers. As a method for forming the conductive resin composition into a desired pattern, a printing method is preferable, and in particular, the conductive composition is dissolved in a solvent to form a paste, and the desired pattern is formed by screen printing, offset printing, inkjet printing, etc. There is a dispenser method in which drawing is performed while moving the composition so that the image is drawn, a method in which electrostatic printing is performed using a conductive resin composition in powder form, and a method in which the conductive composition is made heat sensitive and selectively heated to form a pattern. There are methods to convert
次に、第１図ｃに示すように回路パターン２の
上面を絶縁性フイルム３によつて覆う。この絶縁
性フイルム３はやはり熱硬化性樹脂からなるもの
であり、基材１と同種のプレポリマーであること
が好ましいが、必ずしも同種のプレポリマーであ
る必要はなく、密着性において組合せが悪い場合
は接着剤層を形成した絶縁性フイルムであつても
よい。また、この絶縁フイルム３は予めシート状
に形成しておき単に回路パターン２上に静置して
もよいし、印刷、プレス、ラミネートなどにより
形成してもよい。この絶縁性シート３には、前記
回路パターン２の特定部分に対応する領域に穿孔
４または切欠部５が形成されている。 Next, as shown in FIG. 1c, the upper surface of the circuit pattern 2 is covered with an insulating film 3. This insulating film 3 is also made of thermosetting resin, and is preferably made of the same kind of prepolymer as the base material 1, but it does not necessarily have to be the same kind of prepolymer, and if the combination is bad in terms of adhesion. may be an insulating film on which an adhesive layer is formed. Further, the insulating film 3 may be formed in advance into a sheet shape and simply placed on the circuit pattern 2, or may be formed by printing, pressing, laminating, etc. This insulating sheet 3 has perforations 4 or cutouts 5 formed in areas corresponding to specific portions of the circuit pattern 2.
そして、第１図ｃの状態で基材１と絶縁性フイ
ルム３とを所望の温度と圧力で熱圧着することに
より、第１図ｄに示すように回路パターン２の表
面が絶縁性フイルム３の穿孔４または切欠部５か
ら絶縁性フイルム３と同一平面上に露出した回路
基板が得られる。この場合、熱圧着によつてプレ
ポリマーで形成されている基材をまず第１図ｄの
ように塑性変形させ、次いで必要に応じてさらに
温度を上昇させて網状化反応を行なわせることに
より、前記回路基板が得られる。 Then, by thermocompression bonding the base material 1 and the insulating film 3 at a desired temperature and pressure in the state shown in FIG. A circuit board exposed from the perforation 4 or cutout 5 on the same plane as the insulating film 3 is obtained. In this case, the base material formed of the prepolymer is first plastically deformed by thermocompression bonding as shown in FIG. The circuit board is obtained.
次に、本発明を多層回路基板に適用した実施例
について第２図を参照して説明する。 Next, an embodiment in which the present invention is applied to a multilayer circuit board will be described with reference to FIG.
まず、第２図ａに示すように、第１図で説明し
た工程により得られた回路基板３０，３１，３２
を用意する。第１層目の回路基板３０は下面右端
側に穿孔３０２を有している。第２層目の回路基
板３１は上下両面に回路パターン３１１および３
１２を有し、図で左端側に穿孔３１３を有してい
る。さらに第３層目の回路基板３２は上面側に回
路パターン３２１を有し、図で右端側に穿孔３２
２を有している。また、この例では多層回路基板
に付随する個別部品として例えば第１層目と第２
層目の回路基板３０，３１の回路パターン３０１
および３１１との間に抵抗３３が介在され、回路
基板３１，３２の間にダイオード３４が介在され
る。 First, as shown in FIG. 2a, circuit boards 30, 31, 32 obtained by the process explained in FIG.
Prepare. The first layer circuit board 30 has a perforation 302 on the right end side of the lower surface. The second layer circuit board 31 has circuit patterns 311 and 3 on both upper and lower surfaces.
12, and has a perforation 313 on the left end side in the figure. Further, the third layer circuit board 32 has a circuit pattern 321 on the upper surface side, and a perforation 32 on the right end side in the figure.
It has 2. In addition, in this example, as individual parts accompanying the multilayer circuit board, for example, the first layer and the second layer
Circuit pattern 301 of circuit board 30, 31 of layer
A resistor 33 is interposed between the circuit boards 31 and 311, and a diode 34 is interposed between the circuit boards 31 and 32.
この状態で３枚の回路基板３０，３１，３２を
熱圧着により一体化すると、第２図ｂに示すよう
になる。すなわち、第２層目の回路基板３１上の
回路パターン３１１および３１２は、穿孔３０２
および３２２をそれぞれ通して基板３０および３
２の上面および下面と同一平面上に盛り上つて露
出する。また、回路パターン３０１および３２１
は回路基板３１に設けた穿孔３１５を通して互い
の方向に盛り上つてこの穿孔３１３内で接触し、
導通状態となる。さらに、抵抗３３は電極３３１
と３３２が上下に形成され、この抵抗３３の上電
極３３１は回路パターン３０３に、そして下電極
３３２は回路パターン３１４に接続される。この
とき、抵抗３３は回路基板３０と３１に埋設され
るような形態になる。一方、ダイオード３４は左
右に電極３４１，３４２を有するが、左電極３４
１は回路基板３２の回路パターン３２３と、また
右電極３４２は回路パターン３２４とそれぞれ接
続される。このとき、ダイオード３４は抵抗３３
と同様に回路基板３１に埋設された形となる。そ
して、回路パターン３１５と３２５は上下に相対
応する位置にあるので、熱圧着時に一体化され
る。次いで、この組成変形後、熱硬化反応を行な
わせる。 In this state, when the three circuit boards 30, 31, and 32 are integrated by thermocompression bonding, the result is as shown in FIG. 2b. That is, the circuit patterns 311 and 312 on the second layer circuit board 31 are
and 322 through substrates 30 and 3, respectively.
It is raised and exposed on the same plane as the upper and lower surfaces of 2. In addition, circuit patterns 301 and 321
are raised toward each other through a perforation 315 provided in the circuit board 31 and come into contact within the perforation 313 of the lever;
Becomes conductive. Furthermore, the resistor 33 is connected to the electrode 331
and 332 are formed above and below, the upper electrode 331 of this resistor 33 is connected to the circuit pattern 303, and the lower electrode 332 is connected to the circuit pattern 314. At this time, the resistor 33 is embedded in the circuit boards 30 and 31. On the other hand, the diode 34 has electrodes 341 and 342 on the left and right sides, but the left electrode 34
1 is connected to the circuit pattern 323 of the circuit board 32, and the right electrode 342 is connected to the circuit pattern 324, respectively. At this time, the diode 34 is connected to the resistor 33
Similarly, it is embedded in the circuit board 31. Since the circuit patterns 315 and 325 are located in vertically corresponding positions, they are integrated during thermocompression bonding. Next, after this compositional modification, a thermosetting reaction is performed.
このように３枚の回路基板３０，３１，３２を
一体化することによつて、回路基板３枚分の厚さ
とほぼ同等あるいはそれ以下の厚みで一体化され
た３層構造の回路基板が形成される。 By integrating the three circuit boards 30, 31, and 32 in this way, a three-layer circuit board is formed with a thickness that is approximately equal to or less than that of three circuit boards. be done.
本発明は上記のような３層の回路基板のみでな
く、さらに多層の回路基板にも適用できることは
勿論いうまでもない。また、第１図においては回
路パターンが盛り上る作用を、回路パターンなし
の絶縁性フイルムで回路パターンを覆うことによ
つて得られる作用として説明したが、第２図でも
明らかなように回路パターンが形成されている基
材で回路パターンを覆うことによつても同様に盛
り上らせることができるのは勿論である。 It goes without saying that the present invention is applicable not only to the three-layer circuit board as described above, but also to multi-layer circuit boards. In addition, in Fig. 1, the effect of the circuit pattern rising was explained as an effect obtained by covering the circuit pattern with an insulating film without a circuit pattern, but as is also clear in Fig. 2, the circuit pattern swells up. Of course, the circuit pattern can also be similarly raised by covering the circuit pattern with the base material on which it has been formed.
また、多層回路基板の層数が増えて一回の工程
で熱圧着ができない場合は、上側あるいは下側の
回路基板から順に位置合せして一枚ずつ圧着して
いくようにすればよい。 Furthermore, if the number of layers of a multilayer circuit board increases and thermocompression bonding cannot be performed in one step, the circuit boards may be aligned and pressure bonded one by one starting from the upper or lower circuit board.
また、本発明によれば回路パターンが熱圧着
時、断線を生じることなく塑性変形できるため、
以下のようにして回路基板を立体化することも可
能である。すなわち、まず第３図ａに示すような
回路パターン４１を有する回路基板４０を第１図
で説明した方法で作製する。この回路基板４０を
加温状態にして塑性変形し得る状態にしてから、
熱プレスまたは真空成型あるいは冷間加工法等に
よつて、第３図ｂに示すように所定形状に配線を
立体化することが可能になる。次いで、この形状
を保持したまま熱硬化性反応を行なわしめる。こ
の場合、立体化された回路基板の一面側を絶縁
層、他面側を回路層とすれば、電子機器の筐体を
兼ねさせることが可能となり、実用的効果は大き
い。 Furthermore, according to the present invention, the circuit pattern can be plastically deformed during thermocompression bonding without causing disconnection.
It is also possible to make the circuit board three-dimensional as follows. That is, first, a circuit board 40 having a circuit pattern 41 as shown in FIG. 3a is manufactured by the method explained in FIG. 1. After heating the circuit board 40 to a state where it can be plastically deformed,
By hot pressing, vacuum forming, cold working, or the like, it is possible to three-dimensionalize the wiring into a predetermined shape as shown in FIG. 3b. Next, a thermosetting reaction is carried out while maintaining this shape. In this case, if one side of the three-dimensional circuit board is made into an insulating layer and the other side is made into a circuit layer, it becomes possible to make it double as a casing of an electronic device, which has a great practical effect.
以上説明した本発明の実施例をさらに具体的に
説明する。 The embodiments of the present invention described above will be described in more detail.
具体例 １
第１図の製造工程において、５％のジシアンジ
アミドを含む平均分子量2500のビスフエノールＡ
型のＢステージ状態のエポキシ樹脂からなる３mm
厚の基材１上に、これと同じＢステージ状態のエ
ポキシ樹脂からなるプレポリマー100重量部に対
してシクロヘキサノン／ｎブチルカルビトールを
１／１に配合した混合溶剤を330重量部を加温下で均
一溶液となし、さらにこの溶液に850重量部の平
均粒径5μｍの銀粉を添加し、ペイントロールで
混線して導電性樹脂組成物を得た。これを前記基
材１にスクリーン印刷法により第１図ｂのように
印刷した後、常温・減圧下で１時間乾燥を行な
い、回路パターン２を形成した。次いで、0.1mm
厚の前述と同様のプレポリマよりなる絶縁性フイ
ルム３に所定個所に３mmの孔を明け、この絶縁
性フイルム３により基材１上に印刷された回路パ
ターン２を第１図ｃに示すごとく覆つて熱圧着を
行なつた。熱圧着の条件は80℃、５Kg／cm2（樹脂
圧）で時間は30分とした。次いで、これを網状化
しＣステージ状態に移行させるために同じ圧力で
100℃、30分、120℃、20分、150℃、１時間網状
化反応を行なわしめた。この結果、第１図ｄに示
したように絶縁性フイルム３と回路パターン２の
表面とが同一平面上にある回路基板が得られた。
また回路パターン２の露出部と内層部分の接続を
測定したところ接続は完全になされていた。そこ
で、第４図に示すように絶縁性フイルムに２mm
の孔５１を明け、これを10mmピツチで50個連続さ
せ、１mm幅の回路パターン（導体路）５２を基材
に印刷して、上述した具体例１と同様に回路基板
を作成したところ、第１図ｄと同様に回路パター
ン５２が凹凸の導体路になつたにもかかわらず、
一端から他端まで導電性が確保され、その抵抗値
も25Ωと十分に低かつた。また、この回路基板を
変形・屈曲させても抵抗値の変化はほとんど認め
られなかつた。Specific example 1 In the manufacturing process shown in Figure 1, bisphenol A with an average molecular weight of 2500 containing 5% dicyandiamide
3mm made of epoxy resin in the B stage state of the mold
On a thick base material 1, 330 parts by weight of a mixed solvent containing cyclohexanone/n-butyl carbitol in a ratio of 1/1 to 100 parts by weight of a prepolymer made of an epoxy resin in the same B-stage state was added under heating. A homogeneous solution was obtained, and 850 parts by weight of silver powder with an average particle size of 5 μm was added to this solution, and mixed with a paint roll to obtain a conductive resin composition. This was printed on the base material 1 by screen printing as shown in FIG. 1b, and then dried at room temperature and under reduced pressure for 1 hour to form a circuit pattern 2. Then 0.1mm
Holes of 3 mm were made at predetermined locations in an insulating film 3 made of a prepolymer having the same thickness as described above, and the circuit pattern 2 printed on the base material 1 was covered with this insulating film 3 as shown in FIG. 1c. We performed thermocompression bonding. The thermocompression bonding conditions were 80°C, 5Kg/cm 2 (resin pressure), and 30 minutes. Next, in order to reticulate this and move it to the C stage state, it was heated at the same pressure.
The reticulation reaction was carried out at 100°C for 30 minutes, at 120°C for 20 minutes, and at 150°C for 1 hour. As a result, a circuit board was obtained in which the insulating film 3 and the surface of the circuit pattern 2 were on the same plane as shown in FIG. 1d.
Furthermore, when the connection between the exposed portion of the circuit pattern 2 and the inner layer portion was measured, the connection was found to be perfect. Therefore, as shown in Figure 4, a 2mm insulating film was
A circuit board was prepared in the same manner as in Example 1 above by drilling 50 holes 51 at a 10 mm pitch and printing a 1 mm wide circuit pattern (conductor path) 52 on the base material. Although the circuit pattern 52 becomes an uneven conductor path as in FIG. 1d,
Conductivity was ensured from one end to the other, and the resistance was sufficiently low at 25Ω. Moreover, even when this circuit board was deformed and bent, almost no change in resistance value was observed.
具体例 ２
第５図ａに示すように、0.5％のキユメンパー
オキサイドおよび重量比で50％の平均粒径10μｍ
のフユーズドシリカ粉末を含むＢステージ１，２
ポリブタジエン樹脂（日本曹達社製ポリブタジエ
ンＢ−4000）をプレスで成型して得た0.8mm厚の
基材６１に2.4×1.2mmの孔６２，６３を明け、次
いでここに第５図ｂに示すように、2.4×1.2×0.8
mmのチツプ抵抗６４と、3.0×1.8×0.8mmのチツプ
コンデンサ６５を圧入し、表面を略平坦化した。
なお、６６ａ，６６ｂ，６７ａ，６７ｂは端子で
ある。次いで、Ｂステージ１，２ポリブタジエン
樹脂（日本曹達社製、ポリブタジエン樹脂Ｂ−
2000）に２％のキユメンパーオキサイドと平均粒
径5μｍの銀粒を80％加え、若干量のテトラリン
を添加して３本ロールにて導電性樹脂組成物を調
製し、この導電性樹脂組成物を印刷し、減圧・乾
燥して第５図ｃに示す如く回路パターン６８を形
成した。次に、第５図ｄに示すように基材６１と
同じ樹脂のプレポリマからなるプレポリマシート
の特定位置に孔７０を明けた絶縁性フイルム６９
を回路パターン６８の上に積み重ね、さらに裏面
に絶縁フイルム７１（0.1mm厚）を置いて、加熱
および加圧できる型内に収容し、常温で10Kg／cm2
（樹脂圧）を加えることによつて部品一体化回路
基板を得た。このとき、第５図ｅに示すように絶
縁性フイルム６９と同一平面上に回路パターン６
８の露出面７３が形成された。次いで、これを両
面を型で押えながら180℃に昇温させて網状化反
応を行なわせしめた。こうして得られた回路基板
の接続をチエツクしたところ、断線等はなく回路
は正常に動作した。Concrete Example 2 As shown in Figure 5a, 0.5% Qyumen peroxide and 50% by weight average particle size 10 μm
B stage 1 and 2 containing fused silica powder
Holes 62 and 63 of 2.4 x 1.2 mm were made in a 0.8 mm thick base material 61 obtained by molding polybutadiene resin (Polybutadiene B-4000 manufactured by Nippon Soda Co., Ltd.) using a press, and then holes 62 and 63 of 2.4 x 1.2 mm were formed therein as shown in FIG. 5b. 2.4×1.2×0.8
A chip resistor 64 of 3.0 mm x 1.8 x 0.8 mm and a chip capacitor 65 of 3.0 x 1.8 x 0.8 mm were press-fitted, and the surface was made substantially flat.
Note that 66a, 66b, 67a, and 67b are terminals. Next, B stage 1,2 polybutadiene resin (manufactured by Nippon Soda Co., Ltd., polybutadiene resin B-
A conductive resin composition was prepared by adding 2% of Kyumene peroxide and 80% of silver grains with an average particle size of 5 μm to (2000) and adding a small amount of tetralin using a three-roll process. was printed and dried under reduced pressure to form a circuit pattern 68 as shown in FIG. 5c. Next, as shown in FIG. 5d, an insulating film 69 with holes 70 formed at specific positions of a prepolymer sheet made of the same resin as the base material 61 is formed.
was stacked on top of the circuit pattern 68, an insulating film 71 (0.1 mm thick) was placed on the back side, and the film was placed in a mold that could be heated and pressurized .
By applying (resin pressure), a component-integrated circuit board was obtained. At this time, as shown in FIG. 5e, the circuit pattern 6 is placed on the same plane as the insulating film 69.
8 exposed surfaces 73 were formed. Next, this was heated to 180° C. while pressing both sides with a mold to cause a reticulation reaction. When the connections of the circuit board thus obtained were checked, there were no disconnections and the circuit operated normally.
具体例 ３
第６図ａに示すように、具体例２と同じ樹脂ポ
リマに重量比で20％のガラス繊維を添加したプレ
ポリマからなる基材８０の所定個所に１mmの孔
８１を明け、その表裏に孔８１の中心を合わせて
２mmの導体部を有し、かつ所定の導体パターン
を有するように表裏面から導電性樹脂組成物より
なる回路パターン８２，８３を印刷し、常温で24
時間放置して乾燥を行なつた。ここで導電性樹脂
組成物は、前記具体例２で使用したのと同じもの
を用い、印刷はロール転写方式で行なつた。Concrete Example 3 As shown in Figure 6a, holes 81 of 1 mm are drilled at predetermined locations in a base material 80 made of a prepolymer made of the same resin polymer as in Concrete Example 2 with 20% glass fiber added by weight. The circuit patterns 82 and 83 made of a conductive resin composition were printed from the front and back sides so as to have a 2 mm conductor portion with the center of the hole 81 aligned, and to have a predetermined conductor pattern.
It was left to dry for a while. The conductive resin composition used here was the same as that used in Specific Example 2, and printing was performed by a roll transfer method.
次いで、このように調製した異なる導体パター
ンを有する２枚の基材の間に、特定の部分に孔９
０，９１を有する基材８０と同一材質からなる
100μｍ厚の絶縁性フイルム８５を介在させ、さ
らに最外層に特定の部分に孔８７〜８９を有する
100μｍ厚の絶縁性フイルム８４，８６を配置し、
60℃、10Kg／cm2（樹脂圧）で加熱・加圧プレスを
行ない、さらに180℃、60Kg／cm2で30分間加熱・
加圧プレスを行なつて、冷却後、取出した。得ら
れた回路基板の断面は略第７図ｂに示したような
構造を有しており、上下回路の回路パターンの電
気的接続は良好に保たれていた。 Next, holes 9 are formed in specific parts between the two substrates having different conductor patterns prepared in this way.
Made of the same material as the base material 80 having a diameter of 0.91
An insulating film 85 with a thickness of 100 μm is interposed, and the outermost layer has holes 87 to 89 in specific parts.
Insulating films 84 and 86 with a thickness of 100 μm are arranged,
Heat and press at 60℃ and 10Kg/cm 2 (resin pressure), then heat and press at 180℃ and 60Kg/cm 2 for 30 minutes.
Pressure pressing was performed, and after cooling, it was taken out. The cross section of the obtained circuit board had a structure approximately as shown in FIG. 7b, and the electrical connection between the circuit patterns of the upper and lower circuits was maintained well.
具体例 ４
0.5mm厚のＢステージポリエチレン樹脂のシー
トを基材とし、一方、ポリエチレン樹脂10部、テ
トラリン80部、平均粒径5μｍの銅粒80部および
ピロガロール0.2部からなる導電性樹脂組成物を
調製した。この場合、約60℃に加熱した熱ロール
で配合物を混練してペーストを調製した。次い
で、この導電性樹脂組成物を加温したまま、約60
℃に加温した前記基材上に所定パターンにスクリ
ーン印刷し、減圧下40〜50℃で乾燥し、前記ポリ
エチレンフイルムを重ね合せ、130℃、５〜10
Kg／cm2（樹脂厚）になるようにして熱ロールでラ
ミネートした。この操作を２回繰返した。Specific Example 4 Using a 0.5 mm thick sheet of B-stage polyethylene resin as a base material, on the other hand, a conductive resin composition consisting of 10 parts of polyethylene resin, 80 parts of tetralin, 80 parts of copper particles with an average particle size of 5 μm, and 0.2 parts of pyrogallol was prepared. Prepared. In this case, the paste was prepared by kneading the formulation with hot rolls heated to about 60°C. Next, this conductive resin composition was heated for about 60 minutes.
A predetermined pattern is screen printed on the base material heated to 130°C, dried at 40 to 50°C under reduced pressure, and the polyethylene film is overlaid and printed at 130°C for 5 to 10 minutes.
Kg/cm 2 (resin thickness) and laminated with a hot roll. This operation was repeated twice.
次いで得られた回路基板シートを第３図ｂに示
したような雌型をもつ型を用い、シートを160℃
に予熱して真空成型を行つたところ、第３図ｂに
示したような立体回路基板が得られた。次いで、
これにβ線を主体とする放射線を照射して網状化
反応を行なわせしめた。得られた回路基板は回路
パターンの切断等もなく、回路基板として十分に
使用できることが確認された。 Next, the obtained circuit board sheet was heated at 160°C using a mold with a female mold as shown in Figure 3b.
After preheating and vacuum forming, a three-dimensional circuit board as shown in FIG. 3b was obtained. Then,
This was irradiated with radiation mainly consisting of beta rays to cause a reticulation reaction. It was confirmed that the obtained circuit board had no cutting of the circuit pattern, and could be fully used as a circuit board.
以上説明したような本発明に係る回路基板にお
いては、半田付け工程やスルーホール加工等の技
術を使用することなく、多層配線を実現すること
が可能である。従つて、例えば厚さ１mm以下のカ
ード状基体に集積回路を埋設し、情報記憶および
所望の情報処理機能を持たせた薄型の電卓やキヤ
シユカードまたはクレジツトカード等を構成する
場合に有効である。 In the circuit board according to the present invention as described above, it is possible to realize multilayer wiring without using techniques such as a soldering process or through-hole processing. Therefore, it is effective, for example, when embedding an integrated circuit in a card-like substrate with a thickness of 1 mm or less to construct a thin calculator, cash card, credit card, etc. that has information storage and desired information processing functions.
尚、本発明は要旨を変更しない範囲で種々変形
実施が可能であることは勿論である。 It goes without saying that the present invention can be modified in various ways without changing the gist thereof.
第１図は本発明の一実施例に係る回路基板の構
成およびその製造工程を説明するための図、第２
図〜第６図は本発明のより具体的な実施例を説明
するための図である。
１……基材、２，１１……回路パターン、３，
１０……絶縁性フイルム、４……穿孔、７，８…
…回路パターンの露出面。
FIG. 1 is a diagram for explaining the structure and manufacturing process of a circuit board according to an embodiment of the present invention, and FIG.
6 to 6 are diagrams for explaining more specific embodiments of the present invention. 1... Base material, 2, 11... Circuit pattern, 3,
10... Insulating film, 4... Perforation, 7, 8...
...Exposed surface of circuit pattern.
Claims (1)
脂からなる基材と、この基材上に形成されたＢス
テージの網状化反応を起して硬化する樹脂をバイ
ンダとする導電性樹脂組成物からなる回路パター
ンと、この回路パターン上に被覆されこの回路パ
ターンの特定部分に対応する領域が穿孔または切
欠されたＢステージあるいはＣステージの網状化
反応を起して硬化する樹脂からなる絶縁性フイル
ムとを有し、前記基材と前記絶縁性フイルムとが
熱圧着されることにより前記回路パターンの特定
部分が前記絶縁性フイルムの断面空間に盛り上げ
られてＢステージの硬化性樹脂をＣステージにし
たことを特徴とする回路基板。1. A conductive resin composition comprising a base material made of a resin that hardens by causing a B-stage reticulation reaction, and a resin formed on this base material that hardens by causing a B-stage reticulation reaction as a binder. an insulating film made of a resin that is coated on the circuit pattern and cured by a B-stage or C-stage reticulation reaction, in which areas corresponding to specific parts of the circuit pattern are perforated or cut out; The base material and the insulating film are bonded together by thermocompression, so that a specific portion of the circuit pattern is raised in the cross-sectional space of the insulating film, and the B-stage curable resin is changed to the C-stage. A circuit board characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59035944A JPS60182195A (en) | 1984-02-29 | 1984-02-29 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59035944A JPS60182195A (en) | 1984-02-29 | 1984-02-29 | Circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60182195A JPS60182195A (en) | 1985-09-17 |
| JPH055197B2 true JPH055197B2 (en) | 1993-01-21 |
Family
ID=12456102
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59035944A Granted JPS60182195A (en) | 1984-02-29 | 1984-02-29 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60182195A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4845274B2 (en) * | 2001-02-27 | 2011-12-28 | 京セラ株式会社 | Wiring board and manufacturing method thereof |
| WO2006030562A1 (en) | 2004-09-13 | 2006-03-23 | Murata Manufacturing Co., Ltd. | Multilayer board incorporating chip electronic component and method for producing the same |
| JP2007335653A (en) * | 2006-06-15 | 2007-12-27 | Alps Electric Co Ltd | Circuit board, method of manufacturing the same, and circuit module using the same |
| US9648755B2 (en) | 2014-01-02 | 2017-05-09 | Philips Lighting Holding B.V. | Method for manufacturing a non-planar printed circuit board assembly |
-
1984
- 1984-02-29 JP JP59035944A patent/JPS60182195A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60182195A (en) | 1985-09-17 |
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