JP2007335653A - Circuit board, method of manufacturing the same, and circuit module using the same - Google Patents

Circuit board, method of manufacturing the same, and circuit module using the same Download PDF

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JP2007335653A
JP2007335653A JP2006166147A JP2006166147A JP2007335653A JP 2007335653 A JP2007335653 A JP 2007335653A JP 2006166147 A JP2006166147 A JP 2006166147A JP 2006166147 A JP2006166147 A JP 2006166147A JP 2007335653 A JP2007335653 A JP 2007335653A
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Prior art keywords
conductor
circuit board
electrode
hole
laminated
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JP2006166147A
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Japanese (ja)
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Nobuyuki Suzuki
伸幸 鈴木
Kazuya Ishikawa
一也 石川
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Alps Alpine Co Ltd
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Alps Electric Co Ltd
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Priority to JP2006166147A priority Critical patent/JP2007335653A/en
Priority to CNA2007101103236A priority patent/CN101090607A/en
Priority to KR1020070058252A priority patent/KR100908674B1/en
Publication of JP2007335653A publication Critical patent/JP2007335653A/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inexpensive circuit board, a method of manufacturing the circuit board in simple manufacturing steps, and a circuit module using the circuit board. <P>SOLUTION: In the method of manufacturing the circuit board, when a press step is carried out for stacking a first green sheet 13 having a through-hole 2a provided therein, and a second green sheet 14 having a conductor 6 provided thereon and pressing the laminate, the conductor 6 enters the through-hole 2a so that an electrode 7 is formed to be flush with the exposure surface of the first green sheet 13. Consequently, the manufacture is simple and requires a less number of manufacturing steps, and thus the circuit board can be made inexpensive. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、近距離無線装置等に使用して好適な回路基板の製造方法、及びその回路基板、並びにその回路基板を使用した回路モジュールに関するものである。   The present invention relates to a method of manufacturing a circuit board suitable for use in a short-range wireless device, the circuit board, and a circuit module using the circuit board.

図６は従来の回路基板の製造方法、及びその回路基板を示す要部断面図であり、次に、従来の回路基板の構成を図６に基づいて説明すると、積層基板５１は、コア基板５２と、このコア基板５２に積層された複数の積層板５３ａ〜５３ｇとで構成されている。   FIG. 6 is a cross-sectional view of a main part of a conventional circuit board manufacturing method and the circuit board. Next, the configuration of the conventional circuit board will be described with reference to FIG. And a plurality of laminated plates 53 a to 53 g laminated on the core substrate 52.

これ等の積層板５３ａ〜５３ｇには、それぞれ孔５１ａが設けられ、これ等の孔５１ａ内には、無電解メッキによって導電パターン５４や導電パターン５４間等を電気的に繋ぐビア導体５５，及び、最上部に位置する電極５６が設けられると共に、この電極５６上には、半田盛り上がり部５７が設けられて、従来の回路基板が形成されている（例えば、特許文献１参照）。   These laminated plates 53a to 53g are each provided with a hole 51a, and in these holes 51a, via conductors 55 electrically connecting the conductive patterns 54 and the conductive patterns 54, etc. by electroless plating, and The uppermost electrode 56 is provided, and a solder raised portion 57 is provided on the electrode 56 to form a conventional circuit board (see, for example, Patent Document 1).

このような構成を有する従来の回路基板には、ここでは図示しないが、半導体部品が半田盛り上がり部５７によって電極５６に電気的に接続されて、従来の回路モジュールが形成されている。   In the conventional circuit board having such a configuration, although not shown in the figure, a semiconductor component is electrically connected to the electrode 56 by a solder bulge portion 57 to form a conventional circuit module.

次に、回路基板の製造方法を図６に基づいて説明すると、先ず、コア基板５２上には、積層板５３ａとなる感光性レジストが塗布されて形成され、次に、この感光性レジストが露光、現像されて、孔５１ａを形成した後、無電解メッキによって導電パターン５４を形成する。   Next, a method of manufacturing a circuit board will be described with reference to FIG. 6. First, a photosensitive resist to be a laminated plate 53a is applied and formed on the core substrate 52, and then the photosensitive resist is exposed. After being developed to form the hole 51a, the conductive pattern 54 is formed by electroless plating.

次に、積層板５３ａとなる感光性レジスト上には、積層板５３ｂとなる感光性レジストが塗布されて形成され、次に、この感光性レジストが露光、現像されて、孔５１ａを形成した後、無電解メッキによってビア導体５５を形成する。   Next, a photosensitive resist to be the laminated plate 53b is applied and formed on the photosensitive resist to be the laminated plate 53a, and then the photosensitive resist is exposed and developed to form the holes 51a. The via conductor 55 is formed by electroless plating.

そして、積層板５３ｃ〜５３ｇでは、このような感光性レジストの形成、露光と現像、及び無電解メッキを繰り返して、導電パターン５４とビア導体５５の形成を行った後、最後に、積層板５３ｇの孔５１ａ内に電極５６を無電解メッキにより形成すると、その製造が完了する（例えば、特許文献１参照）。
特開２００１ー２８４７８３号公報 Then, in the laminated plates 53c to 53g, the formation of the photosensitive resist, exposure and development, and electroless plating are repeated to form the conductive pattern 54 and the via conductor 55, and finally, the laminated plate 53g. When the electrode 56 is formed in the hole 51a by electroless plating, the manufacture is completed (see, for example, Patent Document 1).
JP 2001-284783 A

しかし、従来の回路基板の製造方法、及びその回路基板、並びに回路モジュールにあっては、積層板５３ａ〜５３ｇを形成するためのそれぞれの感光性レジストの塗布、それぞれの感光性レジストの露光と現像、及び無電解メッキを繰り返して、導電パターン５４やビア導体５５、及び電極５６の形成が行われるため、製造が煩雑であると共に、製造工程が多くなって、回路基板がコスト高になるという問題がある。   However, in the conventional circuit board manufacturing method, the circuit board, and the circuit module, application of the respective photosensitive resists for forming the laminated plates 53a to 53g, and exposure and development of the respective photosensitive resists. In addition, since the conductive pattern 54, the via conductor 55, and the electrode 56 are formed by repeating electroless plating, the manufacturing process is complicated, and the manufacturing process is increased, resulting in an increase in cost of the circuit board. There is.

本発明は、このような従来技術の実情に鑑みてなされたもので、その目的は、製造工程が簡単で、安価な回路基板の製造方法、及びその回路基板、並びにその回路基板を使用した回路モジュールを提供することにある。   The present invention has been made in view of the actual situation of the prior art as described above, and an object of the present invention is to provide an inexpensive circuit board manufacturing method, a circuit board thereof, and a circuit using the circuit board, which have a simple manufacturing process. To provide a module.

上記の目的を達成するために、本発明は、セラミック材からなる第１のグリーンシートに貫通孔を形成する孔形成工程と、セラミック材からなる第２のグリーンシートに導電体を形成する導体形成工程と、貫通孔に導電体を対向させて、第１，第２のグリーンシートを積層する積層工程と、積層された第１，第２のグリーンシートをプレスして、導電体が第１のグリーンシートの露出表面と面一状態で貫通孔内に突入するプレス工程と、第１，第２のグリーンシートを焼成する焼成工程とによってセラミック基板が形成され、セラミック基板の露出表面と面一状態の導電体が電子部品を接続するための電極となしたことを特徴としている。   To achieve the above object, the present invention provides a hole forming step for forming a through hole in a first green sheet made of a ceramic material, and a conductor formation for forming a conductor in a second green sheet made of a ceramic material. A step of laminating the first and second green sheets with the conductor facing the through-hole, and pressing the laminated first and second green sheets so that the conductor is the first A ceramic substrate is formed by a pressing process that enters the through-hole in a state that is flush with the exposed surface of the green sheet, and a firing process that fires the first and second green sheets, and is flush with the exposed surface of the ceramic substrate. This conductor is an electrode for connecting electronic components.

このように構成した本発明は、貫通孔を設けた第１のグリーンシートと導電体を設けた第２のグリーンシートを積層した状態でプレス工程を行うと、導電体が貫通孔内に突入して、第１のグリーンシートの露出表面と面一状態の電極が形成されるため、その製造が簡単であると共に、製造工程が少なく、安価な回路基板が得られる。   In the present invention configured as described above, when the pressing process is performed in a state where the first green sheet provided with the through hole and the second green sheet provided with the conductor are laminated, the conductor enters the through hole. In addition, since the electrode that is flush with the exposed surface of the first green sheet is formed, the manufacturing process is simple and the number of manufacturing steps is small, and an inexpensive circuit board can be obtained.

また、本発明は、上記発明において、貫通孔より大きな面積で導電体が形成された状態で、プレス工程と焼成工程が行われ、導電体は、セラミック基板の露出表面と面一状態にある電極と、この電極に繋がり、第１，第２のグリーンシート間であるセラミック基板の積層間に位置する引出導体を有したことを特徴としている。   Further, according to the present invention, in the above invention, the pressing step and the firing step are performed in a state where the conductor is formed in an area larger than the through hole, and the conductor is an electrode that is flush with the exposed surface of the ceramic substrate. And a lead conductor which is connected to the electrode and located between the laminated ceramic substrates between the first and second green sheets.

このように構成した本発明は、第２のグリーンシートに設けられた導電体によって電極と引出導体が形成されるため、製造工程が少なくなって、安価なものが得られると共に、引出導体が電極の近傍に露出することが無く、従って、セラミック基板と半導体部品との間へのアンダーフィルの注入が確実にできて、気泡のないアンダーフィルの形成が可能となる。   In the present invention configured as described above, since the electrode and the lead conductor are formed by the conductor provided on the second green sheet, the manufacturing process is reduced, an inexpensive product is obtained, and the lead conductor is the electrode. Therefore, the underfill can be reliably injected between the ceramic substrate and the semiconductor component, and the underfill without bubbles can be formed.

また、本発明は、上記発明において、プレス工程は、液体中における等方圧プレスによって行われることを特徴としている。   Moreover, the present invention is characterized in that, in the above-mentioned invention, the pressing step is performed by isotropic pressure pressing in a liquid.

このように構成した本発明は、等方圧プレスによって、グリーンシートのプレスが均等に行えて、精度の良い加圧ができる。   In the present invention configured as described above, the green sheet can be uniformly pressed by the isotropic pressure press, and the pressurization with high accuracy can be performed.

上記の目的を達成するために、本発明は、少なくとも第１，第２の積層板からなるセラミック基板を備え、第１の積層板に設けられた貫通孔内には、第２の積層板に設けられた導電体が第２の積層板と共に突入して、導電体には、第１の積層板の露出表面と面一状態の電子部品接続用の電極が形成されたことを特徴としている。   In order to achieve the above object, the present invention includes a ceramic substrate including at least first and second laminated plates, and the second laminated plate is provided in a through-hole provided in the first laminated plate. The provided conductor rushes together with the second laminate, and the conductor is formed with electrodes for connecting electronic components that are flush with the exposed surface of the first laminate.

このように構成した本発明は、第２の積層板とこの第２の積層板に設けた導電体が第１の積層板に設けた貫通孔内に突入して、第１の積層板の露出表面と面一状態の電極が形成されるため、その製造が簡単であると共に、製造工程が少なく、安価な回路基板が得られる。   In the present invention configured as described above, the second laminated plate and the conductor provided on the second laminated plate enter the through-hole provided in the first laminated plate, thereby exposing the first laminated plate. Since the electrodes that are flush with the surface are formed, the manufacturing thereof is simple and the number of manufacturing steps is small, and an inexpensive circuit board is obtained.

また、本発明は、上記発明において、導電体は、第１の積層板の露出表面と面一状態にある電極と、この電極に繋がり、第１，第２の積層板間に位置する引出導体を有したことを特徴としている。   Further, the present invention is the above invention, wherein the conductor is an electrode that is flush with the exposed surface of the first laminated plate, and the lead conductor connected to the electrode and positioned between the first and second laminated plates. It is characterized by having.

このように構成した本発明は、第２の積層板に設けられた導電体によって電極と引出導体が形成されるため、製造工程が少なくなって、安価なものが得られると共に、引出導体が電極の近傍に露出することが無く、従って、セラミック基板と半導体部品との間へのアンダーフィルの注入が確実にできて、気泡のないアンダーフィルの形成が可能となる。   In the present invention configured as described above, since the electrode and the lead conductor are formed by the conductor provided on the second laminated plate, the manufacturing process is reduced, an inexpensive product is obtained, and the lead conductor is the electrode. Therefore, the underfill can be reliably injected between the ceramic substrate and the semiconductor component, and the underfill without bubbles can be formed.

また、本発明は、上記発明において、電極上には、半田盛り上がり部が設けられたことを特徴としている。   Further, the present invention is characterized in that, in the above invention, a solder bulge portion is provided on the electrode.

このように構成した本発明は、電気部品が半導体部品である場合、半導体部品が半田盛り上がり部に半田付けできて、その取付の容易なものが得られる。   In the present invention configured as described above, when the electrical component is a semiconductor component, the semiconductor component can be soldered to the solder bulge portion, and an easily mounted component can be obtained.

上記の目的を達成するために、本発明は、請求項４から６の何れか１項記載の回路基板を備え、電極には、電子部品が半田付によって接続されたことを特徴としている。   In order to achieve the above object, the present invention comprises the circuit board according to any one of claims 4 to 6, wherein an electronic component is connected to the electrode by soldering.

このように構成した本発明は、導電体で形成される電極への電子部品の取付が容易にできると共に、第２の積層板とこの第２の積層板に設けた導電体が第１の積層板に設けた貫通孔内に突入して、第１の積層板の露出表面と面一状態の電極が形成されるため、その製造が簡単であると共に、製造工程が少なく、安価な回路基板が得られる。   According to the present invention configured as described above, the electronic component can be easily attached to the electrode formed of the conductor, and the second laminate and the conductor provided on the second laminate are the first laminate. An electrode that is flush with the exposed surface of the first laminated plate is formed by entering into a through-hole provided in the plate, so that the manufacturing is simple and the manufacturing process is small and an inexpensive circuit board is provided. can get.

また、本発明は、上記発明において、電子部品が半導体部品で形成され、半導体部品が電極に半田付けされると共に、半導体部品と回路基板との間には、アンダーフィルが形成されたことを特徴としている。   According to the present invention, in the above invention, the electronic component is formed of a semiconductor component, the semiconductor component is soldered to an electrode, and an underfill is formed between the semiconductor component and the circuit board. It is said.

このように構成した本発明は、第２の積層板に設けられた導電体によって電極と引出導体が形成されるため、製造工程が少なくなって、安価なものが得られると共に、引出導体が電極の近傍に露出することが無く、従って、セラミック基板と半導体部品との間へのアンダーフィルの注入が確実にできて、気泡のないアンダーフィルの形成が可能となる。   In the present invention configured as described above, since the electrode and the lead conductor are formed by the conductor provided on the second laminated plate, the manufacturing process is reduced, an inexpensive product is obtained, and the lead conductor is the electrode. Therefore, the underfill can be reliably injected between the ceramic substrate and the semiconductor component, and the underfill without bubbles can be formed.

本発明は、貫通孔を設けた第１のグリーンシートと導電体を設けた第２のグリーンシートを積層した状態でプレス工程を行うと、導電体が貫通孔内に突入して、第１のグリーンシートの露出表面と面一状態の電極が形成されるため、その製造が簡単であると共に、製造工程が少なく、安価な回路基板が得られる。   In the present invention, when the pressing process is performed in a state where the first green sheet provided with the through hole and the second green sheet provided with the conductor are stacked, the conductor enters the through hole, Since an electrode that is flush with the exposed surface of the green sheet is formed, the manufacturing process is simple, and the manufacturing process is less and an inexpensive circuit board is obtained.

発明の実施の形態について図面を参照して説明すると、図１は本発明の回路モジュールに係る要部断面図、図２は本発明の回路基板に係る要部断面図、図３は本発明の回路基板の製造方法に係る第１工程を示す説明図、図４は本発明の回路基板の製造方法に係る第２工程を示す説明図、図５は本発明の回路基板の製造方法に係る第３工程を示す説明図である。   An embodiment of the invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view of the main part of the circuit module of the present invention, FIG. 2 is a cross-sectional view of the main part of the circuit board of the present invention, and FIG. FIG. 4 is an explanatory view showing a second step according to the method for manufacturing a circuit board of the present invention, and FIG. 5 is an explanatory view showing the second step of the method for manufacturing a circuit board according to the present invention. It is explanatory drawing which shows 3 processes.

次に、本発明の回路モジュールと回路基板に係る構成を図１、図２に基づいて説明すると、積層基板からなるセラミック基板１は、複数の貫通孔２ａを有する第１の積層板２と、この第１の積層板２の下部に積層されて、一部３ａが貫通孔２ａ内に突入する第２の積層板３と、この第３の積層板３の下部に順次積層された第３，第４の積層板４，５によって形成されている。   Next, the configuration of the circuit module and the circuit board according to the present invention will be described with reference to FIGS. 1 and 2. A ceramic substrate 1 made of a laminated substrate includes a first laminated plate 2 having a plurality of through holes 2a, A second laminated plate 3 laminated at the lower part of the first laminated plate 2 and a part 3a enters the through hole 2a, and third and third laminated sequentially below the third laminated plate 3. It is formed by the fourth laminated plates 4 and 5.

導電パターンを形成する導電体６は、銅や銅を含む合金等で形成され、この導電体６は、貫通孔２ａ内に位置した状態で第１の積層板３の一部３ａ上に設けられ、第１の積層板２の露出表面と面一状態に形成された電極７と、この電極７に繋がり、第１，第２の積層板２，３間に位置する引出導体８を有している。   The conductor 6 forming the conductive pattern is formed of copper or an alloy containing copper, and the conductor 6 is provided on the part 3a of the first laminated plate 3 in a state of being located in the through hole 2a. And an electrode 7 formed flush with the exposed surface of the first laminated plate 2 and a lead conductor 8 connected to the electrode 7 and positioned between the first and second laminated plates 2 and 3. Yes.

この引出導体８は、電極７の近傍の第１の積層板２の表面から露出しない状態で形成されると共に、セラミック基板１の表面や積層間には、ここでは図示しないが、導電パターンとなる導電体が形成されている。   The lead conductor 8 is formed in a state where it is not exposed from the surface of the first laminated plate 2 in the vicinity of the electrode 7, and a conductive pattern is formed between the surface of the ceramic substrate 1 and between the laminated layers, although not shown here. A conductor is formed.

そして、電極７上には、クリーム半田の溶融によって形成された半田盛り上がり部９が設けられて、図２に示すような本発明の回路基板が形成されている。   On the electrode 7, a solder bulge portion 9 formed by melting cream solder is provided to form a circuit board of the present invention as shown in FIG.

このような構成を有する本発明の回路基板には、図１に示すように、電子部品である半導体部品１０の金等からなるバンプ１１が半田盛り上がり部９によって電極７に電気的に接続され、引出導体８を介して電気回路に接続されると共に、セラミック基板１と半導体部品１０との間には、アンダーフィル１２が設けられて、本発明の回路モジュールが形成されている。   In the circuit board of the present invention having such a configuration, as shown in FIG. 1, bumps 11 made of gold or the like of a semiconductor component 10 which is an electronic component are electrically connected to the electrode 7 by a solder bulge portion 9. While being connected to an electric circuit via the lead conductor 8, an underfill 12 is provided between the ceramic substrate 1 and the semiconductor component 10 to form the circuit module of the present invention.

このような本発明の回路モジュールにおいて、少なくとも半導体部品１０と対向するセラミック基板１の面には、レジスト膜（図示せず）が設けておらず、電極７とセラミック基板１の表面が面一状態となっており、従って、アンダーフィル１２の注入がスムーズに行われるようになっている。   In such a circuit module of the present invention, at least the surface of the ceramic substrate 1 facing the semiconductor component 10 is not provided with a resist film (not shown), and the electrode 7 and the surface of the ceramic substrate 1 are flush with each other. Therefore, the underfill 12 is smoothly injected.

なお、この実施例では、半導体部品１０以外の電子部品における電極７への接続であっても良く、また、セラミック基板１には、種々の電子部品が搭載されて、所望の電気回路が形成されたものとなっている。   In this embodiment, connection to the electrode 7 in an electronic component other than the semiconductor component 10 may be used, and various electronic components are mounted on the ceramic substrate 1 to form a desired electric circuit. It has become.

次に、本発明のおける回路基板の製造方法を図３〜図５に基づいて説明すると、先ず第１工程として図３に示すように、孔形成工程によって貫通孔２ａが形成された第１の積層板２ａを形成するためのセラミック材からなる第１のグリーンシート１３と、印刷等の導体形成工程によって貫通孔２ａよりも面積の大きな導電体６を形成した第２の積層板３を形成するためのセラミック材からなる第２のグリーンシート１４と、第３，第４の積層板４，５を形成するためのセラミック材からなる第３，第４のグリーンシート１５，１６を用意する。   Next, the circuit board manufacturing method according to the present invention will be described with reference to FIGS. 3 to 5. First, as shown in FIG. 3, the first step in which the through hole 2 a is formed by the hole forming step is shown as the first step. A first green sheet 13 made of a ceramic material for forming the laminated plate 2a and a second laminated plate 3 in which a conductor 6 having a larger area than the through hole 2a is formed by a conductor forming process such as printing. The second green sheet 14 made of a ceramic material for the purpose and the third and fourth green sheets 15 and 16 made of the ceramic material for forming the third and fourth laminated plates 4 and 5 are prepared.

次に、第２工程として図４に示すように、貫通孔２ａに導電体６を対向させて、第１，第２のグリーンシート１３，１４を積層すると共に、第２のグリーンシート１４の下部に第３，第４のグリーンシート１５，１６を積層する積層工程を行った後、次に、第３工程として図５に示すように、積層された第１〜第４のグリーンシート１３〜１６を、液体中における等方圧プレス等によってプレスするプレス工程を行う。   Next, as shown in FIG. 4 as the second step, the first and second green sheets 13 and 14 are laminated with the conductor 6 facing the through-hole 2a, and the lower portion of the second green sheet 14 is stacked. After the third and fourth green sheets 15 and 16 are stacked, the first to fourth green sheets 13 to 16 are stacked as shown in FIG. 5 as the third step. Is pressed by an isotropic pressure press or the like in a liquid.

すると、図５に示すように、導電体６と第２のグリーンシート１４の一部が貫通孔２ａ内に突入して、導電体６が第１のグリーンシート１３の露出表面と面一状態になる。   Then, as shown in FIG. 5, the conductor 6 and a part of the second green sheet 14 enter the through hole 2 a so that the conductor 6 is flush with the exposed surface of the first green sheet 13. Become.

次に、焼成工程によって第１〜第４のグリーンシート１３〜１６と導電体６を焼成すると、図２に示すような第１〜第４の積層板２〜５からなるセラミック基板１が形成されると共に、導電体６には、セラミック基板１の露出表面と面一状態の電極７と、この電極７に繋がり、第１，第２の積層板２，３間に位置する引出導体８が形成される。   Next, when the 1st-4th green sheets 13-16 and the conductor 6 are baked by a baking process, the ceramic substrate 1 which consists of the 1st-4th laminated plates 2-5 as shown in FIG. 2 is formed. In addition, the conductor 6 is formed with an electrode 7 that is flush with the exposed surface of the ceramic substrate 1 and a lead conductor 8 that is connected to the electrode 7 and is positioned between the first and second laminated plates 2 and 3. Is done.

次に、図２に示すように、必要に応じて、電極７上に半田盛り上がり部９を形成すると、本発明の回路基板の製造が完了すると共に、セラミック基板１を形成するためのグリーンシートの枚数は、２枚以上で適宜に選択できるものである。   Next, as shown in FIG. 2, when the solder bulge portion 9 is formed on the electrode 7 as necessary, the manufacture of the circuit board of the present invention is completed and the green sheet for forming the ceramic substrate 1 is formed. The number of sheets can be appropriately selected from two or more.

本発明の回路モジュールに係る要部断面図である。It is principal part sectional drawing concerning the circuit module of this invention. 本発明の回路基板に係る要部断面図である。It is principal part sectional drawing concerning the circuit board of this invention. 本発明の回路基板の製造方法に係る第１工程を示す説明図である。It is explanatory drawing which shows the 1st process which concerns on the manufacturing method of the circuit board of this invention. 本発明の回路基板の製造方法に係る第２工程を示す説明図である。It is explanatory drawing which shows the 2nd process which concerns on the manufacturing method of the circuit board of this invention. 本発明の回路基板の製造方法に係る第３工程を示す説明図である。It is explanatory drawing which shows the 3rd process which concerns on the manufacturing method of the circuit board of this invention. 従来の回路基板の製造方法、及びその回路基板を示す要部断面図である。It is principal part sectional drawing which shows the manufacturing method of the conventional circuit board, and the circuit board.

符号の説明Explanation of symbols

１ セラミック基板
２ 第１の積層板
２ａ 貫通孔
３ 第２の積層板
３ａ 一部
４ 第３の積層板
５ 第４の積層板
６ 導電体
７ 電極
８ 引出導体
９ 半田盛り上がり部
１０ 半導体部品（電子部品）
１１ バンプ
１２ アンダーフィル
１３ 第１のグリーンシート
１４ 第２のグリーンシート
１５ 第３のグリーンシート
１６ 第４のグリーンシート DESCRIPTION OF SYMBOLS 1 Ceramic substrate 2 1st laminated board 2a Through-hole 3 2nd laminated board 3a A part 4 3rd laminated board 5 4th laminated board 6 Electric conductor 7 Electrode 8 Lead conductor 9 Solder rise part 10 Semiconductor component (electronic) parts)
11 Bump 12 Underfill 13 First Green Sheet 14 Second Green Sheet 15 Third Green Sheet 16 Fourth Green Sheet

Claims (8)

セラミック材からなる第１のグリーンシートに貫通孔を形成する孔形成工程と、セラミック材からなる第２のグリーンシートに導電体を形成する導体形成工程と、前記貫通孔に前記導電体を対向させて、前記第１，第２のグリーンシートを積層する積層工程と、積層された前記第１，第２のグリーンシートをプレスして、前記導電体が前記第１のグリーンシートの露出表面と面一状態で前記貫通孔内に突入するプレス工程と、前記第１，第２のグリーンシートを焼成する焼成工程とによってセラミック基板が形成され、前記セラミック基板の露出表面と面一状態の前記導電体が電子部品を接続するための電極となしたことを特徴とする回路基板の製造方法。 A hole forming step of forming a through hole in a first green sheet made of a ceramic material; a conductor forming step of forming a conductor in a second green sheet of a ceramic material; and the conductor made to face the through hole. And laminating the first and second green sheets, pressing the laminated first and second green sheets, and the conductor is exposed to the exposed surface of the first green sheet. A ceramic substrate is formed by a pressing process for entering the through hole in one state and a firing process for firing the first and second green sheets, and the conductor is flush with the exposed surface of the ceramic substrate. A circuit board manufacturing method characterized by comprising an electrode for connecting an electronic component. 前記貫通孔より大きな面積で前記導電体が形成された状態で、前記プレス工程と前記焼成工程が行われ、前記導電体は、前記セラミック基板の露出表面と面一状態にある前記電極と、この電極に繋がり、前記第１，第２のグリーンシート間である前記セラミック基板の積層間に位置する引出導体を有したことを特徴とする請求項１記載の回路基板の製造方法。 The pressing step and the firing step are performed in a state where the conductor is formed in a larger area than the through-hole, and the conductor is in contact with the exposed surface of the ceramic substrate and the electrode. 2. The method of manufacturing a circuit board according to claim 1, further comprising an extraction conductor connected to the electrode and positioned between the laminated ceramic substrates between the first and second green sheets. 前記プレス工程は、液体中における等方圧プレスによって行われることを特徴とする請求項１、又は２記載の回路基板の製造方法。 3. The method of manufacturing a circuit board according to claim 1, wherein the pressing step is performed by isostatic pressing in a liquid. 少なくとも第１，第２の積層板からなるセラミック基板を備え、前記第１の積層板に設けられた貫通孔内には、前記第２の積層板に設けられた導電体が前記第２の積層板と共に突入して、前記導電体には、前記第１の積層板の露出表面と面一状態の電子部品接続用の電極が形成されたことを特徴とする回路基板。 A ceramic substrate comprising at least first and second laminated plates is provided, and a conductor provided on the second laminated plate is disposed in the second laminated plate in a through hole provided on the first laminated plate. A circuit board characterized in that an electrode for connecting an electronic component flush with an exposed surface of the first laminated plate is formed on the conductor, and the electrode is inserted together with the plate. 前記導電体は、前記第１の積層板の露出表面と面一状態にある前記電極と、この電極に繋がり、前記第１，第２の積層板間に位置する引出導体を有したことを特徴とする請求項４記載の回路基板。 The conductor has the electrode that is flush with the exposed surface of the first laminate and the lead conductor connected to the electrode and positioned between the first and second laminates. The circuit board according to claim 4. 前記電極上には、半田盛り上がり部が設けられたことを特徴とする請求項４、又は５記載の回路基板。 6. The circuit board according to claim 4, wherein a solder bulge portion is provided on the electrode. 請求項４から６の何れか１項記載の回路基板を備え、前記電極には、前記電子部品が半田付によって接続されたことを特徴とする回路モジュール。 A circuit module comprising the circuit board according to claim 4, wherein the electronic component is connected to the electrode by soldering. 前記電子部品が半導体部品で形成され、前記半導体部品が前記電極に半田付けされると共に、前記半導体部品と前記回路基板との間には、アンダーフィルが形成されたことを特徴とする請求項７記載の回路モジュール。 8. The electronic component is formed of a semiconductor component, the semiconductor component is soldered to the electrode, and an underfill is formed between the semiconductor component and the circuit board. The circuit module as described.
JP2006166147A 2006-06-15 2006-06-15 Circuit board, method of manufacturing the same, and circuit module using the same Withdrawn JP2007335653A (en)

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