JPH0548344U - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0548344U JPH0548344U JP10650591U JP10650591U JPH0548344U JP H0548344 U JPH0548344 U JP H0548344U JP 10650591 U JP10650591 U JP 10650591U JP 10650591 U JP10650591 U JP 10650591U JP H0548344 U JPH0548344 U JP H0548344U
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- wiring board
- semiconductor pellet
- frame
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
(57)【要約】
【目的】 封止材と配線基板との境面に外部から侵入し
てくる水分が半導体ペレットの電極に到達して半導体ペ
レットの電極を浸食するまでの侵入経路を拡張して、実
用上差支えない程度に寿命を長持ちさせた半導体装置を
提供する。
【構成】 配線基板1の表面に半導体ペレット4を配置
し該半導体ペレット4の電極7を前記配線基板1の表面
の電極8に接続し、前記配線基板1の表面の電極8と前
記配線基板1の裏面の電極10とをスルホール9で電気的
に接続し、前記配線基板1の表面の電極8の外側に前記
半導体ペレット4の周囲を囲む枠状の溝部21、22を設
け、前記半導体ペレット4を封止材5にて被覆して前記
枠状の溝部22の外縁に囲まれた封止材溜を形成した。
(57) [Abstract] [Purpose] Extends the invasion path from the moisture that invades the boundary between the encapsulant and the wiring board until it reaches the electrode of the semiconductor pellet and erodes the electrode of the semiconductor pellet. Thus, a semiconductor device having a long life which is practically acceptable is provided. A semiconductor pellet 4 is arranged on the surface of a wiring board 1, an electrode 7 of the semiconductor pellet 4 is connected to an electrode 8 on the surface of the wiring board 1, and an electrode 8 on the surface of the wiring board 1 and the wiring board 1 are connected. Is electrically connected to the electrode 10 on the back surface of the semiconductor substrate 4 through the through hole 9, and frame-shaped grooves 21 and 22 surrounding the periphery of the semiconductor pellet 4 are provided outside the electrode 8 on the surface of the wiring board 1. Was covered with a sealing material 5 to form a sealing material reservoir surrounded by the outer edge of the frame-shaped groove portion 22.
Description
【0001】[0001]
この考案は、樹脂、金属、セラミック等の配線基板上に半導体ペレットを直付 けする構造の半導体装置に関するものである。 The present invention relates to a semiconductor device having a structure in which a semiconductor pellet is directly attached on a wiring board made of resin, metal, ceramic or the like.
【0002】[0002]
一般に、この種の半導体装置としては、例えば図2に示すように樹脂、金属、 セラミック等の配線基板11上に半導体ペレット4を直接接着して搭載し、半導体 ペレット4の電極17と配線基板11上の電極18とをワイヤーボンディングする。6 は樹脂、金属、セラミック等で形成した枠状のダムで配線基板11上に接着剤によ り固着され、ワイヤーボンディングによる接続部(半導体ペレット4の電極17と 配線基板11上の電極18)の周囲に略均一の高さで配置される。このダム6は接着 剤を硬化させて形成することもできる。そして、半導体ペレット4とワイヤーボ ンディングによる接続部(半導体ペレット4の電極17と配線基板11上の電極18) に熱可塑性(又は熱硬化性、紫外線硬化性等)の封止材15を塗布する。このとき ダム6は封止材15の流れを防止し、温度の低下(又は加熱、紫外線の照射等)に より硬化する封止材15が半導体ペレット4とワイヤーボンディングによる接続部 を被覆して枠状のダム6に囲まれた封止材溜を形成する。 Generally, in this type of semiconductor device, for example, as shown in FIG. 2, a semiconductor pellet 4 is directly bonded and mounted on a wiring substrate 11 made of resin, metal, ceramic or the like, and the electrode 17 of the semiconductor pellet 4 and the wiring substrate 11 are mounted. The upper electrode 18 is wire-bonded. Reference numeral 6 is a frame-shaped dam made of resin, metal, ceramic or the like, which is fixed to the wiring board 11 with an adhesive and is connected by wire bonding (electrode 17 of the semiconductor pellet 4 and electrode 18 on the wiring board 11). Are arranged at a substantially uniform height around the. The dam 6 can also be formed by curing an adhesive. Then, a thermoplastic (or thermosetting, ultraviolet curable, etc.) encapsulant 15 is applied to the semiconductor pellet 4 and the connection portion by wire bonding (the electrode 17 of the semiconductor pellet 4 and the electrode 18 on the wiring substrate 11). At this time, the dam 6 prevents the sealing material 15 from flowing, and the sealing material 15 which is cured by a decrease in temperature (or heating, irradiation of ultraviolet rays, etc.) covers the semiconductor pellet 4 and the connection portion by wire bonding to form a frame. A sealing material reservoir surrounded by the dam 6 is formed.
【0003】[0003]
ところで、従来の半導体装置では、半導体ペレット4とワイヤーボンディング による接続部(半導体ペレット4の電極17と配線基板11上の電極18)を封止材15 にて被覆して半導体ペレット4が外部の影響を受けないように保護しているが、 封止材15と配線基板11との境面16では、非常にゆっくりではあるが外部から水分 が侵入して半導体ペレット4の電極17を浸食して電極17の周囲に絶縁層を形成し 、配線基板11上の電極18との電気的接続が断線してしまうことがある。 By the way, in the conventional semiconductor device, the semiconductor pellet 4 and the connection portion by wire bonding (the electrode 17 of the semiconductor pellet 4 and the electrode 18 on the wiring board 11) are covered with the sealing material 15 so that the semiconductor pellet 4 is not affected by the outside. However, at the interface 16 between the encapsulant 15 and the wiring board 11, moisture penetrates from the outside to erode the electrode 17 of the semiconductor pellet 4 at a very slow rate, but An insulating layer may be formed around 17 to break the electrical connection with the electrode 18 on the wiring board 11.
【0004】 そこで、この考案は封止材と配線基板との境面に外部から侵入してくる水分が 半導体ペレットの電極に到達して半導体ペレットの電極を浸食するまでの侵入経 路を拡張して、実用上差支えない程度に寿命を長持ちさせた半導体装置を提供す ることを目的とする。In view of this, the present invention expands the invasion path through which moisture entering from the outside reaches the electrode of the semiconductor pellet and erodes the electrode of the semiconductor pellet at the boundary surface between the sealing material and the wiring board. In addition, it is an object of the present invention to provide a semiconductor device having a long life which is practically acceptable.
【0005】[0005]
本考案では、配線基板の表面に半導体ペレットを配置し該半導体ペレットの電 極を前記配線基板表面の電極に接続し、前記配線基板の表面の電極と前記配線基 板の裏面の電極とをスルホールで電気的に接続し、前記配線基板の表面の電極の 外側に前記半導体ペレットの周囲を囲む枠状の溝部を設け、前記半導体ペレット を封止材にて被覆して前記枠状の溝部の外縁に囲まれた封止材溜を形成して半導 体装置を構成した。 In the present invention, a semiconductor pellet is placed on the surface of the wiring board, and the electrode of the semiconductor pellet is connected to the electrode on the surface of the wiring board, and the electrode on the surface of the wiring board and the electrode on the back surface of the wiring board are through holes. Are electrically connected to each other, and a frame-shaped groove portion that surrounds the periphery of the semiconductor pellet is provided outside the electrode on the surface of the wiring board, and the semiconductor pellet is covered with a sealing material to form an outer edge of the frame-shaped groove portion. A semiconductor device was constructed by forming a sealing material reservoir surrounded by.
【0006】[0006]
本考案の半導体装置では、半導体ペレットの周囲を枠状の溝部で囲んだので、 封止材と配線基板との境面に外部から侵入してくる水分が半導体ペレットの電極 に到達するまでの水分の侵入経路が拡張される。また、半導体ペレットの電極と 接続される配線基板の電極は、スルホールで裏面の電極と電気的に接続している ので、配線基板に枠状の溝部を設けても溝部が電極の配線に影響することはない 。 In the semiconductor device of the present invention, since the periphery of the semiconductor pellet is surrounded by the frame-shaped groove, the moisture entering from the outside to the boundary surface between the encapsulant and the wiring substrate reaches the electrode of the semiconductor pellet. The intrusion route of is expanded. Also, since the electrode of the wiring board connected to the electrode of the semiconductor pellet is electrically connected to the electrode on the back surface through the through hole, even if the wiring board is provided with a frame-shaped groove, the groove affects the wiring of the electrode. There is no such thing.
【0007】[0007]
以下本考案の実施例を図面に従って説明する。図1の(a)は本考案の半導体 装置の縦断面図、図1の(b)は(a)に使用される配線基板の概略の構造を示 す上面図である。 Embodiments of the present invention will be described below with reference to the drawings. 1A is a vertical cross-sectional view of a semiconductor device of the present invention, and FIG. 1B is a top view showing a schematic structure of a wiring board used in FIG.
【0008】 図1(b)に示すように配線基板1の表面には四角い半導体ペレット4の各辺 を略平行に囲む枠状の溝部21が設けられ、さらに、その外側にも枠状の溝部21よ り一回り大きい枠状の溝部22が付設されている。図1(a)に示すように樹脂、 金属、セラミック等の配線基板1の表面には、枠状の溝部21の囲みの内側に半導 体ペレット4を直接接着して搭載する。半導体ペレット4の電極7は、配線基板 1の表面に設けた電極8とワイヤーボンディングして接続する。9はスルホール で、配線基板1の表面に設けた枠状の溝部21、溝部22が電極8の配線位置に影響 しないように、配線基板1の表面の電極8と配線基板1の裏面に設けた電極10と を電気的に接続する。そして、半導体ペレット4とワイヤーボンディングによる 接続部(半導体ペレット4の電極17と配線基板11上の電極18)に温めて溶解させ た封止材15を塗布する。このとき枠状の溝部22は封止材5の流れを防止し、温度 の低下とともに硬化する封止材5が半導体ペレット4とワイヤーボンディングに よる接続部を被覆して枠状の溝部22の外縁に囲まれた封止材溜を形成する。図1 では、封止材5の流れを防止する枠状の溝部を大きさの異なる複数の溝部(実施 例では二重構造の溝部)として説明したが、封止材5の流れを防止する枠状の溝 部は1つでもよいことは明らかである。As shown in FIG. 1B, a frame-shaped groove portion 21 is provided on the surface of the wiring substrate 1 so as to surround each side of the square semiconductor pellet 4 substantially in parallel, and further, the frame-shaped groove portion is also provided outside thereof. A frame-shaped groove 22 that is slightly larger than 21 is attached. As shown in FIG. 1A, a semiconductor pellet 4 is directly attached and mounted on the surface of a wiring substrate 1 made of resin, metal, ceramic or the like, inside a frame-shaped groove 21. The electrode 7 of the semiconductor pellet 4 is connected to the electrode 8 provided on the surface of the wiring board 1 by wire bonding. Reference numeral 9 is a through hole, which is provided on the electrode 8 on the front surface of the wiring board 1 and on the back surface of the wiring board 1 so that the frame-shaped grooves 21 and 22 provided on the surface of the wiring board 1 do not affect the wiring position of the electrode 8. Electrically connected to the electrode 10. Then, the sealing material 15 which is heated and melted is applied to the connection portion (the electrode 17 of the semiconductor pellet 4 and the electrode 18 on the wiring board 11) connected to the semiconductor pellet 4 by wire bonding. At this time, the frame-shaped groove 22 prevents the sealing material 5 from flowing, and the sealing material 5 that hardens as the temperature lowers covers the semiconductor pellet 4 and the connection portion by wire bonding to form an outer edge of the frame-shaped groove 22. To form an encapsulant reservoir surrounded by. In FIG. 1, the frame-shaped groove portion for preventing the flow of the sealing material 5 is described as a plurality of groove portions having different sizes (in the embodiment, a groove portion having a double structure), but a frame for preventing the flow of the sealing material 5 is used. Obviously, one groove may be provided.
【0009】[0009]
以上説明したように、本考案の半導体装置では、半導体ペレットの周囲を枠状 の溝部で囲んだので、封止材と配線基板との境面に外部から侵入してくる水分が 半導体ペレットの電極に到達するまでの水分の侵入経路が拡張されるから、封止 材と配線基板との境面に外部から侵入してくる水分が半導体ペレットの電極を浸 食するのに時間がかかり半導体装置の寿命が長持ちする。また、半導体ペレット の電極と接続される配線基板の表面の電極は、スルホールで配線基板の裏面の電 極と電気的に接続しているので、配線基板の表面に枠状の溝部を設けても溝部は 電極の配線に影響しない等優れたものである。 As described above, in the semiconductor device of the present invention, the periphery of the semiconductor pellet is surrounded by the frame-shaped groove, so that moisture entering from the outside to the boundary surface between the encapsulant and the wiring substrate is the electrode of the semiconductor pellet. Since the moisture invasion path to reach the surface of the semiconductor device is expanded, it takes time for the moisture invading from the outside to the interface between the encapsulant and the wiring board to erode the electrodes of the semiconductor pellet. Longevity. Further, since the electrode on the surface of the wiring board, which is connected to the electrode of the semiconductor pellet, is electrically connected to the electrode on the back surface of the wiring board by a through hole, even if a frame-shaped groove is provided on the surface of the wiring board. The groove is excellent in that it does not affect the wiring of the electrodes.
【図1】本考案の一実施例を示し、図1の(a)は本考
案の縦断面図、図1の(b)は(a)に使用される配線
基板の概略の構造を示す上面図である。1 shows an embodiment of the present invention, FIG. 1 (a) is a vertical sectional view of the present invention, and FIG. 1 (b) is a top view showing a schematic structure of a wiring board used in (a). It is a figure.
【図2】従来例の縦断面図である。FIG. 2 is a vertical sectional view of a conventional example.
1 配線基板 4 半導体ペレット 5 封止材 6 境面 7 半導体ペレットの電極 8 配線基板の表面の電極 9 スルホール 10 配線基板の裏面の電極 21 溝部 22 溝部 DESCRIPTION OF SYMBOLS 1 Wiring board 4 Semiconductor pellet 5 Encapsulating material 6 Boundary surface 7 Semiconductor pellet electrode 8 Wiring board front surface electrode 9 Through hole 10 Wiring board back surface electrode 21 Groove 22 Groove
Claims (1)
し該半導体ペレットの電極を前記配線基板表面の電極に
接続し、前記配線基板の表面の電極と前記配線基板の裏
面の電極とをスルホールで電気的に接続し、前記配線基
板の表面の電極の外側に前記半導体ペレットの周囲を囲
む枠状の溝部を設け、前記半導体ペレットを封止材にて
被覆して前記枠状の溝部の外縁に囲まれた封止材溜を形
成したことを特徴とする半導体装置。1. A semiconductor pellet is arranged on the surface of a wiring board, the electrode of the semiconductor pellet is connected to the electrode on the surface of the wiring board, and the electrode on the surface of the wiring board and the electrode on the back surface of the wiring board are formed by through holes. A frame-shaped groove portion that is electrically connected and surrounds the periphery of the semiconductor pellet is provided outside the electrode on the surface of the wiring board, and the semiconductor pellet is covered with a sealing material to the outer edge of the frame-shaped groove portion. A semiconductor device having an encapsulating material reservoir formed therein.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10650591U JPH0548344U (en) | 1991-11-29 | 1991-11-29 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10650591U JPH0548344U (en) | 1991-11-29 | 1991-11-29 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0548344U true JPH0548344U (en) | 1993-06-25 |
Family
ID=14435290
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10650591U Pending JPH0548344U (en) | 1991-11-29 | 1991-11-29 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0548344U (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004312570A (en) * | 2003-04-10 | 2004-11-04 | Seiko Precision Inc | Solid-state imaging apparatus |
JP2010103420A (en) * | 2008-10-27 | 2010-05-06 | Nec Tokin Corp | Solid-state electrolytic capacitor |
JP2013225583A (en) * | 2012-04-20 | 2013-10-31 | Mitsubishi Electric Corp | Method of manufacturing solar battery |
JP2014001969A (en) * | 2012-06-15 | 2014-01-09 | Hitachi Automotive Systems Ltd | Thermal type flowmeter |
-
1991
- 1991-11-29 JP JP10650591U patent/JPH0548344U/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004312570A (en) * | 2003-04-10 | 2004-11-04 | Seiko Precision Inc | Solid-state imaging apparatus |
JP2010103420A (en) * | 2008-10-27 | 2010-05-06 | Nec Tokin Corp | Solid-state electrolytic capacitor |
JP2013225583A (en) * | 2012-04-20 | 2013-10-31 | Mitsubishi Electric Corp | Method of manufacturing solar battery |
JP2014001969A (en) * | 2012-06-15 | 2014-01-09 | Hitachi Automotive Systems Ltd | Thermal type flowmeter |
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