JPH05335119A - Manufacture of square chip resistor - Google Patents

Manufacture of square chip resistor

Info

Publication number
JPH05335119A
JPH05335119A JP4136543A JP13654392A JPH05335119A JP H05335119 A JPH05335119 A JP H05335119A JP 4136543 A JP4136543 A JP 4136543A JP 13654392 A JP13654392 A JP 13654392A JP H05335119 A JPH05335119 A JP H05335119A
Authority
JP
Japan
Prior art keywords
layer
electrode layer
chip resistor
surface electrode
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4136543A
Other languages
Japanese (ja)
Inventor
Hiroyuki Yamada
博之 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP4136543A priority Critical patent/JPH05335119A/en
Publication of JPH05335119A publication Critical patent/JPH05335119A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the circular conveying tube from clogging when a square chip resistor, to be used as the substitute for a cylindrical chip resistor, is mounted by an automatic collective mounting machine. CONSTITUTION:The pyramidal chip resistor manufacturing method consists of a process in which an upper face electrode layer 2 is formed on one main surface of a square-shaped 96 alumina substrate 1, a process in which a resistance layer 4 is formed in such a manner that it is partially overlapped on the aforesaid upper face electrode 2, and a process in which a protective glass layer 5 is formed covering the above-mentioned resistance layer 4. Further, a process in which an edge face electrode layer 6 is formed in such a manner that the upper face electrode layer 2 and a backside electrode layer 3 will be connected, a process in which a plated layer 10 is formed on the surface of the exposed electrode layer, and a process in which the surface of the plated layer 10 is smoothed are also provided.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は高密度配線回路に用いら
れる、円筒チップ抵抗器の一括実装機により実装され
る、円筒チップ抵抗器と代替可能な角形チップ抵抗器の
製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a rectangular chip resistor which is used in a high-density wiring circuit and which is mounted by a collective mounting machine of cylindrical chip resistors and which can replace the cylindrical chip resistors. .

【0002】[0002]

【従来の技術】近年、電子機器の軽薄短小化に対する要
求がますます増大していく中、回路基板の配線密度を高
めるため、抵抗素子には非常に小型な角形チップ抵抗器
が多く用いられるようになってきた。また、更に近年で
は実装速度を速めるため、多数のチップ部品を同時に実
装する一括マウントが行われるようになってきている。
2. Description of the Related Art In recent years, with the ever-increasing demand for smaller, lighter, smaller electronic devices, in order to increase the wiring density of circuit boards, very small rectangular chip resistors are often used as resistive elements. Has become. Further, in recent years, in order to increase the mounting speed, collective mounting for mounting a large number of chip components at the same time has been performed.

【0003】従来の厚膜タイプの角形チップ抵抗器の製
造工程図の一例を図14に示す。従来の角形チップ抵抗
器は、厚み方向と幅方向の長さがほぼ等しい角柱形の絶
縁性の96アルミナ基板を受け入れる工程A’と、アル
ミナ基板上に一対の銀系厚膜電極による上面電極層と裏
面電極層を形成する工程B’と、この上面電極層と接続
するようにルテニウム系厚膜抵抗による抵抗層を形成す
る工程C’と、抵抗値修正を行う工程D’と、抵抗層を
覆うように保護ガラス層を形成する工程E’と、端面電
極を形成するためにアルミナ基板を短冊状に分割する工
程F’と、上面電極層と裏面電極層の一部と重なるよう
に銀系厚膜電極による端面電極層を形成する工程G’
と、端面電極層を形成した短冊状アルミナ基板を個片に
分割する工程H’と、露出した電極面にはんだ付け性を
確保するためにNiめっき層とはんだめっき層を電解め
っきにより形成する工程I’により形成されていた。
FIG. 14 shows an example of a manufacturing process diagram of a conventional thick film type rectangular chip resistor. The conventional rectangular chip resistor includes a step A ′ of receiving a prismatic insulating 96 alumina substrate having substantially the same length in the thickness direction and a width direction, and an upper electrode layer formed by a pair of silver-based thick film electrodes on the alumina substrate. And a step B'of forming a back electrode layer, a step C'of forming a resistance layer of a ruthenium-based thick film resistor so as to be connected to the top electrode layer, a step D'of resistance value correction, and a resistance layer of A step E'of forming a protective glass layer so as to cover it, a step F'of dividing the alumina substrate into strips for forming end face electrodes, and a silver-based material so as to overlap a part of the upper surface electrode layer and the rear surface electrode layer. Step G'of forming an end face electrode layer by a thick film electrode
And a step H'of dividing the strip-shaped alumina substrate having the end face electrode layer into individual pieces, and a step of forming a Ni plating layer and a solder plating layer on the exposed electrode surface by electrolytic plating to ensure solderability. Was formed by I '.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、従来の
製造方法により製造した角形チップ抵抗器では、図14
に示す工程F’で短冊状アルミナ基板を個片に分割した
際に、端面電極を形成する銀系厚膜電極がアルミナ基板
の分割面どおりに分離されずに、尖った部分が発生す
る。この部分が工程I’でめっきされると、尖った部分
からめっき層が成長しやすいというめっきの性質上、尖
った部分がさらに助長されることになる。したがって、
この角形チップ抵抗器を円筒チップ抵抗器の代替とし
て、円筒チップ抵抗器用の自動一括実装機により実装し
た場合、電極部の尖った部分が一括実装機内の搬送チュ
ーブ内でひっかかり、チューブ内で詰まりが発生しやす
いという課題があった。
However, in the case of the rectangular chip resistor manufactured by the conventional manufacturing method, as shown in FIG.
When the strip-shaped alumina substrate is divided into individual pieces in the step F'shown in (1), the silver-based thick film electrode forming the end face electrode is not separated along the divided surface of the alumina substrate, and a sharp portion is generated. When this portion is plated in step I ′, the sharp portion is further promoted due to the nature of plating that the plating layer easily grows from the sharp portion. Therefore,
When this rectangular chip resistor is used as an alternative to a cylindrical chip resistor and is mounted by an automatic batch mounting machine for cylindrical chip resistors, the sharp parts of the electrode parts are caught in the transfer tube inside the batch mounting machine, causing clogging in the tube. There was a problem that it easily occurred.

【0005】本発明は上記課題を解決するために、搬送
チューブ内で詰まりにくい角形チップ抵抗器を提供する
ことを目的とする。
SUMMARY OF THE INVENTION In order to solve the above problems, it is an object of the present invention to provide a rectangular chip resistor which is less likely to be clogged in a carrier tube.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
に、本発明による角形チップ抵抗器の製造方法は、角柱
形の絶縁基板の一方の主面上に一対の上面電極層を形成
する工程と、この一対の上面電極層の一部に重なるよう
に抵抗層を形成する工程と、この抵抗層を完全に覆うよ
うに保護ガラス層を形成する工程と、前記絶縁基板の他
方の主面上に一対の裏面電極層を形成する工程と、前記
一対の上面電極層と一対の裏面電極層とを電気的に接続
するように一対の端面電極層を形成する工程と、露出し
た前記上面電極層と裏面電極層と端面電極層の表面にめ
っき層を形成する工程と、このめっき層の表面を平滑に
する工程とからなることを特徴とするものである。
In order to achieve the above object, a method of manufacturing a rectangular chip resistor according to the present invention comprises a step of forming a pair of upper surface electrode layers on one main surface of a prismatic insulating substrate. And a step of forming a resistance layer so as to overlap a part of the pair of upper surface electrode layers, a step of forming a protective glass layer so as to completely cover the resistance layer, and the other main surface of the insulating substrate. A step of forming a pair of back surface electrode layers, a step of forming a pair of end surface electrode layers so as to electrically connect the pair of top surface electrode layers and a pair of back surface electrode layers, and the exposed top surface electrode layer And a step of forming a plating layer on the surfaces of the back surface electrode layer and the end surface electrode layer, and a step of smoothing the surfaces of the plating layer.

【0007】[0007]

【作用】本発明によれば、めっき層の表面を平滑にする
ことにより、搬送チューブ内で詰まりにくくなり、円筒
チップ抵抗器に代替できる角形チップ抵抗器を実現でき
る。
According to the present invention, by making the surface of the plating layer smooth, it is possible to realize a rectangular chip resistor which is less likely to be clogged in the carrier tube and which can be replaced with a cylindrical chip resistor.

【0008】[0008]

【実施例】以下、本発明の一実施例による角形チップ抵
抗器の製造方法について図面を用いて説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a rectangular chip resistor according to an embodiment of the present invention will be described below with reference to the drawings.

【0009】図1(a),(b)はそれぞれ本実施例の
角形チップ抵抗器の断面図および斜視図である。また図
2〜図13は、その製造工程を示す図である。
FIGS. 1A and 1B are a sectional view and a perspective view, respectively, of a rectangular chip resistor of this embodiment. 2 to 13 are views showing the manufacturing process.

【0010】まず、図3に示すような耐熱性および絶縁
性に優れた96アルミナ基板1を受け入れる。この96
アルミナ基板1には短冊状、および個片状に分割するた
めに、分割のための溝1a,1b(グリーンシート時に
金型成形)が形成されている(基板の厚みは0.7mm
で、分割のための溝1a,1bは1.5mmおよび0.8
mmピッチで形成されている)(工程A)。
First, a 96 alumina substrate 1 having excellent heat resistance and insulating properties as shown in FIG. 3 is received. This 96
In order to divide the alumina substrate 1 into strips and individual pieces, grooves 1a and 1b for dividing (molding at the time of green sheet) are formed (the thickness of the substrate is 0.7 mm).
And the grooves 1a and 1b for division are 1.5 mm and 0.8.
mm pitch) (Process A).

【0011】次に、図4に示すように前記96アルミナ
基板1の表面に厚膜銀ペーストをスクリーン印刷・乾燥
し、更に、図5に示すように前記96アルミナ基板1の
裏面に厚膜銀ペーストをスクリーン印刷・乾燥し、ベル
ト式連続焼成炉によって850℃の温度で、ピーク時間
6分、IN−OUT時間45分のプロファイルによって
焼成し、上面電極層2及び裏面電極層3を同時に形成す
る(工程B)。
Next, as shown in FIG. 4, a thick film silver paste is screen-printed and dried on the surface of the 96 alumina substrate 1, and further, as shown in FIG. The paste is screen-printed, dried, and fired in a belt-type continuous firing furnace at a temperature of 850 ° C. at a peak time of 6 minutes and an IN-OUT time of 45 minutes to form the top electrode layer 2 and the back electrode layer 3 at the same time. (Step B).

【0012】次に、図6に示すように上面電極層2の一
部に重なるように、RuO2を主成分とする厚膜抵抗ペ
ーストをスクリーン印刷・乾燥し、ベルト式連続焼成炉
により850℃の温度でピーク時間6分、IN−OUT
時間45分のプロファイルによって焼成し、抵抗層4を
形成する(工程C)。
Next, as shown in FIG. 6, a thick film resistance paste containing RuO 2 as a main component is screen-printed and dried so as to overlap a part of the upper surface electrode layer 2, and the belt-type continuous firing furnace is used at 850 ° C. Peak temperature 6 minutes, IN-OUT
The resistance layer 4 is formed by firing according to the profile of 45 minutes (step C).

【0013】次に、図7に示すように前記上面電極層2
間の前記抵抗層4の抵抗値を揃えるために、レーザー光
によって、前記抵抗層4の一部4aを破壊し抵抗値修正
を行う(工程D)。
Next, as shown in FIG. 7, the upper electrode layer 2 is formed.
In order to make the resistance value of the resistance layer 4 uniform, the portion 4a of the resistance layer 4 is destroyed by laser light and the resistance value is corrected (step D).

【0014】続いて、図8に示すように前記抵抗層4を
完全に覆うように、ホウケイ酸鉛系ガラスペーストをス
クリーン印刷・乾燥し、ベルト式連続焼成炉によって5
90℃の温度で、ピーク時間6分、IN−OUT50分
の焼成プロファイルによって焼成し、保護ガラス層5を
形成する(工程E)。
Then, as shown in FIG. 8, a lead borosilicate glass paste is screen-printed and dried so as to completely cover the resistance layer 4, and the paste is dried in a belt-type continuous firing furnace to form 5 layers.
The protective glass layer 5 is formed by baking at a temperature of 90 ° C. according to a baking profile with a peak time of 6 minutes and IN-OUT of 50 minutes (step E).

【0015】次に、端面電極を形成するための準備工程
として、端面電極を露出させるために、図9に示すよう
にアルミナ基板1を短冊状に分割(1.5mmピッチ側を
分割)し、短冊状アルミナ基板を得る(工程F)。
Next, as a preparatory step for forming the end face electrodes, the alumina substrate 1 is divided into strips (division on the 1.5 mm pitch side) to expose the end face electrodes, as shown in FIG. A strip-shaped alumina substrate is obtained (step F).

【0016】そして、図10に示すように前記短冊状ア
ルミナ基板の側面に、前記上面電極層2および前記裏面
電極層3の一部に重なるように厚膜銀ペーストをローラ
ーによって塗布し、ベルト式連続焼成炉によって600
℃の温度で、ピーク時間6分、IN−OUT45分の焼
成プロファイルによって焼成し端面電極層6を形成す
る。この時、短冊状アルミナ基板を端面電極側から見る
と、図12のように表され、銀ペーストを塗布時に分割
溝1a中にペーストが流れ込む(図13参照)。このた
め、端面電極層6と同時に、第1側面電極層7と第2側
面電極層8が形成される(工程G)。
Then, as shown in FIG. 10, a thick film silver paste is applied to a side surface of the strip-shaped alumina substrate by a roller so as to overlap a part of the upper surface electrode layer 2 and the rear surface electrode layer 3, and a belt type is applied. 600 by continuous firing furnace
The end face electrode layer 6 is formed by firing at a temperature of C. with a firing profile of a peak time of 6 minutes and IN-OUT 45 minutes. At this time, when the strip-shaped alumina substrate is viewed from the end face electrode side, it is shown as in FIG. 12, and the paste flows into the dividing groove 1a when the silver paste is applied (see FIG. 13). Therefore, the first side surface electrode layer 7 and the second side surface electrode layer 8 are formed simultaneously with the end surface electrode layer 6 (step G).

【0017】次に、図11に示すように電極めっきの準
備工程として、前記端面電極層6を形成済みの短冊状ア
ルミナ基板を個片に分割(0.8mmピッチ側を分割)
し、個片状アルミナ基板を得た。
Next, as shown in FIG. 11, as a preparation step for electrode plating, the strip-shaped alumina substrate on which the end face electrode layer 6 has been formed is divided into individual pieces (divided on the 0.8 mm pitch side).
Then, an individual alumina substrate was obtained.

【0018】次に、露出している上面電極層2と裏面電
極層3と端面電極層6のはんだ付け時の電極喰われの防
止およびはんだ付けの信頼性の確保のため、電解めっき
によってNiめっき層9とSn−Pb(Sn:Pb=6
0:40)のめっき層10を形成する。
Next, in order to prevent electrode erosion during soldering of the exposed upper surface electrode layer 2, rear surface electrode layer 3 and end surface electrode layer 6 and to secure reliability of soldering, Ni plating is performed by electrolytic plating. Layer 9 and Sn-Pb (Sn: Pb = 6
The plating layer 10 of 0:40) is formed.

【0019】そして最後に、めっき層の融点よりも高い
沸点を有する高沸点液体の中にめっき済みの角形チップ
抵抗器を通して、めっき層の表面を平滑にした。Sn−
Pbめっき層の融点は180〜190℃であるため、そ
れよりも沸点の高いやし油を筒状の容器に注入し、その
上部のみを250〜280℃になるように加熱する。容
器内は上部のみが対流により高温となるが、その下の部
分は温度勾配により徐々に低温となる。その状態の中を
チップ抵抗器が落下していくと、いったんめっき層が溶
融し表面が平滑になった後に、180℃以下になった部
分より平滑化された溶融部が固化されていく。
Finally, the surface of the plating layer was smoothed by passing the plated rectangular chip resistor in a high boiling point liquid having a boiling point higher than the melting point of the plating layer. Sn-
Since the melting point of the Pb plating layer is 180 to 190 ° C, coconut oil having a higher boiling point than that is poured into a cylindrical container, and only the upper portion thereof is heated to 250 to 280 ° C. Only the upper part of the container has a high temperature due to convection, but the lower part has a gradually lower temperature due to the temperature gradient. When the chip resistor falls in this state, the plating layer is once melted and the surface is smoothed, and then the smoothed melted part is solidified from the part where the temperature is 180 ° C. or lower.

【0020】以上の工程により、本実施例による角形チ
ップ抵抗器を試作した。完成品の寸法は。長さが1.6
mm、幅が0.8mm、厚さが0.8mmとなった。
The square chip resistor according to the present embodiment was prototyped by the above steps. What are the dimensions of the finished product? 1.6 in length
mm, width 0.8 mm, and thickness 0.8 mm.

【0021】本実施例により製造した角形チップ抵抗器
は電極部の尖った部分が緩和され、この角形チップ抵抗
器を、円筒チップ抵抗器の代替として一括実装機により
実装した結果、従来の製造方法による角形チップ抵抗器
では、一括実装機の搬送チューブ内での詰まりの発生率
が3%であったことに対し、0%に改善することができ
た。
In the rectangular chip resistor manufactured according to the present embodiment, the pointed portion of the electrode portion is relaxed, and this rectangular chip resistor is mounted by a collective mounting machine as an alternative to the cylindrical chip resistor. In the rectangular chip resistor according to 1., the occurrence rate of clogging in the carrier tube of the collective mounting machine was 3%, but it could be improved to 0%.

【0022】[0022]

【発明の効果】以上のことから明らかなように、本発明
によれば、一括実装機内で詰まることのない、円筒チッ
プ抵抗器に代替できるような角形チップ抵抗器を実現す
ることができる。
As is apparent from the above, according to the present invention, it is possible to realize a rectangular chip resistor which can be replaced by a cylindrical chip resistor without being clogged in the collective mounting machine.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a),(b)は本発明の一実施例による製造
方法により得た角形チップ抵抗器の断面図及び斜視図
1A and 1B are a sectional view and a perspective view of a rectangular chip resistor obtained by a manufacturing method according to an embodiment of the present invention.

【図2】本発明の一実施例の角形チップ抵抗器の製造方
法による製造工程図
FIG. 2 is a manufacturing process diagram of a method for manufacturing a rectangular chip resistor according to an embodiment of the present invention.

【図3】同抵抗器の製造方法を順を追って示した平面図FIG. 3 is a plan view showing a method of manufacturing the same resistor in sequence.

【図4】同じく平面図FIG. 4 is a plan view of the same.

【図5】同じく平面図FIG. 5 is a plan view of the same.

【図6】同じく平面図FIG. 6 is a plan view of the same.

【図7】同じく平面図FIG. 7 is a plan view of the same.

【図8】同じく平面図FIG. 8 is a plan view of the same.

【図9】同じく斜視図FIG. 9 is a perspective view of the same.

【図10】同じく斜視図FIG. 10 is a perspective view of the same.

【図11】同じく斜視図FIG. 11 is a perspective view of the same.

【図12】同じく斜視図FIG. 12 is a perspective view of the same.

【図13】同じく平面図FIG. 13 is a plan view of the same.

【図14】従来の角形チップ抵抗器の製造方法を示す製
造工程図
FIG. 14 is a manufacturing process diagram showing a conventional method for manufacturing a rectangular chip resistor.

【符号の説明】[Explanation of symbols]

1 96アルミナ基板 2 上面電極層 3 裏面電極層 4 抵抗層 5 保護ガラス層 6 端面電極層 7 第1側面電極層 8 第2側面電極層 9 Niめっき層 10 めっき層 1 96 Alumina Substrate 2 Top Electrode Layer 3 Back Electrode Layer 4 Resistance Layer 5 Protective Glass Layer 6 End Face Electrode Layer 7 First Side Electrode Layer 8 Second Side Electrode Layer 9 Ni Plating Layer 10 Plating Layer

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】角柱形の絶縁基板の一方の主面上に一対の
上面電極層を形成する工程と、この一対の上面電極層の
一部に重なるように抵抗層を形成する工程と、この抵抗
層を完全に覆うように保護ガラス層を形成する工程と、
前記絶縁基板の他方の主面上に一対の裏面電極層を形成
する工程と、前記一対の上面電極層と一対の裏面電極層
とを電気的に接続するように一対の端面電極層を形成す
る工程と、露出した前記上面電極層と裏面電極層と端面
電極層の表面にめっき層を形成する工程と、このめっき
層の表面を平滑にする工程とからなることを特徴とする
角形チップ抵抗器の製造方法。
1. A step of forming a pair of upper surface electrode layers on one main surface of a prismatic insulating substrate, a step of forming a resistance layer so as to partially overlap the pair of upper surface electrode layers, and A step of forming a protective glass layer so as to completely cover the resistance layer,
Forming a pair of back surface electrode layers on the other main surface of the insulating substrate; and forming a pair of end surface electrode layers so as to electrically connect the pair of top surface electrode layers and the pair of back surface electrode layers. A rectangular chip resistor comprising a step, a step of forming a plating layer on the exposed surfaces of the upper surface electrode layer, the back surface electrode layer and the end surface electrode layer, and a step of smoothing the surface of the plating layer. Manufacturing method.
JP4136543A 1992-05-28 1992-05-28 Manufacture of square chip resistor Pending JPH05335119A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4136543A JPH05335119A (en) 1992-05-28 1992-05-28 Manufacture of square chip resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4136543A JPH05335119A (en) 1992-05-28 1992-05-28 Manufacture of square chip resistor

Publications (1)

Publication Number Publication Date
JPH05335119A true JPH05335119A (en) 1993-12-17

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP4136543A Pending JPH05335119A (en) 1992-05-28 1992-05-28 Manufacture of square chip resistor

Country Status (1)

Country Link
JP (1) JPH05335119A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002057013A (en) * 2000-08-10 2002-02-22 Rohm Co Ltd Method of manufacturing chip type resistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002057013A (en) * 2000-08-10 2002-02-22 Rohm Co Ltd Method of manufacturing chip type resistor
JP4703824B2 (en) * 2000-08-10 2011-06-15 ローム株式会社 Manufacturing method of chip resistor

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