JPH05326992A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH05326992A JPH05326992A JP4122271A JP12227192A JPH05326992A JP H05326992 A JPH05326992 A JP H05326992A JP 4122271 A JP4122271 A JP 4122271A JP 12227192 A JP12227192 A JP 12227192A JP H05326992 A JPH05326992 A JP H05326992A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- impurity
- band gap
- surface side
- receiving surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Photovoltaic Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体装置に関し、さら
に詳しくは光電変換の半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a photoelectric conversion semiconductor device.
【０００２】[0002]
【従来の技術】非単結晶の光起電力素子が安定性に欠け
ていることは一般によく知られている。特に非晶質シリ
コンの場合、照射光により伝導度が低下し150 ℃程度の
熱処理により再び伝導度が回復するというStaebler-Wro
nski効果と呼ばれる現象があるために太陽電池の変換効
率が低下する。2. Description of the Related Art It is generally well known that non-single-crystal photovoltaic devices lack stability. Especially in the case of amorphous silicon, the conductivity decreases due to irradiation light, and the conductivity is restored again by heat treatment at about 150 ° C.
Due to the phenomenon called the nski effect, the conversion efficiency of the solar cell decreases.
【０００３】したがって比較的安定な素子をえるために
は、ｉ層を薄膜化することにより活性層にかかる電界強
度を強め輸送能を上げるような構造のものが考えられて
いる。さらに積層型の構造を採用することによって、受
光面側の素子はｉ層が薄膜であるために劣化が抑制さ
れ、裏面側の素子は長波長光のみが照射されるために劣
化が抑制されるので、安定性の良い素子として考えられ
ている。Therefore, in order to obtain a relatively stable element, a structure in which the i layer is thinned to enhance the electric field strength applied to the active layer and enhance the transport capability has been considered. Further, by adopting the laminated structure, the element on the light-receiving surface side is suppressed from being deteriorated because the i layer is a thin film, and the element on the back surface side is irradiated with only long-wavelength light, so that the deterioration is suppressed. Therefore, it is considered as an element with good stability.
【０００４】図２に、受光面側にａ−ＳｉＣ：Ｈのよう
な広バンドギャップ半導体層を用いた従来の非晶質ｐ−
ｉ−ｎ−型多重接合型太陽電池を示す。図２において、
１はガラス基板、２は透明電極、３、13はｐ型高濃度不
純物層、４、14はｐ型高バンドギャップ不純物層、５、
15はバッファー層、６、16はｉ層、７、17はｎ型不純物
層、８は裏面電極を示す。図示したように、ｐ層４、14
とｉ層６、16のそれぞれの界面に、ｉ層にむかってバン
ドギャップを減少させたバッファー層５、15が設けられ
ており、さらに透明導電膜２と第１番目のｐ層４、第１
番目のｎ層７と第２番目のｐ層14のオーミック性を改善
するために、広バンドギャップｐ層４、14の受光面側に
高濃度の不純物層３、13が設けられている。実際に図２
の積層型太陽電池を作製し劣化促進試験を実施したとこ
ろ、20％程度の変換効率の低下が認められた。FIG. 2 shows a conventional amorphous p-type using a wide bandgap semiconductor layer such as a-SiC: H on the light-receiving surface side.
1 shows an in-type multi-junction solar cell. In FIG.
1 is a glass substrate, 2 is a transparent electrode, 3 and 13 are p-type high concentration impurity layers, 4 and 14 are p-type high bandgap impurity layers, 5 and
Reference numeral 15 is a buffer layer, 6 and 16 are i layers, 7 and 17 are n-type impurity layers, and 8 is a back surface electrode. As shown, p layers 4, 14
The buffer layers 5 and 15 having a reduced band gap toward the i layer are provided at the respective interfaces between the and i layers 6 and 16, and the transparent conductive film 2 and the first p layer 4 and the first p layer 4 are provided.
In order to improve the ohmic properties of the n-th n layer 7 and the second p-layer 14, high-concentration impurity layers 3 and 13 are provided on the light-receiving surface side of the wide band gap p-layers 4 and 14. Actually Figure 2
When a stacked solar cell of No. 1 was produced and a deterioration acceleration test was conducted, a decrease in conversion efficiency of about 20% was observed.
【０００５】[0005]
【発明が解決しようとする課題】本発明は上記問題を解
決するためになされたものであり、多重接合型太陽電池
の変換効率の光劣化を抑制し、高効率で安定性に優れた
半導体装置を提供することを目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and suppresses the photodegradation of the conversion efficiency of a multi-junction solar cell, and is a highly efficient and stable semiconductor device. The purpose is to provide.
【０００６】[0006]
【課題を解決するための手段】本発明の半導体装置は、
受光面側に、活性層である真性半導体のｉ層よりもバン
ドギャップの広いｐ型あるいはｎ型の不純物層を有する
ｐ−ｉ−ｎ型あるいはｎ−ｉ−ｐ型光起電力素子を多重
に接合した非単結晶のシリコン系半導体装置であって、
少なくとも一つの広バンドギャップ不純物層の受光面側
に該不純物層と同じ導電型でかつ不純物濃度の高い高濃
度不純物層を設けるとともに、受光面側に最近接の広バ
ンドギャップ不純物層以外の広バンドギャップ不純物層
とｉ層の間に、該広バンドギャップ不純物層からｉ層に
むかってバンドギャップを連続的または段階的に減少さ
せたバッファー層を設けることを特徴としている。The semiconductor device of the present invention comprises:
On the light-receiving surface side, multiple p-i-n-type or n-ip-type photovoltaic elements having p-type or n-type impurity layers having a wider bandgap than the i-layer of the intrinsic semiconductor which is the active layer are multiplexed. A bonded non-single-crystal silicon-based semiconductor device,
A high-concentration impurity layer having the same conductivity type as that of the impurity layer and having a high impurity concentration is provided on the light-receiving surface side of at least one wide bandgap impurity layer, and a wide band other than the closest wide-bandgap impurity layer is provided on the light-receiving surface side. It is characterized in that a buffer layer whose band gap is reduced continuously or stepwise from the wide band gap impurity layer to the i layer is provided between the gap impurity layer and the i layer.
【０００７】[0007]
【作用】受光面側に最近接の広バンドギャップ不純物層
以外の広バンドギャップ不純物層とｉ層の間に、該広バ
ンドギャップ不純物層からｉ層にむかってバンドギャッ
プを減少させたバッファー層を設けることにより、受光
面側に最近接の半導体装置での光劣化が抑制され全体と
しての多重接合型半導体装置の変換効率の光劣化が抑制
され、高効率で安定性に優れたものができる。A buffer layer having a band gap reduced from the wide bandgap impurity layer to the i layer is provided between the i band and the wide bandgap impurity layer other than the wide bandgap impurity layer closest to the light receiving surface side. By providing it, the photodegradation of the semiconductor device closest to the light-receiving surface side is suppressed, and the photodegradation of the conversion efficiency of the multi-junction semiconductor device as a whole is suppressed, and a highly efficient and excellent stability can be obtained.
【０００８】[0008]
【実施例】本発明における非単結晶シリコン系半導体と
しては、たとえば、Ｓｉ、ＳｉＣ、ＳｉＮ、ＳｉＧｅ、
ＳｉＳｎなどの水素化合金、フッ素化合金などの一般に
光起電力素子に使用されるアモルファス系、微結晶を含
むアモルファス系または多結晶系の半導体があげられ
る。EXAMPLES Examples of the non-single-crystal silicon semiconductor according to the present invention include Si, SiC, SiN, SiGe,
Examples include hydrogenated alloys such as SiSn, fluorinated alloys, and other amorphous semiconductors generally used in photovoltaic devices, and amorphous or polycrystalline semiconductors including microcrystals.
【０００９】非単結晶シリコン系半導体は、窓層材料と
してｉ層よりバンドギャップの広い広バンドギャップ半
導体を用いて、ｐ−ｉ−ｎ型あるいはｎ−ｉ−ｐ型の光
起電力素子とされ、一般にはさらに二重ないし四重にさ
れ多重接合型光起電力素子が形成される。多重接合型光
起電力素子を形成する各非単結晶シリコン系半導体の厚
さは特に限定されず、通常光起電力素子に使用される範
囲のものであれば良い。The non-single crystal silicon semiconductor is a pin-type or n-ip type photovoltaic device using a wide bandgap semiconductor having a wider bandgap than the i-layer as a window layer material. Generally, a double or quadruple structure is used to form a multi-junction photovoltaic device. The thickness of each non-single-crystal silicon-based semiconductor forming the multi-junction photovoltaic element is not particularly limited as long as it is within a range normally used for photovoltaic elements.
【００１０】本発明においては、多重接合型光起電力素
子の受光面側のｐ／ｉまたはｎ／ｉ界面にｉ層に向かっ
てバンドギャップを減少させたバッファー層を設け、さ
らに透明導電膜およびｐ／ｎ逆接合部におけるオーミッ
ク性を改善するために、広バンドギャップ層の受光面側
に、さらに不純物濃度を高めた高濃度不純物層を設けて
いる。ここで受光面側に最近接の第１番目の光起電力素
子にはｐ／ｉまたはｎ／ｉ界面にはバッファー層は形成
しない。バッファー層のバンドギャップ幅を連続的また
は段階的に減少させる方法としては、半導体材料の組成
比を変化させる方法、不純物濃度を減少させる方法、あ
るいはこれらを併用する方法などが採用できる。前者に
ついては、たとえばＳｉＣのばあいには、成膜に際して
炭素源の供給量を徐々に減らしてＣの割合を減少させる
ことによって、バンドギャップを漸減させることができ
る。バッファー層は、そのバンドギャップの値がｉ層に
向かってほぼ広バンドギャップ層からｉ層の値に減少す
るように形成するのが好ましく、たとえば、バッファー
層の組成比を、広バンドギャップ層の組成比から実質的
にｉ層と同様の状態にまで連続的に変化させることによ
って、かかるバッファー層を形成することができる。In the present invention, a buffer layer having a band gap reduced toward the i layer is provided at the p / i or n / i interface on the light receiving surface side of the multi-junction photovoltaic element, and a transparent conductive film and In order to improve the ohmic property in the p / n reverse junction, a high-concentration impurity layer having a higher impurity concentration is provided on the light-receiving surface side of the wide band gap layer. Here, no buffer layer is formed at the p / i or n / i interface in the first photovoltaic element closest to the light receiving surface side. As a method of continuously or stepwise reducing the bandgap width of the buffer layer, a method of changing the composition ratio of the semiconductor material, a method of reducing the impurity concentration, a method of using these in combination, or the like can be adopted. Regarding the former, for example, in the case of SiC, the band gap can be gradually reduced by gradually reducing the supply amount of the carbon source during film formation to reduce the proportion of C. The buffer layer is preferably formed such that its bandgap value decreases from the wide bandgap layer toward the i-layer toward the value of the i-layer. Such a buffer layer can be formed by continuously changing the composition ratio to a state substantially similar to that of the i layer.
【００１１】本発明の半導体装置の一実施態様を示す図
１に基づいて説明すると、広バンドギャップ不純物層
（ｐ型半導体層）４、14の受光面側に高濃度広バンドギ
ャップ半導体層である高濃度不純物層３、13が設けられ
ており、それぞれｐ型半導体層４、14と同じ導電型を示
す。広バンドギャップ不純物層４、14がｎ型半導体であ
るばあいは、高濃度不純物層３、13もｎ型半導体であ
る。さらに、受光面側に最近接の広バンドギャップ不純
物層４以外の広バンドギャップ不純物層、すなわち図１
においてはｐ型半導体層14とｉ層16との間に、ｉ層に向
かって不純物濃度および（または）組成比を連続的に変
化させて形成したバッファー層15が設けられている。な
お、図１において、１は基板、２はＳｎＯ2 透明電極、
６、16はｉ層、８は裏面電極を示す。Referring to FIG. 1 showing an embodiment of the semiconductor device of the present invention, a high concentration wide bandgap semiconductor layer is formed on the light receiving surface side of the wide bandgap impurity layers (p-type semiconductor layers) 4 and 14. High-concentration impurity layers 3 and 13 are provided and have the same conductivity type as the p-type semiconductor layers 4 and 14, respectively. When the wide band gap impurity layers 4 and 14 are n-type semiconductors, the high-concentration impurity layers 3 and 13 are also n-type semiconductors. Further, a wide band gap impurity layer other than the wide band gap impurity layer 4 closest to the light receiving surface side, that is, FIG.
In the above, a buffer layer 15 is formed between the p-type semiconductor layer 14 and the i layer 16 by continuously changing the impurity concentration and / or the composition ratio toward the i layer. In FIG. 1, 1 is a substrate, 2 is a SnO 2 transparent electrode,
Reference numerals 6 and 16 denote i layers, and 8 denotes a back surface electrode.
【００１２】本発明における受光面側の広バンドギャッ
プ層としては、ａ−Ｓｉ：Ｈ、好ましくはａ−ＳｉＣ：
Ｈなどにｐ型用ドーパントとして周期律表III ｂ族の元
素をドープしたもの、あるいはｎ型用ドーパントとして
周期律表Ｖｂ族の元素をドープしたものなどであり、そ
の厚さは通常80〜 300オングストロームである。通常は
広バンドギャップ層の不純物濃度は一定とされる。The wide bandgap layer on the light-receiving surface side in the present invention is a-Si: H, preferably a-SiC:
For example, H or the like is doped with an element of Group IIIb of the periodic table as a p-type dopant, or is doped with an element of Group Vb of the periodic table as an n-type dopant, and the thickness thereof is usually 80 to 300. Angstrom. Usually, the impurity concentration of the wide band gap layer is constant.
【００１３】該広バンドギャップ層とｉ層の間にｉ層に
向かってバンドギャップを減少させたバッファー層が設
けられるが、その厚さは通常30〜 500オングストローム
であり、好ましくは50〜 200オングストロームである。A buffer layer having a reduced bandgap toward the i layer is provided between the wide bandgap layer and the i layer, and the thickness thereof is usually 30 to 500 angstroms, preferably 50 to 200 angstroms. Is.
【００１４】さらに受光面側広バンドギャップ層と透明
電極の間に両層間の接触抵抗を低下する目的で、あるい
は第２番目以降の素子の広バンドギャップ層の受光面側
にｐ／ｎ逆接合部の接触抵抗を低下する目的で、該広バ
ンドギャップ層と同型でさらに高濃度の不純物層を設け
ても良い。この高濃度不純物層の厚さは、通常５〜 100
オングストローム、好ましくは10〜50オングストローム
であり、不純物濃度は受光面側広バンドギャップ層の５
〜50倍とするのが好ましい。Further, for the purpose of reducing the contact resistance between the light receiving surface side wide band gap layer and the transparent electrode, or to the light receiving surface side of the wide band gap layer of the second and subsequent elements, p / n reverse junction is performed. An impurity layer of the same type as the wide band gap layer and having a higher concentration may be provided for the purpose of reducing the contact resistance of the portion. The thickness of this high-concentration impurity layer is usually 5 to 100.
Å, preferably 10 to 50 Å, and the impurity concentration is 5 of the wide bandgap layer on the light-receiving surface side.
It is preferably ˜50 times.
【００１５】ｉ層としては、たとえばａ−Ｓｉ：Ｈ、ａ
−Ｓｉ：Ｈ：Ｆなどが用いられ、その厚さは通常300 〜
7000オングストロームである。As the i layer, for example, a-Si: H, a
-Si: H: F or the like is used, and the thickness is usually 300-
It is 7,000 angstroms.
【００１６】また、裏面電極側の不純物層７、17として
は、たとえばａ−Ｓｉ：Ｈや微結晶化Ｓｉなどに受光面
側と逆の導電性を示す不純物をドープしたものであり、
その厚さは80〜 300オングストロームである。なお、上
記の各層の厚さは上記の数値に限定されるものではな
い。The impurity layers 7 and 17 on the back electrode side are, for example, a-Si: H or microcrystallized Si doped with an impurity having conductivity opposite to that of the light receiving surface side.
Its thickness is 80-300 Angstroms. The thickness of each layer is not limited to the above numerical values.
【００１７】本実施例では透明電極としてＳｎＯ2 を使
用しているがＩＴＯ、ＺｎＯなどあるいはこれらの複層
膜でも差し支えない。In this embodiment, SnO 2 is used as the transparent electrode, but ITO, ZnO or the like or a multilayer film of these may be used.
【００１８】つぎに実施例をあげて本発明の半導体装置
を説明するが、本発明はかかる実施例のみに限定される
ものではない。Next, the semiconductor device of the present invention will be described with reference to examples, but the present invention is not limited to these examples.
【００１９】実施例１ 平行平板容量結合型グロー放電装置を用いて半導体各層
を成膜形成し、図１に示す構造を有する有効面積 1.0cm
2 の太陽電池を作製した。Example 1 An effective area of 1.0 cm having a structure shown in FIG. 1 in which each semiconductor layer is formed into a film by using a parallel plate capacitively coupled glow discharge device.
A solar cell of 2 was produced.
【００２０】ＳｎＯ2 透明電極２付きガラス基板１上
に、膜厚50オングストロームの高濃度ｐ型半導体層３を
ガス流量ＳｉＨ4 （50sccm) 、ＣＨ4 （35sccm) 、Ｂ2
Ｈ6 (1000ppmH2 希釈品）(500sccm) にて反応圧力1.0To
rr 、ヒーター温度 200℃、ＲＦパワー50mW／cm2 で成
膜し、ついで膜厚 250オングストロームのｐ型半導体層
４をガス流量ＳｉＨ4 （50sccm) 、ＣＨ4 (35sccm)、Ｂ
2 Ｈ6 ( 1000ppmH2 希釈品）(100sccm) 、Ｈ2 (500scc
m) にて反応圧力1.0Torr 、ヒーター温度200 ℃、ＲＦ
パワー50mW／cm2 で成膜した。ｉ型半導体層６を、ガス
流量ＳｉＨ4 (50sccm)にて反応圧力0.3Torr 、ヒーター
温度200 ℃、ＲＦパワー50mW／cm2 で成膜した。つぎに
膜厚300 オングストロームの微結晶化ｎ型半導体層７
を、ガス流量ＳｉＨ4 (5sccm) 、ＰＨ3 （1000 ppmH2
希釈品）(100sccm) 、Ｈ2 (200sccm) にて反応圧力1.0T
orr 、ヒーター温度200 ℃、ＲＦパワー 500mW／cm2 で
成膜した。A high-concentration p-type semiconductor layer 3 having a film thickness of 50 Å is formed on a glass substrate 1 with a SnO 2 transparent electrode 2 at a gas flow rate of SiH 4 (50 sccm), CH 4 (35 sccm), and B 2.
The reaction pressure 1.0To by H 6 (1000ppmH 2 diluted mixture) (500 sccm)
rr, heater temperature 200 ° C., RF power 50 mW / cm 2 to form a film, and then a p-type semiconductor layer 4 having a film thickness of 250 angstrom is formed by gas flow rate SiH 4 (50 sccm), CH 4 (35 sccm), B
2 H 6 (1000ppm H 2 diluted product) (100sccm), H 2 (500scc
m) reaction pressure 1.0 Torr, heater temperature 200 ℃, RF
The film was formed with a power of 50 mW / cm 2 . The i-type semiconductor layer 6 was formed at a gas flow rate of SiH 4 (50 sccm) at a reaction pressure of 0.3 Torr, a heater temperature of 200 ° C., and an RF power of 50 mW / cm 2 . Next, the microcrystallized n-type semiconductor layer 7 having a film thickness of 300 angstrom
Gas flow rate SiH 4 (5 sccm), PH 3 (1000 ppmH 2
Diluted product) (100sccm), H 2 (200sccm) with reaction pressure 1.0T
A film was formed with an orr, a heater temperature of 200 ° C., and an RF power of 500 mW / cm 2 .
【００２１】さらに上記と同様にして、高濃度ｐ型半導
体層13、ｐ型半導体層14、ｉ型半導体層16、微結晶化ｎ
型半導体層17を成膜した。ただし、ｐ型半導体層14の成
膜後に該層14とｉ型半導体層16の界面に、膜厚200 オン
グストロームのバッファー層15を、初期成膜条件はｐ型
半導体層14と同一とし、ドーパント濃度およびＣＨ4濃
度を徐々に減少させながら原料ガスを供給し、最終成膜
条件はｐ型半導体層14の成膜条件からＣＨ4 、Ｂ2 Ｈ6
がない条件で成膜した。さらに、ｎ型半導体層17の成膜
後裏面電極８を形成して太陽電池をえた。Further, similarly to the above, the high-concentration p-type semiconductor layer 13, the p-type semiconductor layer 14, the i-type semiconductor layer 16, and the microcrystallized n.
The type semiconductor layer 17 was formed. However, after the p-type semiconductor layer 14 is formed, a buffer layer 15 having a film thickness of 200 Å is formed at the interface between the p-type semiconductor layer 14 and the i-type semiconductor layer 16, the initial film formation conditions are the same as those of the p-type semiconductor layer 14, and the dopant concentration is And the source gas is supplied while gradually reducing the CH 4 concentration, and the final film forming conditions are CH 4 , B 2 H 6 from the film forming conditions of the p-type semiconductor layer 14.
The film was formed under the condition that there is no Further, after forming the n-type semiconductor layer 17, the back surface electrode 8 was formed to obtain a solar cell.
【００２２】[0022]
【発明の効果】以上説明したように受光面側に最近接の
広バンドギャップ不純物層以外の広バンドギャップ不純
物層とｉ層の間にｉ層にむかってバンドギャップを連続
的または段階的に減少させたバッファー層を設けたた
め、受光面側に最近接の半導体装置での光劣化が抑制さ
れ全体としての多重複合型半導体装置の変換効率の光劣
化が抑制され、高効率で安定性に優れたものができる。As described above, the band gap is continuously or stepwise reduced toward the i layer between the i layer and the wide band gap impurity layer other than the wide band gap impurity layer closest to the light receiving surface side. Since the buffer layer is provided, the photodegradation of the semiconductor device closest to the light receiving surface side is suppressed, and the photodegradation of the conversion efficiency of the multiple compound semiconductor device as a whole is suppressed, resulting in high efficiency and excellent stability. I can do things.
【図面の簡単な説明】[Brief description of drawings]
【図１】本発明の半導体装置の一実施例である太陽電池
の構成を示す説明図である。FIG. 1 is an explanatory diagram showing a configuration of a solar cell which is an embodiment of a semiconductor device of the present invention.
【図２】従来の太陽電池の構成を示す説明図である。FIG. 2 is an explanatory diagram showing a configuration of a conventional solar cell.
１ 基板 ２ 透明電極 ３、13 高濃度ｐ型半導体層 ４、14 ｐ型半導体層 ５、15 バッファー層 ６、16 ｉ型半導体層 ７、17 ｎ型半導体層 ８ 裏面電極 DESCRIPTION OF SYMBOLS 1 substrate 2 transparent electrode 3, 13 high concentration p-type semiconductor layer 4, 14 p-type semiconductor layer 5, 15 buffer layer 6, 16 i-type semiconductor layer 7, 17 n-type semiconductor layer 8 backside electrode
Claims (2)
ｉ層よりもバンドギャップの広いｐ型あるいはｎ型の不
純物層を有するｐ−ｉ−ｎ型あるいはｎ−ｉ−ｐ型光起
電力素子を多重に接合した非単結晶のシリコン系半導体
装置であって、少なくとも一つの広バンドギャップ不純
物層の受光面側に該不純物層と同じ導電型でかつ不純物
濃度の高い高濃度不純物層を設けるとともに、受光面側
に最近接の広バンドギャップ不純物層以外の広バンドギ
ャップ不純物層とｉ層の間に、該広バンドギャップ不純
物層からｉ層にむかってバンドギャップを連続的または
段階的に減少させたバッファー層を設けることを特徴と
する半導体装置。1. A p-i-n-type or n-ip-type photovoltaic layer having a p-type or n-type impurity layer having a bandgap wider than that of an i-layer of an intrinsic semiconductor, which is an active layer, on the light-receiving surface side. A non-single-crystal silicon-based semiconductor device in which power elements are multiple-bonded, and a high-concentration impurity layer having the same conductivity type as that of the impurity layer and a high impurity concentration is provided on the light-receiving surface side of at least one wide bandgap impurity layer. In addition, the band gap is continuously or stepwise between the wide band gap impurity layer other than the wide band gap impurity layer closest to the light receiving surface side and the i layer from the wide band gap impurity layer toward the i layer. A semiconductor device comprising a reduced buffer layer.
Ｃ：Ｈである請求項１記載の半導体装置。2. The wide bandgap impurity layer is a-Si
The semiconductor device according to claim 1, wherein C: H.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4122271A JPH05326992A (en) | 1992-05-14 | 1992-05-14 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4122271A JPH05326992A (en) | 1992-05-14 | 1992-05-14 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05326992A true JPH05326992A (en) | 1993-12-10 |
Family
ID=14831835
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4122271A Pending JPH05326992A (en) | 1992-05-14 | 1992-05-14 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05326992A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006006368A1 (en) * | 2004-07-12 | 2006-01-19 | Kaneka Corporation | Method for manufacturing thin film photoelectric converter |
| KR101233205B1 (en) * | 2006-10-20 | 2013-02-15 | 엘지전자 주식회사 | Solar cell system and manufacturing method thereof |
-
1992
- 1992-05-14 JP JP4122271A patent/JPH05326992A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006006368A1 (en) * | 2004-07-12 | 2006-01-19 | Kaneka Corporation | Method for manufacturing thin film photoelectric converter |
| KR101233205B1 (en) * | 2006-10-20 | 2013-02-15 | 엘지전자 주식회사 | Solar cell system and manufacturing method thereof |
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