JPH05259488A - Silicon solar cell device and manufacture thereof - Google Patents
Silicon solar cell device and manufacture thereofInfo
- Publication number
- JPH05259488A JPH05259488A JP4052674A JP5267492A JPH05259488A JP H05259488 A JPH05259488 A JP H05259488A JP 4052674 A JP4052674 A JP 4052674A JP 5267492 A JP5267492 A JP 5267492A JP H05259488 A JPH05259488 A JP H05259488A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- silicon substrate
- type
- oxide film
- solar cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Photovoltaic Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、受光面とは反対側の面
に一対の主電極を持ち、一方の主電極をファイァスルー
により形成するシリコン太陽電池素子及び製造方法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a silicon solar cell element having a pair of main electrodes on the surface opposite to a light receiving surface, and one of the main electrodes is formed by fire through, and a manufacturing method.
【０００２】[0002]
【従来の技術】現在発電原価が高い太陽光発電が実用的
な電源として普及するためには、太陽電池の変換効率の
向上と製造原価の低減が必要である。最近、太陽電池の
変換効率の向上とその製造原価の低減が期待できる裏面
接触太陽電池素子(Backside Contact Silicon Solar Ce
lls)が発表され、現在では、この素子の製造原価低減の
努力が進められており、第５回国際太陽電池科学技術会
議（１９９０年）、テクニカル ダイジェスト、第５０
８頁にはスクリーン印刷技術を用いる製法に適したシリ
コン太陽電池素子が論じられるている。2. Description of the Related Art In order for solar power generation, which currently has a high power generation cost, to become widespread as a practical power source, it is necessary to improve the conversion efficiency of solar cells and reduce the manufacturing cost. Recently, backside contact solar cell devices (Backside Contact Silicon Solar Cell) are expected to improve the conversion efficiency of solar cells and reduce their manufacturing costs.
lls) has been announced and efforts are currently underway to reduce the manufacturing cost of this device. The 5th International Conference on Solar Cell Science and Technology (1990), Technical Digest, 50th
On page 8, a silicon solar cell element suitable for manufacturing using screen printing technology is discussed.
【０００３】[0003]
【発明が解決しようとする課題】上記従来技術における
太陽電池素子は、工程数が大幅に低減された簡易なプロ
セスにより製作できる素子構造であり、低コストなスク
リーン印刷技術を用い、工程数が大幅に低減された簡易
なプロセスにより製作できる素子構造となっているがさ
らに製造コストの低減に関して不十分な点がある。すな
わち、裏面のｎ＋層とｐ＋層との接合分離に多くの工数
を必要とする問題がある。The solar cell element in the prior art described above has an element structure which can be manufactured by a simple process in which the number of steps is greatly reduced, and the number of steps is greatly reduced by using a low-cost screen printing technique. Although the element structure can be manufactured by a simple process which is reduced, there is a point that the manufacturing cost is further reduced. That is, there is a problem that a large number of steps are required to separate the junction between the n + layer and the p + layer on the back surface.
【０００４】本発明の目的は、上記問題を解決しシリコ
ン太陽電池素子を製造する工程を節減し、変換効率を高
めることにある。An object of the present invention is to solve the above problems, reduce the steps for manufacturing a silicon solar cell element, and increase the conversion efficiency.
【０００５】[0005]
【課題を解決するための手段】上記目的は、ｐ型導電性
のシリコン基板の受光面と反対側の表面に形成したｐ＋
型導電性の第１の層と、該第１の層に端面が接触し表面
濃度が１×１０19／ｃｍ3以下のｎ型導電性の第２の層
と、前記第１の層に隣接するｐ型不純物源であり、前記
第１の層を介して第２の層とｐｎ接合で接触し、前記ｐ
型シリコン基板とはオーミック接触し、酸化膜により前
記第２の層とは絶縁されているアルミニウムシリコン合
金層からなる第１の主電極と、前記第２の層に底面が接
触し酸化膜により前記第１の層とは絶縁されている第２
の電極とを具備することにより達成される。The above object is to provide a p + layer formed on the surface of a p-type conductive silicon substrate opposite to the light receiving surface.
Adjacent to the first layer, a first layer having conductivity type, and a second layer having conductivity, the end surface being in contact with the first layer and having a surface concentration of 1 × 10 19 / cm 3 or less. Is a p-type impurity source that is in contact with the second layer through the first layer at a pn junction,
A first main electrode made of an aluminum silicon alloy layer that is in ohmic contact with the silicon substrate and is insulated from the second layer by an oxide film, and the bottom surface is in contact with the second layer, and the first main electrode is formed by an oxide film. A second layer which is insulated from the first layer
It is achieved by including an electrode of.
【０００６】上記目的は、前記シリコン基板がｎ型導電
性であることにより達成される。The above object is achieved by the silicon substrate having n-type conductivity.
【０００７】上記目的は、前記シリコン基板の受光面に
表面濃度が１×１０19／ｃｍ3以下のｎ型導電性の第３
の層と、該第３の層に底面が接触する第３の主電極と、
前記第３の層の該第３の主電極以外の表面を被覆する酸
化膜とを設けたことにより達成される。The above-mentioned object is to provide a third type of n-type conductive material having a surface concentration of 1 × 10 19 / cm 3 or less on the light receiving surface of the silicon substrate.
And a third main electrode whose bottom surface contacts the third layer,
This is achieved by providing an oxide film covering the surface of the third layer other than the third main electrode.
【０００８】上記目的は、表面処理を施したシリコン基
板にりん拡散を行いその表面濃度が１×１０13／ｃｍ3
以下の高濃度層を形成する工程と、該高濃度層を酸化し
てシリコン酸化膜を形成する工程と、該シリコン酸化膜
上にアルミニウムを含むペーストを印刷して焼成する工
程とを有することにより達成される。The above object is to perform phosphorus diffusion on a surface-treated silicon substrate so that the surface concentration is 1 × 10 13 / cm 3.
By having the following steps of forming a high concentration layer, a step of oxidizing the high concentration layer to form a silicon oxide film, and a step of printing a paste containing aluminum on the silicon oxide film and baking the paste. To be achieved.
【０００９】[0009]
【作用】アルミニウムとシリコン酸化膜で被覆されたシ
リコン基板とを合金反応させると、実験事実としてファ
イァスルーによりシリコン酸化膜は貫通され、また、ア
ルミニウムとシリコンとが共晶合金相を示すため、アル
ミニウムシリコン合金層からなる第１の主電極及びこの
第１の主電極の外側のシリコン面にアルミニウムを固溶
したｐ＋型シリコン再成長層である第１の層が同時に形
成される。When the aluminum and the silicon substrate coated with the silicon oxide film are alloy-reacted with each other, as a fact of experiment, the silicon oxide film is penetrated by the fire through, and aluminum and silicon show a eutectic alloy phase. A first main electrode made of an alloy layer and a first layer, which is a p + type silicon regrowth layer in which aluminum is solid-dissolved, are simultaneously formed on the silicon surface outside the first main electrode.
【００１０】ｐ型シリコン基板はｎ型導電層で被覆され
更にｎ型導電層はシリコン酸化膜で被覆されているが、
シリコン酸化膜及びｎ型導電層は貫通され、アルミニウ
ムシリコン合金層からなる第１の主電極及びこの第１の
主電極の外側のｎ型導電層とｐ型シリコン基板面にアル
ミニウムを固溶したｐ＋型シリコン再成長層である第１
の層が同時に生じる。この結果、金属電極を構成するア
ルミニウムシリコン合金層からなる第１の主電極は、ｐ
＋型シリコン再成長層である第１の層と接触し、一方、
ｐ＋層である第１の層はｎ型導電層に対してｐｎ接合で
接続されて、ｐ型シリコン基板に対しオーミック接触さ
れているため、金属電極はｎ型導電層に対してｐｎ接合
を示す構成となり、ｐ型シリコン基板に対しオーミック
接触を示す構成となる。The p-type silicon substrate is covered with an n-type conductive layer, and the n-type conductive layer is covered with a silicon oxide film.
The silicon oxide film and the n-type conductive layer are penetrated through, and a first main electrode made of an aluminum-silicon alloy layer, an n-type conductive layer outside the first main electrode, and p + which is a solid solution of aluminum on the p-type silicon substrate surface are formed. Type silicon regrowth layer first
Layers occur simultaneously. As a result, the first main electrode composed of the aluminum-silicon alloy layer forming the metal electrode is
Contacting the first layer, which is the + type silicon regrowth layer, while
Since the first layer, which is the p + layer, is connected to the n-type conductive layer by a pn junction and is in ohmic contact with the p-type silicon substrate, the metal electrode exhibits a pn junction to the n-type conductive layer. As a result, the p-type silicon substrate exhibits ohmic contact.
【００１１】また、シリコン基板がｎ型の場合、シリコ
ン基板に対して、ｐｎ接合を構成するｐ＋型シリコン再
成長層である第１の層及びこれに接触する金属電極を構
成するアルミニウムシリコン合金層からなる第１の主電
極とが同時に構成され、金属電極層は、ｎ型シリコン基
板に対して直接接触していないので、シリコン基板との
間で、良好なｐｎ接合特性を示す。When the silicon substrate is n-type, with respect to the silicon substrate, a first layer which is a p + type silicon regrowth layer which constitutes a pn junction and an aluminum silicon alloy layer which constitutes a metal electrode in contact with the first layer are formed. Since the metal electrode layer is not in direct contact with the n-type silicon substrate, it exhibits good pn junction characteristics with the silicon substrate.
【００１２】そして、ｎ型シリコン基板を用いているこ
とによりｐｎ接合が他方の主表面より深い位置に形成で
きるから、光生成電荷の収集効率が高まり変換効率を高
める効果が得られる。Since the pn junction can be formed at a position deeper than the other main surface by using the n-type silicon substrate, the efficiency of collecting photogenerated charges is increased and the conversion efficiency is increased.
【００１３】ｎ型導電層の表面濃度が１×１０19／ｃｍ
3以下のため、このｎ型導電層とアルミニウムとの反応
の際アルミニウムとりんとの化合物の生成は見られず、
このため、ｐ＋型シリコン再成長層である第１の層とｎ
型導電層とのｐｎ接合特性はショートしておらず、良好
な特性を示した。また、シリコン酸化膜で被覆されたｎ
型導電層及びこのｎ型導電層で被覆されたｎ型シリコン
基板に対しても良好なｐｎ接合特性を示す。The surface concentration of the n-type conductive layer is 1 × 10 19 / cm.
Since it is 3 or less, formation of a compound of aluminum and phosphorus is not observed in the reaction between the n-type conductive layer and aluminum,
Therefore, the first layer, which is a p + type silicon regrowth layer, and n
The pn junction characteristic with the type conductive layer was not short-circuited and showed good characteristics. In addition, n covered with a silicon oxide film
Good pn junction characteristics are also exhibited for the type conductive layer and the n type silicon substrate covered with this n type conductive layer.
【００１４】[0014]
【実施例】以下、本発明の実施例を図を用いて説明す
る。Embodiments of the present invention will be described below with reference to the drawings.
【００１５】第１実施例 図１は本発明の第１実施例の構成を示す斜視図である。First Embodiment FIG. 1 is a perspective view showing the structure of the first embodiment of the present invention.
【００１６】図２は本発明の第１実施例の構成を示す断
面図である。FIG. 2 is a sectional view showing the structure of the first embodiment of the present invention.
【００１７】先ず、本実施例の構成を説明する。First, the structure of this embodiment will be described.
【００１８】本図において、１は本実施例のシリコン太
陽電池素子であり、ｐ型導電性のシリコン基板の受光面
となる一方の主表面１１、一方の主表面１１と反対側に
位置する他方の主表面１２に形成されたｐ＋型導電性の
第１の層１３、第１の層１３に隣接する第１の層１３と
反対側の導電性のｎ＋型でその表面濃度が１×１０19／
ｃｍ3以下の第２の層１４、第１の層１３に隣接するｐ
型不純物源及びアルミニウムシリコン合金層からなる第
１の主電極１５とを有する半導体である。一方の主表面
１１及び他方の主表面１２は微小凹凸の存在するテクス
チュア面となっており、その上に酸化膜２、３が形成さ
れている。４は酸化膜２上に形成したＴｉＯ2膜であ
る。アルミニウムシリコン合金層からなる第１の電極１
５は、他方の主表面１２上にあってｐ＋層１３と共に、
ｎ＋層１４に対して櫛の歯を噛み合わせた形状となって
おり、第１の層１３を介してｎ＋層１４とｐｎ接合で接
触し、ｐ型シリコン基板とはオーミック接触し、酸化膜
３によりｐ＋層１３と、ｎ＋層１４とは絶縁されてい
る。５１は第２の電極であり、他方の主表面上にあって
ｎ＋層１４に接触し、酸化膜３によりｎ＋層１４とは絶
縁されている。アルミニウムシリコン合金層からなる第
１の電極１５は、第１の層１３のｐ型不純物源となって
いるため、第１の層１３と接触させるための位置合わせ
をすることなく第１の層１３と同時に形成できるので、
製造コストを低減させることができる。第２の層１２の
１×１０19／ｃｍ3以下の表面濃度は第２の層１２中で
発生した電子正孔対の再結合を少なくし、起電圧と光生
成電流を向上させる働きがある。In the figure, 1 is a silicon solar cell element of this embodiment, one main surface 11 serving as a light-receiving surface of a p-type conductive silicon substrate, and the other main surface 11 opposite to the main surface 11. P + -type conductive first layer 13 formed on the main surface 12 of n, and conductive n + -type on the side opposite to the first layer 13 adjacent to the first layer 13 and having a surface concentration of 1 × 10 19 /
p adjacent to the second layer 14 and the first layer 13 of cm 3 or less
And a first main electrode 15 made of an aluminum-silicon alloy layer. The one main surface 11 and the other main surface 12 are textured surfaces having fine irregularities, and the oxide films 2 and 3 are formed thereon. Reference numeral 4 is a TiO 2 film formed on the oxide film 2. First electrode 1 made of aluminum-silicon alloy layer
5 is on the other main surface 12 together with the p + layer 13,
It has a shape in which comb teeth are intermeshed with the n + layer 14, makes contact with the n + layer 14 at the pn junction through the first layer 13, makes ohmic contact with the p-type silicon substrate, and forms the oxide film 3 Thus, the p + layer 13 and the n + layer 14 are insulated. Reference numeral 51 denotes a second electrode, which is on the other main surface and is in contact with the n + layer 14, and is insulated from the n + layer 14 by the oxide film 3. Since the first electrode 15 made of the aluminum-silicon alloy layer serves as the p-type impurity source of the first layer 13, the first layer 13 does not need to be aligned for contact with the first layer 13. Since it can be formed at the same time,
The manufacturing cost can be reduced. The surface concentration of 1 × 10 19 / cm 3 or less of the second layer 12 has a function of reducing recombination of electron-hole pairs generated in the second layer 12 and improving electromotive voltage and photogenerated current. ..
【００１９】一般にシリコン太陽電池では、太陽光によ
って生成した電子及び正孔の電荷はｐｎ接合によって分
離され、ｐ型領域に正孔が溜り、ｎ型領域に電子が溜
り、この電荷二重層により起電圧を発生する。Generally, in a silicon solar cell, charges of electrons and holes generated by sunlight are separated by a pn junction, holes are accumulated in a p-type region and electrons are accumulated in an n-type region. Generate voltage.
【００２０】ｐ型シリコン基板に上記の構成をした場
合、ｐ型シリコン基板及びｐ＋層には正孔が溜り、ｎ型
導電層には電子が溜り、この電荷二重層により起電圧が
発生する。ｐ＋層とｎ型導電層とが良好なｐｎ接合特性
を示す場合、ｐ型シリコン基板及びｐ＋層の正孔はｎ型
導電層にリークすることなく、アルミニウムシリコン合
金電極を通って引き出される。ｎ型導電層の電子は、ｐ
型シリコン基板及びｐ＋層にリークすることなく、ｎ型
導電層上に設けた電極を通って引き出される。When the p-type silicon substrate has the above structure, holes are accumulated in the p-type silicon substrate and the p + layer, electrons are accumulated in the n-type conductive layer, and an electromotive voltage is generated by the charge double layer. When the p + layer and the n-type conductive layer show good pn junction characteristics, the holes of the p-type silicon substrate and the p + layer are extracted through the aluminum-silicon alloy electrode without leaking to the n-type conductive layer. The electrons in the n-type conductive layer are p
It is extracted through the electrode provided on the n-type conductive layer without leaking to the p-type silicon substrate and the p + layer.
【００２１】また、ｎ型シリコン基板に上記の構成をし
た場合、ｐ＋層には正孔が溜り、ｎ型シリコン基板及び
ｎ型導電層には電子が溜り、この電荷二重層により起電
圧が発生する。ｐ＋層とｎ型シリコン基板及びｎ型導電
層とが良好なｐｎ接合特性を示す場合、ｐ＋層の正孔は
ｎ型導電層にリークすることなく、アルミニウムシリコ
ン合金電極を通って引き出される。ｎ型シリコン基板及
びｎ型導電層の電子は、ｐ＋層にリークすることなく、
ｎ型導電層上に設けた電極を通って引き出される。 次
に、本実施例の太陽電池素子の製法を説明する。Further, in the case of the above structure on the n-type silicon substrate, holes are accumulated in the p + layer, electrons are accumulated in the n-type silicon substrate and the n-type conductive layer, and an electromotive voltage is generated by the charge double layer. To do. When the p + layer and the n-type silicon substrate and the n-type conductive layer exhibit good pn junction characteristics, holes in the p + layer are extracted through the aluminum-silicon alloy electrode without leaking to the n-type conductive layer. The electrons of the n-type silicon substrate and the n-type conductive layer do not leak to the p + layer,
It is extracted through the electrode provided on the n-type conductive layer. Next, a method for manufacturing the solar cell element of this embodiment will be described.
【００２２】１）ｐ型で比抵抗１Ωｃｍ、厚さ２００μ
ｍ、結晶方位（１、０、０）のシリコン基板をＫＯＨを
数％含むアルカリエッチング液で、約２０μｍエッチン
グして基板両面のインゴットからウエファーに加工した
際に生じた加工歪層を除去するとともに、その表面を微
小凹凸のテクスチュア面にする。1) p-type, specific resistance 1 Ωcm, thickness 200 μ
A silicon substrate of m, crystal orientation (1, 0, 0) was etched by about 20 μm with an alkaline etching solution containing a few% of KOH to remove a strained layer generated when a wafer was processed from an ingot on both sides of the substrate. , Make the surface a textured surface with fine irregularities.
【００２３】２）りん拡散によりシリコン基板両面にり
ん濃度分布が１×１０19／ｃｍ3以下のｎ型層を形成す
る。オキシ塩化りん（ＰＯＣｌ3）拡散を８５０℃で３
０分間行い、シリコン基板の両面に、深さ約０．５μｍ
のｎ＋層を形成する。この時、ｎ＋層のりん濃度分布
は、実験的事実により、その表面濃度が１×１０20／ｃ
ｍ3以上で、その濃度が１×１０19／ｃｍ3以下となるま
での深さが、約０．１μｍのりんパイルアップ層と呼ば
れる高濃度層とする。2) An n-type layer having a phosphorus concentration distribution of 1 × 10 19 / cm 3 or less is formed on both surfaces of the silicon substrate by phosphorus diffusion. Diffusion of phosphorus oxychloride (POCl 3 ) at 850 ° C
Perform for 0 minutes, depth of about 0.5 μm on both sides of the silicon substrate
Of n + layers are formed. At this time, the phosphorus concentration distribution in the n + layer has a surface concentration of 1 × 10 20 / c due to experimental facts.
A high-concentration layer called a phosphorus pile-up layer having a depth of about 0.1 μm at a density of m 3 or more and a concentration of 1 × 10 19 / cm 3 or less.
【００２４】３）この高濃度のりんパイルアップ層を除
去するため、弗酸でりんガラスを除去した後、水蒸気雰
囲気中で１０００℃、３０分間、高濃度のりんパイルア
ップ層を酸化して、酸化膜３を形成する。3) In order to remove this high-concentration phosphorus pile-up layer, after removing the phosphorus glass with hydrofluoric acid, the high-concentration phosphorus pile-up layer is oxidized in a steam atmosphere at 1000 ° C. for 30 minutes, The oxide film 3 is formed.
【００２５】４）この基板の他方の面にスクリーン印刷
により、耐酸性マスク材を印刷する。4) An acid resistant mask material is printed on the other surface of this substrate by screen printing.
【００２６】５）弗酸で一方の面の酸化膜を除去した、
更に溶剤でレジストを除去する。5) The oxide film on one surface was removed with hydrofluoric acid,
Further, the resist is removed with a solvent.
【００２７】６）ＫＯＨを数％含むアルカリエッチング
液で、一方の面を約２μｍエッチングし、一方の面に形
成されたｎ＋層を除去する。6) One surface is etched by about 2 μm with an alkaline etching solution containing KOH of several%, and the n + layer formed on the one surface is removed.
【００２８】７）乾燥酸素ガス雰囲気中で１０００℃、
１０分間、酸化して、一方の主面上に２００Åの酸化膜
４を形成する。7) 1000 ° C. in a dry oxygen gas atmosphere,
Oxidation is performed for 10 minutes to form an oxide film 4 of 200 Å on one main surface.
【００２９】８）粒径が約５μｍのアルミニウムを約７
５％含むペーストを酸化膜３上に、厚さ約１０μｍ、ス
クリーン印刷して８００℃、１分間、合成空気雰囲気中
で焼成する。この焼成により、ペースト中のアルミニウ
ム粒は酸化膜３と反応してこれを貫通し、次にｎ＋層１
４と反応し、これを貫通し、更にｐが他シリコン基板と
反応し、アルミニウムシリコン合金層１５及びｐ＋層１
３とが形成される。8) Approximately 7% aluminum with a particle size of approximately 5 μm
A paste containing 5% is screen-printed on the oxide film 3 to a thickness of about 10 μm and baked at 800 ° C. for 1 minute in a synthetic air atmosphere. By this firing, the aluminum particles in the paste react with the oxide film 3 and penetrate it, and then the n + layer 1
4 and penetrates through it, and p further reacts with another silicon substrate to form the aluminum silicon alloy layer 15 and the p + layer 1
3 are formed.
【００３０】９）第２の電極５１を形成するため、銀粒
を７５％含むペーストを第１の電極１５との間に印刷し
て、７５０℃、１分間合成空気雰囲気中で焼成する。9) To form the second electrode 51, a paste containing 75% of silver particles is printed between the first electrode 15 and baked at 750 ° C. for 1 minute in a synthetic air atmosphere.
【００３１】この焼成により、ペースト中のガラスは酸
化膜３と反応してこれを貫通し、ペースト中の銀粒はｎ
＋層１４とオーミック接触した第２の電極５１が形成さ
れる。By this firing, the glass in the paste reacts with the oxide film 3 and penetrates through it, and the silver particles in the paste are n.
A second electrode 51 is formed in ohmic contact with the + layer 14.
【００３２】１０）ＴｉＯ2反射防止膜４を酸化膜の表
面に常圧ＣＶＤ法で５５０Å形成する。10) A TiO 2 antireflection film 4 is formed on the surface of the oxide film by atmospheric pressure CVD method by 550Å.
【００３３】このようにして製造した太陽電池素子を受
光面レーザーダイオードマイクロ波法でｐ型シリコン基
板の少数キャリア寿命を測定したところ、その低下は見
られなかった。これはｐ＋層の不純物源がアルミニウム
であるためと考えられる。When the solar cell element thus manufactured was measured for the minority carrier lifetime of the p-type silicon substrate by the light-receiving surface laser diode microwave method, no decrease was observed. It is considered that this is because the impurity source of the p + layer is aluminum.
【００３４】また、アルミニウムの小さな粒で作ったア
ルミニウムペーストまたは、銀ペースト中に小さなアル
ミニウム粒を混ぜたペーストとの上記合金反応において
も、金属電極とｎ型導電層との間で良好なｐｎ接合特性
及びｐ型シリコン基板との間で、良好なオーミック特性
を示すことが確認された。Also in the above alloy reaction with an aluminum paste made of small aluminum particles or a paste obtained by mixing small aluminum particles in a silver paste, a good pn junction is obtained between the metal electrode and the n-type conductive layer. It was confirmed that good ohmic characteristics were exhibited between the characteristics and the p-type silicon substrate.
【００３５】第２実施例 図３は本発明の第２実施例の構成を示す斜視図である。Second Embodiment FIG. 3 is a perspective view showing the structure of the second embodiment of the present invention.
【００３６】図４は本発明の第２実施例の構成を示す断
面図である。FIG. 4 is a sectional view showing the structure of the second embodiment of the present invention.
【００３７】先ず、本実施例の構成を説明する。First, the structure of this embodiment will be described.
【００３８】本実施例は、第１実施例のｐ型シリコン基
板とは導電特性が反対のｎ型シリコン基板を用いてい
る。第１の層１３は第２の層であるｎ＋層１４に対して
ばかりでなく、ｎ型シリコン基板に対してもｐｎ接合で
接続しているため、ｐｎ接合が他方の主表面より深い位
置に形成できる。このため、ｎ型シリコン基板の光生成
電荷の収集効率が高まる効果が有る。This embodiment uses an n-type silicon substrate whose conductivity characteristics are opposite to those of the p-type silicon substrate of the first embodiment. Since the first layer 13 is connected not only to the n + layer 14 that is the second layer but also to the n-type silicon substrate by the pn junction, the pn junction is located deeper than the other main surface. Can be formed. Therefore, there is an effect that the collection efficiency of the photo-generated charges of the n-type silicon substrate is increased.
【００３９】次に、本実施例の太陽電池素子の製法を説
明する。Next, a method of manufacturing the solar cell element of this embodiment will be described.
【００４０】本実施例の太陽電池素子の製法は第１実施
例のｐ型シリコン基板をｎ型シリコン基板に替えるだけ
で、同じ工程により製造される。The method of manufacturing the solar cell element of this embodiment is the same as that of the first embodiment except that the p-type silicon substrate is replaced by an n-type silicon substrate.
【００４１】第３実施例 図５は本発明の第３実施例の構成を示す斜視図である。Third Embodiment FIG. 5 is a perspective view showing the structure of the third embodiment of the present invention.
【００４２】図６は本発明の第３実施例の構成を示す断
面図である。FIG. 6 is a sectional view showing the structure of the third embodiment of the present invention.
【００４３】先ず、本実施例の構成を説明する。First, the structure of this embodiment will be described.
【００４４】第１実施例で受光面となる一方の主面１１
上に第３の層であるｎ＋層１６及びこれと接触する第３
の主電極５２とを設けた例である。本実施例では、ｎ＋
層１６及びこれと接触する第３の主電極５２があるた
め、少数キャリア寿命の短いｐ型シリコン基板に対して
一方の主表面１１の近くの電子正孔電荷の収集効率が高
まり、起電圧及び光生成電流が向上する効果が有る。One main surface 11 which becomes the light receiving surface in the first embodiment.
The third layer, the n + layer 16 and the third layer in contact therewith
This is an example in which the main electrode 52 of FIG. In this embodiment, n +
Since the layer 16 and the third main electrode 52 in contact with the layer 16 are provided, the efficiency of collecting electron-hole charges near one main surface 11 is increased with respect to the p-type silicon substrate having a short minority carrier lifetime, and the electromotive force and the This has the effect of improving the photogenerated current.
【００４５】次に、本実施例の太陽電池素子の製法を説
明する。Next, a method of manufacturing the solar cell element of this embodiment will be described.
【００４６】第１実施例の製造方法において、第３の主
電極５２を、一方の主表面に形成されたｎ＋層１４をＫ
ＯＨによるエッチングで除去せず、更に再度の酸化もし
ないようにして、第２の主電極５１を形成した後または
前に、第２の主電極５１の形成に用いた銀ペーストを光
が入射する主表面１１に形成した酸化膜２の上に印刷
し、同様の熱処理条件で、酸化膜２を貫通して、ｎ＋層
１６にオーミック接触させて形成する。In the manufacturing method of the first embodiment, the third main electrode 52 and the n + layer 14 formed on one main surface are K
Light is incident on the silver paste used for forming the second main electrode 51 before or after the second main electrode 51 is formed so as not to be removed by etching with OH and not to be oxidized again. Printing is performed on the oxide film 2 formed on the main surface 11, and under the same heat treatment conditions, the oxide film 2 is penetrated to form ohmic contact with the n + layer 16.
【００４７】以上述べたように本実施例によれば、スク
リーン印刷技術でｎ＋層とｐ＋層との間をｐｎ接合特性
を持たせて分離できること、ｐ＋層の形成と電極の形成
とを同時にできること、電極形成のために必要な高価な
銀ペーストの使用量を低減できること、少数キャリア寿
命の短いｐ型シリコン基板に対しても変換効率を高くす
ることができること、により変換性能と経済性の向上が
可能となる。As described above, according to this embodiment, the n + layer and the p + layer can be separated by the screen printing technique with the pn junction characteristic, and the p + layer and the electrode can be formed at the same time. In addition, the amount of expensive silver paste required for electrode formation can be reduced, and the conversion efficiency can be increased even for a p-type silicon substrate having a short minority carrier life, thereby improving conversion performance and economy. It will be possible.
【００４８】[0048]
【発明の効果】本発明によれば、アルミニウムとシリコ
ン酸化膜で被覆されたシリコン基板とを合金反応させる
ことによりアルミニウムシリコン合金層からなる第１の
主電極とこの第１の主電極の外側のシリコン面にアルミ
ニウムを固溶したｐ＋型シリコン再成長層である第１の
層が同時に形成され、シリコン酸化膜上にアルミニウム
を含むペーストを印刷することにより、ｐ＋型シリコン
再成長層とｎ層とをｐｎ接合特性を持たせながら分離で
きるから製造工程が節減される効果が得られる。According to the present invention, a first main electrode formed of an aluminum-silicon alloy layer and an outer portion of the first main electrode are formed by an alloy reaction between aluminum and a silicon substrate coated with a silicon oxide film. A first layer, which is a p + type silicon regrowth layer in which aluminum is solid-dissolved on the silicon surface, is formed at the same time, and a paste containing aluminum is printed on the silicon oxide film to form ap + type silicon regrowth layer and an n layer. Can be separated while having the pn junction characteristic, so that the manufacturing process can be reduced.
【００４９】ｎ型シリコン基板を用いていることにより
ｐｎ接合が他方の主表面より深い位置に形成できるか
ら、光生成電荷の収集効率が高まり変換効率を高める効
果が得られる。Since the pn junction can be formed at a position deeper than the other main surface by using the n-type silicon substrate, the efficiency of collecting photogenerated charges is increased and the effect of increasing conversion efficiency is obtained.
【図面の簡単な説明】[Brief description of drawings]
【図１】本発明の第１実施例の構成を示す斜視図であ
る。FIG. 1 is a perspective view showing a configuration of a first embodiment of the present invention.
【図２】本発明の第１実施例の構成を示す断面図であ
る。FIG. 2 is a sectional view showing the configuration of the first embodiment of the present invention.
【図３】本発明の第２実施例の構成を示す斜視図であ
る。FIG. 3 is a perspective view showing a configuration of a second exemplary embodiment of the present invention.
【図４】本発明の第２実施例の構成を示す断面図であ
る。FIG. 4 is a sectional view showing a configuration of a second exemplary embodiment of the present invention.
【図５】本発明の第３実施例の構成を示す斜視図であ
る。FIG. 5 is a perspective view showing a configuration of a third exemplary embodiment of the present invention.
【図６】本発明の第３実施例の構成を示す断面図であ
る。FIG. 6 is a cross-sectional view showing the configuration of a third embodiment of the present invention.
【符号の説明】 １ シリコン太陽電池素子 ２ 酸化膜 ３ 酸化膜 ４ ＴｉＯ2膜 １１ 受光面となる一方の主表面 １２ 他方の主表面 １３ ｐ＋型導電性の第１の層 １４ ｎ＋層 １５ 第１の主電極 １６ ｎ＋層 ５１ 第２の電極 ５２ 第３の電極[Explanation of Codes] 1 Silicon solar cell element 2 Oxide film 3 Oxide film 4 TiO 2 film 11 One main surface to be a light-receiving surface 12 The other main surface 13 p + type conductive first layer 14 n + layer 15 First Main electrode 16 n + layer 51 second electrode 52 third electrode
───────────────────────────────────────────────────── フロントページの続き (72)発明者 内田 泰明 茨城県日立市幸町３丁目１番１号 株式会 社日立製作所日立工場内 (72)発明者 木田 康博 茨城県日立市幸町３丁目１番１号 株式会 社日立製作所日立工場内 (72)発明者 初見 君男 茨城県日立市幸町３丁目１番１号 株式会 社日立製作所日立工場内 (72)発明者 朝日 忠夫 茨城県日立市幸町３丁目１番１号 株式会 社日立製作所日立工場内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasuaki Uchida 3-1-1 Sachimachi, Hitachi City, Ibaraki Hitachi Ltd. Hitachi factory (72) Inventor Yasuhiro Kida 3-chome, Hitachi City, Ibaraki Prefecture No. 1 Hitachi Ltd., Hitachi Works (72) Inventor Kimio Hatsumi 3-1-1, Saiwaicho, Hitachi, Ibaraki Hitachi Ltd. (72) Inventor, Hitachi Tadao Asahi Hitachi, Ibaraki Prefecture 3-1, 1-1 Sachimachi Stock company Hitachi Ltd. Hitachi factory
Claims (4)
対側の表面に形成したｐ＋型導電性の第１の層と、該第
１の層に端面が接触し表面濃度が１×１０19／ｃｍ3以
下のｎ型導電性の第２の層と、前記第１の層に隣接する
ｐ型不純物源であり、前記第１の層を介して第２の層と
ｐｎ接合で接触し、前記ｐ型シリコン基板とはオーミッ
ク接触し、酸化膜により前記第２の層とは絶縁されてい
るアルミニウムシリコン合金層からなる第１の主電極
と、前記第２の層に底面が接触し酸化膜により前記第１
の層とは絶縁されている第２の電極とを具備することを
特徴とする太陽電池素子。1. A p + type conductive first layer formed on a surface of a p type conductive silicon substrate opposite to a light receiving surface, and an end face of the first layer is in contact with the first layer to have a surface concentration of 1 × 10. A second p-type impurity source adjacent to the first layer and an n-type conductive second layer of 19 / cm 3 or less, and contacting the second layer through the first layer at a pn junction. , A first main electrode made of an aluminum-silicon alloy layer that is in ohmic contact with the p-type silicon substrate and is insulated from the second layer by an oxide film, and a bottom surface of the second layer is in contact with the second main layer for oxidation. The first by the membrane
And a second electrode that is insulated from the layer.
とを特徴とする請求項１に記載の太陽電池素子。2. The solar cell element according to claim 1, wherein the silicon substrate has n-type conductivity.
１×１０19／ｃｍ3以下のｎ型導電性の第３の層と、該
第３の層に底面が接触する第３の主電極と、前記第３の
層の該第３の主電極以外の表面を被覆する酸化膜とを設
けたことを特徴とする請求項１または請求項２に記載の
太陽電池素子。 3. An n-type conductive third layer having a surface concentration of 1 × 10 19 / cm 3 or less on the light-receiving surface of the silicon substrate, and a third main electrode having a bottom surface in contact with the third layer. The solar cell element according to claim 1 or 2, further comprising: an oxide film that covers a surface of the third layer other than the third main electrode.
散を行いその表面濃度が１×１０19／ｃｍ3以下の高濃
度層を形成する工程と、該高濃度層を酸化してシリコン
酸化膜を形成する工程と、該シリコン酸化膜上にアルミ
ニウムを含むペーストを印刷して焼成する工程とを有す
ることを特徴とする太陽電池素子の製造方法。4. A step of forming a high concentration layer having a surface concentration of 1 × 10 19 / cm 3 or less by diffusing phosphorus on a surface-treated silicon substrate, and oxidizing the high concentration layer to form a silicon oxide film. And a step of printing a paste containing aluminum on the silicon oxide film and baking the paste, the method of manufacturing a solar cell element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4052674A JPH0793453B2 (en) | 1992-03-11 | 1992-03-11 | Method for manufacturing silicon solar cell element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4052674A JPH0793453B2 (en) | 1992-03-11 | 1992-03-11 | Method for manufacturing silicon solar cell element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05259488A true JPH05259488A (en) | 1993-10-08 |
| JPH0793453B2 JPH0793453B2 (en) | 1995-10-09 |
Family
ID=12921428
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4052674A Expired - Fee Related JPH0793453B2 (en) | 1992-03-11 | 1992-03-11 | Method for manufacturing silicon solar cell element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0793453B2 (en) |
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|---|---|
| JPH0793453B2 (en) | 1995-10-09 |
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