JPH05211273A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPH05211273A
JPH05211273A JP3326070A JP32607091A JPH05211273A JP H05211273 A JPH05211273 A JP H05211273A JP 3326070 A JP3326070 A JP 3326070A JP 32607091 A JP32607091 A JP 32607091A JP H05211273 A JPH05211273 A JP H05211273A
Authority
JP
Japan
Prior art keywords
semiconductor element
resin
insulating film
mounting plate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP3326070A
Other languages
Japanese (ja)
Inventor
Yasuhiro Suzuki
康弘 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3326070A priority Critical patent/JPH05211273A/en
Publication of JPH05211273A publication Critical patent/JPH05211273A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a resin-sealed semiconductor device in which the number of pins is increased and a semiconductor element is reduced in size. CONSTITUTION:An insulation film 5 is adhered to a semiconductor element placing plate 3. A through hole which can directly place a semiconductor element 6 on the plate 3 is provided at a center of the film 5, and an outer edge of the film 5 is adhered to inner leads 2. Metal wirings 10 each having electrodes at both ends are provided on a region except adhered parts to the leads 2 on the film 5. Electrodes 8 of the element 6 are connected to the wirings 10 and the wirings 10 are connected to the leads 2 via wires 7.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は樹脂封止型半導体装置に
関し、特に多くの外部リードを有し放熱性の向上した樹
脂封止型半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a resin-encapsulated semiconductor device having many external leads and improved heat dissipation.

【０００２】[0002]

【従来の技術】従来、放熱性の改善を図った樹脂封止型
半導体装置は、図３に示すように、外部リード１１と一
体的に形成された内部リード２と半導体素子搭載板３Ａ
が、両面に接着剤４を有するポリイミド等の絶縁フィル
ム５によって接着され、さらにこの半導体素子搭載板３
Ａ上に半導体素子６をＡｇペースト等で固着し、金線等
のワイヤー７により、半導体素子６の電極８と内部リー
ド２Ａとを電気的に接続し、トランスファーモールド法
等によって、エポキシ等の樹脂９等で樹脂封止した構造
となっていた。2. Description of the Related Art Conventionally, as shown in FIG. 3, a resin-sealed semiconductor device having improved heat dissipation has an internal lead 2 integrally formed with an external lead 11 and a semiconductor element mounting plate 3A.
Are adhered by an insulating film 5 made of polyimide or the like having an adhesive 4 on both sides, and the semiconductor element mounting plate 3
The semiconductor element 6 is fixed on A by an Ag paste or the like, the electrode 8 of the semiconductor element 6 and the internal lead 2A are electrically connected by a wire 7 such as a gold wire, and a resin such as epoxy is formed by a transfer molding method or the like. The structure was resin-sealed with 9 or the like.

【０００３】この樹脂封止型半導体装置では、半導体素
子搭載板３Ａと内部リード２Ａが上記のような構造で接
着されているため、半導体素子搭載板３Ａの面積を、ワ
イヤー長を長くせずに、通常のリードフレームの半導体
素子搭載部（アイランド）の面積よりも大きくすること
が可能となっている。この半導体素子搭載板３Ａの面積
の増加により、半導体素子６の熱を効果的に逃がすこと
ができるため、半導体装置の放熱性の改善を可能にして
いる。In this resin-encapsulated semiconductor device, the semiconductor element mounting plate 3A and the internal leads 2A are bonded to each other in the above-described structure, so that the area of the semiconductor element mounting plate 3A can be increased without increasing the wire length. The area of the semiconductor element mounting portion (island) of a normal lead frame can be made larger. By increasing the area of the semiconductor element mounting plate 3A, the heat of the semiconductor element 6 can be effectively dissipated, so that the heat dissipation of the semiconductor device can be improved.

【０００４】[0004]

【発明が解決しようとする課題】この従来の樹脂封止型
半導体装置では、リードフレームの内部リードと半導体
素子搭載板が、両面に接着剤層を有するポリイミド等の
絶縁フィルムによって接着されている上に、半導体素子
搭載板の面積が大きいため、これがヒートスプレッダー
の効果をもち、半導体素子からの熱を効果的に逃がすこ
とが可能であった。In this conventional resin-encapsulated semiconductor device, the inner leads of the lead frame and the semiconductor element mounting plate are bonded by an insulating film such as polyimide having an adhesive layer on both sides. In addition, since the semiconductor element mounting plate has a large area, it has the effect of a heat spreader, and it is possible to effectively dissipate heat from the semiconductor element.

【０００５】しかし、内部リードと半導体素子の電極を
金線等のワイヤーにより接続しているため、半導体装置
の多ピン化及び半導体素子の小型化が進むにつれ、金線
等のワイヤーの長尺化あるいは、内部リードの微細化を
行って、内部リード先端を半導体素子に近づける必要が
生じてきた。しかしワイヤーの長さが４ｍｍを越えるよ
うになると、樹脂封止の際、ワイヤーの変形による短絡
を起こすという問題点が生じてきた。However, since the internal lead and the electrode of the semiconductor element are connected by a wire such as a gold wire, as the number of pins of the semiconductor device increases and the miniaturization of the semiconductor element progresses, the length of the wire such as the gold wire becomes longer. Alternatively, it has become necessary to miniaturize the internal leads and bring the tips of the internal leads closer to the semiconductor element. However, if the length of the wire exceeds 4 mm, there is a problem that a short circuit occurs due to the deformation of the wire during resin sealing.

【０００６】また、通常リードフレームは、プレス加工
又はエッチング加工で製作されるが、その際内部リード
の間隔は、少なくともリードフレームの板厚の７０％程
度は必要となるため、内部リードの微細化には限界があ
り、内部リード先端を半導体素子に近づけることが困難
であった。また、半導体素子搭載板が大きくなったこと
により、封止樹脂との密着性が低下するという問題点も
あった。[0006] Usually, the lead frame is manufactured by press working or etching working. At that time, since the interval between the inner leads needs to be at least about 70% of the plate thickness of the lead frame, the inner leads are miniaturized. However, it is difficult to bring the tip of the internal lead close to the semiconductor element. In addition, there is a problem in that the size of the semiconductor element mounting plate is increased, and thus the adhesion with the sealing resin is reduced.

【０００７】[0007]

【課題を解決するための手段】本発明の樹脂封止型半導
体装置は、半導体素子を搭載した導電性の搭載板と、前
記半導体素子周辺部の前記搭載板上に固着された絶縁フ
ィルムと、この絶縁フィルム上に設けられ一端がワイヤ
ーにより前記半導体素子に接続された複数の配線と、前
記絶縁フィルム上の周辺部に固着されワイヤーにより前
記配線の他端に接続された内部リードとを含むものであ
る。A resin-encapsulated semiconductor device according to the present invention comprises a conductive mounting plate on which a semiconductor element is mounted, an insulating film fixed on the mounting plate at the periphery of the semiconductor element, A plurality of wirings provided on the insulating film and having one end connected to the semiconductor element by a wire; and an internal lead fixed to a peripheral portion of the insulating film and connected to the other end of the wiring by a wire. ..

【０００８】[0008]

【実施例】次に本発明について図面を参照して説明す
る。図１（ａ），（ｂ）は本発明の第１の実施例の樹脂
封止型半導体装置の平面図及び断面図である。The present invention will be described below with reference to the drawings. 1A and 1B are a plan view and a sectional view of a resin-sealed semiconductor device according to a first embodiment of the present invention.

【０００９】図１（ａ），（ｂ）を参照すると樹脂封止
型半導体装置１は次のように構成されている。４２合金
または銅等からなる半導体素子搭載板３上にポリイミド
等の絶縁フィルム５が接着剤４を介して貼り付けられ、
この絶縁フィルム５は、半導体素子６を半導体素子搭載
板３に直接搭載できるように、中央部に貫通穴を有して
いる。さらに、絶縁フィルム５の外縁部と内部リード２
が接着剤４を介して接着されている。また、絶縁フィル
ム５上で、内部リード２との接着部を除く領域には、両
端に電極を有する配線１０がスパッタリングや金メッキ
を施された銅箔等で形成されている。半導体素子６は半
導体素子搭載板３上にＡｇペースト等で固着され、この
半導体素子６の電極８と配線１０の一方の電極と、配線
１０の他方の電極と外部リード１３につながる内部リー
ド２とが、それぞれ金線等のワイヤー７により結線さ
れ、半導体素子６と外部リード１１の電気的接続が得ら
れる構造になっている。Referring to FIGS. 1A and 1B, a resin-sealed semiconductor device 1 is constructed as follows. 42, an insulating film 5 made of polyimide or the like is adhered on a semiconductor element mounting plate 3 made of alloy or copper, etc. via an adhesive 4,
The insulating film 5 has a through hole at the center so that the semiconductor element 6 can be directly mounted on the semiconductor element mounting plate 3. Furthermore, the outer edge of the insulating film 5 and the inner lead 2
Are bonded via the adhesive 4. Further, on the insulating film 5, a wiring 10 having electrodes at both ends is formed of a copper foil or the like which is sputtered or gold-plated, in a region other than a portion bonded to the internal lead 2. The semiconductor element 6 is fixed on the semiconductor element mounting plate 3 with Ag paste or the like, and the electrode 8 of the semiconductor element 6 and one electrode of the wiring 10, the other electrode of the wiring 10 and the internal lead 2 connected to the external lead 13. However, each is connected by a wire 7 such as a gold wire, so that the semiconductor element 6 and the external lead 11 can be electrically connected.

【００１０】本第１の実施例では、従来例のように半導
体素子６の電極と、内部リードを直接結線するのではな
く、その間に絶縁フィルム５上にメッキ等で形成された
配線１０を介しているため、リードフレームのエッチン
グ加工に比べて、微細なパターンの配線を得ることがで
き、半導体素子の多ピン化及び小型化が進んでも、配線
１０を半導体素子６に近づけることが可能になる。この
ため、ワイヤーを長尺化する必要がなく、安定した樹脂
封止を行うことができる。In the first embodiment, the electrode of the semiconductor element 6 and the internal lead are not directly connected as in the conventional example, but the wiring 10 formed by plating or the like on the insulating film 5 is interposed therebetween. Therefore, as compared with the etching process of the lead frame, it is possible to obtain a wiring having a finer pattern, and it is possible to bring the wiring 10 closer to the semiconductor element 6 even if the number of pins of the semiconductor element is increased and the size thereof is reduced. .. Therefore, it is not necessary to lengthen the wire, and stable resin sealing can be performed.

【００１１】図２（ａ），（ｂ）は本発明の第２の実施
例の樹脂封止型半導体装置の平面図及び断面図である。
この第２の実施例では第１の実施例の構成において、絶
縁フィルム５上の配線１０の電極と、内部リード２の間
の部分に、絶縁フィルム５と半導体素子搭載板３とを貫
通する穴１２を設けている。このため樹脂封止の際、樹
脂９がこの貫通穴１４に入り込むため、半導体素子搭載
板３と樹脂９の密着性を向上させることができる。尚、
貫通穴１２の数は図示した４個に限定されるものではな
く、少くても多くてもよい。FIGS. 2A and 2B are a plan view and a sectional view of a resin-sealed semiconductor device according to a second embodiment of the present invention.
In the second embodiment, in the structure of the first embodiment, a hole penetrating the insulating film 5 and the semiconductor element mounting plate 3 is formed in a portion between the electrode of the wiring 10 on the insulating film 5 and the internal lead 2. 12 are provided. Therefore, at the time of resin sealing, the resin 9 enters the through hole 14, so that the adhesiveness between the semiconductor element mounting plate 3 and the resin 9 can be improved. still,
The number of the through holes 12 is not limited to the four shown in the figure, and may be as small as possible or as large as possible.

【００１２】[0012]

【発明の効果】以上説明したように本発明は、半導体素
子の電極と内部リードを直接金線等で結線するのではな
く、その間に絶縁フィルム上に形成された配線を介する
ため、リードフレームのエッチング加工に比べて、より
微細な配線を絶縁フィルム上に形成することができ、半
導体素子の多ピン化及び小型化が進んでも、配線の先端
を半導体素子に近づけることが可能になる。このため、
従来の構造では、ワイヤー長が４ｍｍを越えるような場
合でも、本発明ではこれを２ｍｍ程度以下に短かくする
ことができ、樹脂封止の際、ワイヤー流れ等の問題を回
避できるという効果を有する。As described above, according to the present invention, the electrodes of the semiconductor element and the internal leads are not directly connected by a gold wire or the like, but the wiring formed on the insulating film is interposed therebetween, so that the lead frame As compared with etching, finer wiring can be formed on the insulating film, and the tip of the wiring can be brought closer to the semiconductor element even if the number of pins of the semiconductor element increases and the size of the semiconductor element advances. For this reason,
In the conventional structure, even if the wire length exceeds 4 mm, the present invention can shorten this to about 2 mm or less, and has an effect that problems such as wire flow can be avoided during resin sealing. ..

【００１３】また、従来例では半導体素子搭載板の面積
が大きくなることにより、封止樹脂との密着性が低下
し、樹脂クラック等の問題を起こしていたが、本発明で
は、絶縁フィルムと半導体素子搭載板とを貫通する穴を
設けて封止樹脂を入り込ませ、密着性を向上させている
ため、樹脂クラック等の発生を少なくできるという効果
もある。Further, in the conventional example, since the area of the semiconductor element mounting plate is increased, the adhesion with the sealing resin is deteriorated, causing problems such as resin cracks. However, in the present invention, the insulating film and the semiconductor are used. Since a hole penetrating the element mounting plate is provided to allow the sealing resin to enter and improve the adhesion, there is also an effect that the occurrence of resin cracks can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の第１の実施例の平面図及び断面図。FIG. 1 is a plan view and a sectional view of a first embodiment of the present invention.

【図２】本発明の第２の実施例の平面図及び断面図。FIG. 2 is a plan view and a sectional view of a second embodiment of the present invention.

【図３】従来例の断面図。FIG. 3 is a sectional view of a conventional example.

【符号の説明】[Explanation of symbols]

１，１Ａ 樹脂封止型半導体装置 ２，２Ａ 内部リード ３，３Ａ 半導体素子搭載板 ４ 接着剤 ５ 絶縁フィルム ６ 半導体素子 ７ ワイヤー ８ 電極 ９ 樹脂 １０ 配線 １１ 外部リード １２ 貫通穴 1,1A Resin-encapsulated semiconductor device 2,2A Internal lead 3,3A Semiconductor element mounting plate 4 Adhesive 5 Insulating film 6 Semiconductor element 7 Wire 8 Electrode 9 Resin 10 Wiring 11 External lead 12 Through hole

Claims (2)

【特許請求の範囲】[Claims] 【請求項１】 半導体素子を搭載した導電性の搭載板
と、前記半導体素子周辺部の前記搭載板上に固着された
絶縁フィルムと、この絶縁フィルム上に設けられ一端が
ワイヤーにより前記半導体素子に接続された複数の配線
と、前記絶縁フィルム上の周辺部に固着されワイヤーに
より前記配線の他端に接続された内部リードとを含むこ
とを特徴とする樹脂封止型半導体装置。1. A conductive mounting plate on which a semiconductor element is mounted, an insulating film fixed on the mounting plate in the peripheral portion of the semiconductor element, and one end provided on the insulating film to the semiconductor element by a wire. A resin-encapsulated semiconductor device comprising: a plurality of connected wirings; and an internal lead fixed to a peripheral portion of the insulating film and connected to the other end of the wiring by a wire. 【請求項２】 搭載板と絶縁フィルムに貫通孔が設けら
れている請求項１記載の樹脂封止型半導体装置。2. The resin-encapsulated semiconductor device according to claim 1, wherein the mounting plate and the insulating film are provided with through holes.
JP3326070A 1991-12-10 1991-12-10 Resin-sealed semiconductor device Withdrawn JPH05211273A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3326070A JPH05211273A (en) 1991-12-10 1991-12-10 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3326070A JPH05211273A (en) 1991-12-10 1991-12-10 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPH05211273A true JPH05211273A (en) 1993-08-20

Family

ID=18183775

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3326070A Withdrawn JPH05211273A (en) 1991-12-10 1991-12-10 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPH05211273A (en)

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