JPH05152947A - Phase locked loop circuit - Google Patents
Phase locked loop circuitInfo
- Publication number
- JPH05152947A JPH05152947A JP3340250A JP34025091A JPH05152947A JP H05152947 A JPH05152947 A JP H05152947A JP 3340250 A JP3340250 A JP 3340250A JP 34025091 A JP34025091 A JP 34025091A JP H05152947 A JPH05152947 A JP H05152947A
- Authority
- JP
- Japan
- Prior art keywords
- phase
- output
- signal
- output signal
- locked loop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は位相同期回路に関し、特
に広い引き込み範囲を有する位相同期回路。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase locked loop circuit, and more particularly to a phase locked loop circuit having a wide pull-in range.
【０００２】[0002]
【従来の技術】従来の位相同期回路を図４に示す。図４
において、位相同期回路は入力信号１０１と出力信号１
０７の位相差を検出する三角波型位相比較器１０２と、
三角波型位相比較器１０２の誤差信号１０３から直流成
分を抽出するループフィルタ１０４と、ループフィルタ
１０４の出力制御電圧１０５に応じて発振周波数を変更
する電圧制御発振器（ＶＣＯ）１０６とを有している。
ＶＣＯ１０６は制御信号１０５の電圧に応じた発振周波
数の出力信号１０７を発生する。2. Description of the Related Art A conventional phase locked loop circuit is shown in FIG. Figure 4
In the phase-locked loop circuit, the input signal 101 and the output signal 1
A triangular wave type phase comparator 102 for detecting a phase difference of 07,
It has a loop filter 104 for extracting a DC component from the error signal 103 of the triangular wave type phase comparator 102, and a voltage controlled oscillator (VCO) 106 for changing the oscillation frequency according to the output control voltage 105 of the loop filter 104. ..
The VCO 106 generates an output signal 107 having an oscillation frequency according to the voltage of the control signal 105.
【０００３】入力信号１０１が三角波型位相比較器１０
２に加えられると、位相比較器１０２は入力信号１０１
の位相をＶＣＯ１０６の出力信号１０６の位相と比較し
て、両信号の周波数間の位相差に応じた誤差信号１０３
を発生する。この誤差電圧１０３はループフィルタ１０
４により、高周波成分をカットされ、ＤＣ成分の制御電
圧１０５がＶＣＯ１０６に加えられる。このようにして
制御電圧１０５は入力信号１０１とＶＣＯ出力信号１０
７との間の周波数差を低減する方向にＶＣＯ１０６の周
波数を変更させる。この一連の動作が繰り返され、ＶＣ
Ｏ１０６の出力信号１０７は入力信号１０１に同期す
る。The input signal 101 is a triangular wave type phase comparator 10
When added to 2, the phase comparator 102 outputs the input signal 101
Is compared with the phase of the output signal 106 of the VCO 106, and the error signal 103 corresponding to the phase difference between the frequencies of both signals.
To occur. This error voltage 103 is the loop filter 10
4, the high frequency component is cut and the DC component control voltage 105 is applied to the VCO 106. In this way, the control voltage 105 is the input signal 101 and the VCO output signal 10
The frequency of the VCO 106 is changed so as to reduce the frequency difference between the VCO 106 and the VCO 106. This series of operations is repeated and VC
The output signal 107 of O106 is synchronized with the input signal 101.
【０００４】[0004]
【発明が解決しようとする課題】この従来の位相同期回
路では、位相比較器１０２によって、入力信号１０１
と、出力信号１０７の位相差のみを検出し、ＶＣＯ１０
６に帰還をかけているので、入力信号１０１とＶＣＯ出
力の周波数が異なると、位相差は０〜２πの間で変化し
続け、位相比較器の誤差信号１０３は正出力、負出力の
変化を繰り返し、直流成分が現れないことがある。この
ため、従来の位相同期回路では入力信号１０１とＶＣＯ
出力信号との周波数が異なるようになると、ＶＣＯの制
御電圧を位相比較器の出力電圧で制御できず、同期がと
れるという問題点があった。In this conventional phase-locked loop circuit, the input signal 101 is supplied by the phase comparator 102.
And only the phase difference of the output signal 107 is detected.
Since 6 is fed back, when the frequency of the input signal 101 and the VCO output are different, the phase difference continues to change between 0 and 2π, and the error signal 103 of the phase comparator changes the positive output and the negative output. Repeatedly, the DC component may not appear. Therefore, in the conventional phase locked loop, the input signal 101 and the VCO
If the frequency of the output signal is different, the control voltage of the VCO cannot be controlled by the output voltage of the phase comparator, and there is a problem that synchronization can be achieved.
【０００５】[0005]
【課題を解決するための手段】本発明の要旨は、入力信
号の位相と出力信号の位相を比較して位相差を表す誤差
信号を出力する位相比較器と、誤差信号から直流成分を
抽出するフィルタと、フィルタから供給される直流成分
に応じた周波数の上記出力信号を発生する電圧制御発振
器とを備えた位相同期回路において、上記出力信号の逆
相信号を発生するインバータと、上記出力信号と上記逆
相信号とを選択的に上記位相比較器に出力信号として供
給するスイッチ回路と、誤差信号と直流成分との供給を
受け入力信号と出力信号の位相差が３／２πであるか否
かを判断する検出器とを備え、上記検出器の判断結果に
より上記スイッチ回路を切り換えることである。SUMMARY OF THE INVENTION The gist of the present invention is to compare a phase of an input signal with a phase of an output signal to output an error signal representing a phase difference, and to extract a DC component from the error signal. In a phase locked loop circuit including a filter and a voltage controlled oscillator that generates the output signal having a frequency according to a DC component supplied from the filter, an inverter that generates a reverse phase signal of the output signal, and the output signal A switch circuit that selectively supplies the negative phase signal to the phase comparator as an output signal, and whether or not the phase difference between the input signal and the output signal is 3 / 2π when the error signal and the DC component are supplied. And a detector for determining that the switch circuit is switched according to the determination result of the detector.
【０００６】[0006]
【実施例】次に本発明の実施例について図面を参照して
説明する。図１は本発明の一実施例を示すブロック図で
ある。本実施例は入力信号１と電圧制御発振器６の出力
信号１０を比較して、その位相差に対応した誤差信号３
を出力する三角波型位相比較器２と、三角波型位相比較
器２の誤差信号３より直流成分を取り出すループフィル
タ４と、ループフィルタ４の出力５で発振周波数を制御
される電圧制御発振器（ＶＣＯ）６と、位相比較器２の
誤差信号３と、位相比較器５出力の電圧値を比較して、
位相差３／２πを検出する３／２π検出器７と、ＶＣＯ
６の出力を入力とするインバータ８と、３／２π検出器
７の出力１１により制御されるスイッチ９とで構成され
ている。Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. In this embodiment, the input signal 1 is compared with the output signal 10 of the voltage controlled oscillator 6, and the error signal 3 corresponding to the phase difference is compared.
Of the triangular wave type phase comparator 2, a loop filter 4 for extracting a DC component from the error signal 3 of the triangular wave type phase comparator 2, and a voltage controlled oscillator (VCO) whose oscillation frequency is controlled by an output 5 of the loop filter 4. 6, the error signal 3 of the phase comparator 2 and the voltage value of the output of the phase comparator 5 are compared,
A 3 / 2π detector 7 for detecting the phase difference 3 / 2π, and a VCO
It is composed of an inverter 8 which receives the output of 6 and an switch 9 which is controlled by an output 11 of the 3 / 2π detector 7.
【０００７】次に、本実施例の位相同期過程を説明す
る。位相比較器２から出力される誤差信号出力３はビー
ト波形であり、入力信号１と出力信号１０の同期がとれ
ていないときは、正，負の信号３が交互に出力される。
３／２π検出器７は誤差信号３の電圧値と、ループフィ
ルタ４の出力信号５の電圧値とを比較することにより、
誤差信号３と出力信号５の大小に応じた正，負の出力信
号１１を出力する。本実施例では誤差信号３と出力信号
５の大小関係が図２に示されているように位相差３／２
πで変化する。この出力信号１１の正負に応答してスイ
ッチ１はＶＣＯ出力を正相と逆相を切り換える。この出
力信号１１の正負応答してスイッチ９はＶＣＯ出力を正
相と逆相を切り換える。このように、ＶＣＯ６の正相出
力と逆相出力を３／２π点で切り換えることにより、ル
ープフィルタ出力には常にＶＣＯ制御信号が出力され、
結局、入力信号１とＶＣＯ出力信号１０は同期状態とな
る。Next, the phase synchronization process of this embodiment will be described. The error signal output 3 output from the phase comparator 2 has a beat waveform, and when the input signal 1 and the output signal 10 are not synchronized, positive and negative signals 3 are alternately output.
The 3 / 2π detector 7 compares the voltage value of the error signal 3 with the voltage value of the output signal 5 of the loop filter 4,
Positive and negative output signals 11 corresponding to the magnitudes of the error signal 3 and the output signal 5 are output. In the present embodiment, the magnitude relationship between the error signal 3 and the output signal 5 is 3/2 as shown in FIG.
It changes with π. In response to the positive / negative of the output signal 11, the switch 1 switches the VCO output between the positive phase and the negative phase. In response to the positive / negative of the output signal 11, the switch 9 switches the VCO output between the positive phase and the negative phase. In this way, by switching the positive phase output and the negative phase output of the VCO 6 at the 3 / 2π point, the VCO control signal is always output to the loop filter output,
Eventually, the input signal 1 and the VCO output signal 10 will be in a synchronous state.
【０００８】ここで３／２π検出器は図３に示すような
回路で実現され、バイポーラトランジスタＱ１〜Ｑ７と
抵抗Ｒ１〜Ｒ３で構成されている。Here, the 3 / 2π detector is realized by a circuit as shown in FIG. 3, and is composed of bipolar transistors Q1 to Q7 and resistors R1 to R3.
【０００９】位相比較器出力３とループフィルタ出力５
がほとんど等しく、大小関係が絶えず入れ替わるときで
も、比較動作にヒステリシスを持たせているので、その
出力はばらつかず一定になる。Phase comparator output 3 and loop filter output 5
Are almost equal to each other, and even when the magnitude relationship is constantly switched, the comparison operation has a hysteresis, so that the output is constant and does not vary.
【００１０】[0010]
【発明の効果】以上説明したように本発明の位相同期回
路は、その入出力信号の同期過程において内部の三角波
型位相比較器の特性の位相差３／２π〜５／２πに対応
する不要な期間を位相差３／２π検出回路によって検出
することにより、不要な期間を除去し、位相同期回路が
同期に要する時間を短縮し、かつ引き込み範囲を拡大す
る効果がある。As described above, the phase locked loop circuit of the present invention does not need to correspond to the phase difference of 3 / 2π to 5 / 2π of the internal triangular wave type phase comparator in the process of synchronizing the input / output signals. By detecting the period by the phase difference 3 / 2π detection circuit, there is an effect that an unnecessary period is removed, the time required for the phase synchronization circuit to synchronize is shortened, and the pull-in range is expanded.
【図１】本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.
【図２】位相差と出力電圧の関係を示すグラフである。FIG. 2 is a graph showing the relationship between phase difference and output voltage.
【図３】３／２π検出器の回路図である。FIG. 3 is a circuit diagram of a 3 / 2π detector.
【図４】従来例を示すブロック図である。FIG. 4 is a block diagram showing a conventional example.
１，１０１ 入力信号 ２，１０２ 三角波型位相比較器 ３，１０３ 三角波型位相比較器出力 ４，１０４ ループフィルタ ５，１０５ ループフィルタ出力 ６，１０６ ＶＣＯ ７ ３／２π検出器 ８ インバータ ９ スイッチ １０，１０７ ＶＣＯ出力 1, 101 Input signal 2, 102 Triangle wave type phase comparator 3, 103 Triangle wave type phase comparator output 4, 104 Loop filter 5, 105 Loop filter output 6, 106 VCO 7 3 / 2π detector 8 Inverter 9 Switch 10, 107 VCO output
Claims (1)
して位相差を表す誤差信号を出力する位相比較器と、誤
差信号から直流成分を抽出するフィルタと、フィルタか
ら供給される直流成分に応じた周波数の上記出力信号を
発生する電圧制御発振器とを備えた位相同期回路におい
て、上記出力信号の逆相信号を発生するインバータと、
上記出力信号と上記逆相信号とを選択的に上記位相比較
器に出力信号として供給するスイッチ回路と、誤差信号
と直流成分との供給を受け入力信号と出力信号の位相差
が３／２πであるか否かを判断する検出器とを備え、上
記検出器の判断結果により上記スイッチ回路を切り換え
ることを特徴とする位相同期回路。1. A phase comparator for comparing an input signal phase and an output signal phase to output an error signal representing a phase difference, a filter for extracting a DC component from the error signal, and a DC component supplied from the filter. In a phase-locked circuit including a voltage controlled oscillator that generates the output signal having a frequency according to, an inverter that generates a reverse phase signal of the output signal,
A switch circuit which selectively supplies the output signal and the negative phase signal to the phase comparator as an output signal, and a phase difference between the input signal and the output signal which is supplied with the error signal and the direct current component and is 3 / 2π. A phase lock circuit comprising: a detector for determining whether or not there is a switch, and switching the switch circuit according to a determination result of the detector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3340250A JPH05152947A (en) | 1991-11-29 | 1991-11-29 | Phase locked loop circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3340250A JPH05152947A (en) | 1991-11-29 | 1991-11-29 | Phase locked loop circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05152947A true JPH05152947A (en) | 1993-06-18 |
Family
ID=18335141
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3340250A Pending JPH05152947A (en) | 1991-11-29 | 1991-11-29 | Phase locked loop circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05152947A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107896109A (en) * | 2016-10-03 | 2018-04-10 | 亚德诺半导体集团 | The generation of zigzag slope is quickly established in phase-locked loop |
| US10931290B2 (en) | 2018-03-30 | 2021-02-23 | Analog Devices International Unlimited Company | Fast settling ramp generation using phase-locked loop |
-
1991
- 1991-11-29 JP JP3340250A patent/JPH05152947A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107896109A (en) * | 2016-10-03 | 2018-04-10 | 亚德诺半导体集团 | The generation of zigzag slope is quickly established in phase-locked loop |
| US10931290B2 (en) | 2018-03-30 | 2021-02-23 | Analog Devices International Unlimited Company | Fast settling ramp generation using phase-locked loop |
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