JPH0514300A - Subsidiary synchronizing system - Google Patents

Subsidiary synchronizing system

Info

Publication number
JPH0514300A
JPH0514300A JP3183662A JP18366291A JPH0514300A JP H0514300 A JPH0514300 A JP H0514300A JP 3183662 A JP3183662 A JP 3183662A JP 18366291 A JP18366291 A JP 18366291A JP H0514300 A JPH0514300 A JP H0514300A
Authority
JP
Japan
Prior art keywords
station
clock
free
stations
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3183662A
Other languages
Japanese (ja)
Other versions
JP3010804B2 (en
Inventor
Hideji Yuasa
秀治 湯浅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3183662A priority Critical patent/JP3010804B2/en
Publication of JPH0514300A publication Critical patent/JPH0514300A/en
Application granted granted Critical
Publication of JP3010804B2 publication Critical patent/JP3010804B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To abolish the limitation that the frequency accuracy at the time of the self-travelling of a higher order station must be more excellent than the frequency accuracy of a lower order station when a synchronous digital transmitting network is constructed. CONSTITUTION:In a subsidiary synchronizing system to extract a clock component from a multiplexing signal to multiplex plural digital signals sent from one side station, and keep the clock frequencies of both stations equal by synchronizing the clock of other side station to the clock component, a digital signal used for the communication between a station A and a self-station C stipulated beforehand out of the multiplexed digital signals is monitored, and when the abnormality is detected at the digital signal, the clock extraction from a transmitting signal at the self-station is stopped and switching is performed to the self-travelling clock.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、同期ディジタル伝送網
の前提となる網同期方式に利用する。特に、SDH多重
化信号のように階層化されたフレームフォーマットの多
重化信号中にある特定の2局間を結ぶパスの監視情報を
含むことによりそのパス上で経由する複数の局間での伝
送路障害をパスの両端の2局間で検知することが可能
で、さらに2局間のクロック周波数差をスタッフ・デス
タッフ制御等によりある程度吸収可能な伝送網に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used in a network synchronization system which is a prerequisite for a synchronous digital transmission network. In particular, transmission between a plurality of stations passing on a path by including monitoring information of a path connecting two specific stations in a multiplexed signal of a hierarchical frame format such as an SDH multiplexed signal The present invention relates to a transmission network capable of detecting a path failure between two stations at both ends of a path and capable of absorbing a clock frequency difference between the two stations to some extent by stuff / destuff control.

【0002】[0002]

【従来の技術】図2で、局Bは局Aから受信する複数の
ディジタル信号を多重化した多重化信号から伝送クロッ
ク成分を抽出し、それに同期したクロックを生成するこ
とにより局Aに従属同期している。局Cは局Bから受信
する複数のディジタル信号を多重化した多重化信号から
伝送クロック成分を抽出し、それに同期したクロックを
生成することにより局Bに従属同期している。このよう
にして局A、B、Cの従属同期が確立される。いま、局
Aから局Bに送出されていた多重化信号の伝送路に障害
か発生すると局Bは従属すべき抽出クロックが得られな
くなるが、局Bから局Cへの伝送路は正常なので、局C
は局Bに従属同期したままになる。この状態では局Cの
周波数精度は局Bの自走精度によって決定される。
2. Description of the Related Art In FIG. 2, a station B is subordinately synchronized with a station A by extracting a transmission clock component from a multiplexed signal obtained by multiplexing a plurality of digital signals received from the station A and generating a clock synchronized therewith. is doing. The station C is slave-synchronized with the station B by extracting a transmission clock component from a multiplexed signal obtained by multiplexing a plurality of digital signals received from the station B and generating a clock synchronized therewith. In this way, the slave synchronization of the stations A, B and C is established. Now, if a failure occurs in the transmission path of the multiplexed signal sent from the station A to the station B, the station B cannot obtain the extraction clock to be subordinated, but since the transmission path from the station B to the station C is normal, Station C
Remains slaved to station B. In this state, the frequency accuracy of station C is determined by the free running accuracy of station B.

【0003】[0003]

【発明が解決しようとする課題】このような従来例で
は、ある局が自走状態になるとその局に従属する下位の
局の周波数精度が自走状態の局の周波数精度により決定
されるので、網を構成する際には局の規模によらず上位
の局では高精度な周波数精度を実現する必要があった。
In such a conventional example, when a certain station becomes free-running, the frequency accuracy of the subordinate stations subordinate to that station is determined by the frequency accuracy of the free-running station. When constructing the network, it was necessary to realize high frequency accuracy in the higher station regardless of the scale of the station.

【0004】本発明は、このような欠点を除去するもの
で、下位局への影響を考えて上位局の周波数精度を上げ
る必要がなく比較的安価に同期網を構成できる従属同期
方式を提供することを目的とする。
The present invention eliminates such drawbacks, and provides a slave synchronization system which can construct a synchronous network at a relatively low cost without having to improve the frequency accuracy of the upper station in consideration of the influence on the lower station. The purpose is to

【0005】[0005]

【課題を解決するための手段】本発明は、従属接続され
た複数個の局で構成され、この複数個の局のそれぞれ
は、自走クロックを発生する自走クロック信号発生部を
備え、下位局のそれぞれは、その上位側の局のそれぞれ
から送出されるディジタル信号を多重化した多重化信号
からこの上位側の局の最上位の局の自走クロック信号を
抽出するクロック抽出部、このクロック抽出部が抽出す
るクロック信号または自走クロック信号のいずれか一方
のクロック信号を選択する選択部、この選択部に選択指
令を与える制御部、およびこの選択手段で選択されたク
ロック信号に応じて自局の同期クロックを発生する同期
クロック発生部を備えた従属同期方式において、上記制
御部は、上記複数個の上位局から送出される多重化信号
に含まれるディジタル信号のうち所定の上位局と自局と
の間の通信に使用されているディジタル信号を抽出し、
この抽出されたディジタル信号に異常が検出された場合
に上記自走クロック信号を選択する選択指令を自局の選
択部に与える手段を備えたことを特徴とする。
The present invention comprises a plurality of stations connected in cascade, each of the plurality of stations including a free-running clock signal generator for generating a free-running clock. Each of the stations extracts a free-running clock signal of the uppermost station of the upper side station from the multiplexed signal obtained by multiplexing the digital signals transmitted from the upper side stations. A selection unit for selecting either one of the clock signal extracted by the extraction unit or the free-running clock signal, a control unit for giving a selection command to this selection unit, and an automatic unit according to the clock signal selected by this selection means. In a subordinate synchronization system provided with a synchronous clock generating unit for generating a synchronous clock of a station, the control unit includes a digital signal included in a multiplexed signal transmitted from the plurality of upper stations. Extracting a digital signal that is used for communication between a given host station and the own station among the signals,
It is characterized in that it is provided with means for giving a selection command for selecting the free-running clock signal to the selection section of the own station when an abnormality is detected in the extracted digital signal.

【0006】[0006]

【作用】多重化されたディジタル信号のうち予め定めた
局と自局との間の通信に使用されているディジタル信号
に異常が検出された場合に自局におけるクロック抽出を
停止して、自走クロック信号を同期部に与える。これに
より、上位局の自走時の周波数精度が下位局の周波数精
度より優れていなければならないという制限が撤廃され
る。
When the abnormality is detected in the digital signal used for the communication between the predetermined station and the own station among the multiplexed digital signals, the clock extraction in the own station is stopped and the self-running is performed. The clock signal is supplied to the synchronizing section. This removes the restriction that the frequency accuracy of the higher station when it is running must be higher than the frequency accuracy of the lower station.

【0007】[0007]

【実施例】以下、本発明の一実施例について図面を用い
て説明する。図1は本発明の従属同期方式を用いた場合
の一例として3つの局A、B、Cで同期網を構成した場
合の構成図である。この実施例は、図1に示すように、
従属接続された複数個の局A、BおよびCで構成され、
この複数個の局A、BおよびCのそれぞれは、自走クロ
ックを発生する自走クロック信号発生部1を備え、下位
局BおよびCのそれぞれは、その上位側の局のそれぞれ
から送出されるディジタル信号を多重化した多重化信号
からこの上位側の局の最上位の局の自走クロック信号を
抽出するクロック抽出部2、このクロック抽出部2が抽
出するクロック信号または自走クロック信号のいずれか
一方のクロック信号を選択する選択部3、この選択部3
に選択指令を与える制御部4、およびこの選択手段4で
選択されたクロック信号に応じて自局の同期クロックを
発生する同期クロック発生部5を備え、さらに、本発明
の特徴とする手段として、制御部4は、上記複数個の上
位局A、BおよびCから送出される多重化信号に含まれ
るディジタル信号のうち所定の上位局と自局との間の通
信に使用されているディジタル信号を抽出し、この抽出
されたディジタル信号に異常が検出された場合に自走ク
ロック信号を選択する選択指令を自局の選択部3に与え
る手段を備える。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a case where a synchronous network is composed of three stations A, B and C as an example of the case where the subordinate synchronization method of the present invention is used. This embodiment, as shown in FIG.
It is composed of a plurality of stations A, B and C connected in cascade,
Each of the plurality of stations A, B and C is provided with a free-running clock signal generator 1 for generating a free-running clock, and each of the lower stations B and C is transmitted from each of the upper stations. A clock extraction unit 2 for extracting the free-running clock signal of the uppermost station of this upper-side station from the multiplexed signal obtained by multiplexing digital signals, either the clock signal extracted by this clock extraction unit 2 or the free-running clock signal. Selector 3 for selecting one of the clock signals, and this selector 3
And a synchronization clock generator 5 for generating a synchronization clock of its own station in accordance with the clock signal selected by the selection means 4, and further, as means characterized by the present invention, The control unit 4 selects a digital signal used for communication between a predetermined upper station and its own station among the digital signals included in the multiplexed signal transmitted from the plurality of upper stations A, B and C. It is provided with means for extracting, and giving a selection command for selecting the free-running clock signal to the selecting unit 3 of the own station when an abnormality is detected in the extracted digital signal.

【0008】次に、この実施例の動作を説明する。局B
は局Aから受信した多重化信号から抽出される伝送クロ
ック成分をもとに従属同期を確立しており、局Cはクロ
ック抽出部で局Bから受信した多重化信号から伝送クロ
ック成分を抽出し、それぞれ従属同期を確立している。
また、局Cでは、ディジタル信号監視部で局Bから受信
する複数のディジタル信号を多重化した多重化信号の内
から局Aと局C間の通信に使用されているディジタル信
号を監視する手段を有する。いま、局Aと局Bとの間の
伝送路に障害が起こったとすると、局Cではディジタル
信号監視部で局Aからの通信に使用されていたディジタ
ル信号を監視しているので、この区間の伝送路に障害が
起こったことを知り、これにより自走した局Bの周波数
精度のクロック成分の抽出を停止することができる。し
たがって、局Bの自走時の周波数精度は局Cに必要な周
波数精度よりも低くできる。すなわち、局Bと局Cの周
波数精度を制限なく決定できるので、局B内の網同期装
置を安価にすることが可能になる。
Next, the operation of this embodiment will be described. Station B
Establishes slave synchronization based on the transmission clock component extracted from the multiplexed signal received from station A, and station C extracts the transmission clock component from the multiplexed signal received from station B at the clock extraction unit. , Have respectively established subordinate synchronization.
In the station C, a means for monitoring a digital signal used for communication between the stations A and C from among multiplexed signals obtained by multiplexing a plurality of digital signals received from the station B by the digital signal monitoring unit is provided. Have. If a failure occurs in the transmission line between the station A and the station B, the digital signal monitoring section of the station C monitors the digital signal used for communication from the station A. By knowing that a failure has occurred in the transmission line, it is possible to stop the extraction of the clock component with the frequency accuracy of the free-running station B. Therefore, the frequency accuracy when the station B is free running can be lower than the frequency accuracy required for the station C. That is, since the frequency accuracy of the stations B and C can be determined without limitation, the cost of the network synchronizer in the station B can be reduced.

【0009】[0009]

【発明の効果】本発明は、以上説明したように、ある局
が自走状態になってもその局に従属していた下位の局の
周波数精度は自走状態の局の周波数精度による制限を受
けないので、従来の方式のようにある伝送路での障害の
影響をその局より下位の局に与えないようにするために
周波数精度を高くする必要がなくなる効果がある。
As described above, according to the present invention, even if a certain station becomes free-running, the frequency accuracy of subordinate stations subordinate to that station is limited by the frequency accuracy of the free-running station. Since it is not affected, there is an effect that there is no need to increase the frequency accuracy in order to prevent the influence of a failure in a certain transmission line from affecting a station lower than the station unlike the conventional method.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明実施例の構成を示すブロック構成図。FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

【図2】従来例の構成を示すブロック構成図。FIG. 2 is a block configuration diagram showing a configuration of a conventional example.

【符号の説明】[Explanation of symbols]

1 自走クロック信号発生部 2 クロック抽出部 3 選択部 4 制御部 5 同期クロック発生部 1 Free-running clock signal generator 2 Clock extractor 3 Selector 4 Controller 5 Synchronous clock generator

Claims (1)

【特許請求の範囲】 【請求項1】 従属接続された複数個の局で構成され、
この複数個の局のそれぞれは、自走クロックを発生する
自走クロック信号発生部を備え、下位局のそれぞれは、
その上位側の局のそれぞれから送出されるディジタル信
号を多重化した多重化信号からこの上位側の局の最上位
の局の自走クロック信号を抽出するクロック抽出部、こ
のクロック抽出部が抽出するクロック信号または自走ク
ロック信号のいずれか一方のクロック信号を選択する選
択部、この選択部に選択指令を与える制御部、およびこ
の選択部で選択されたクロック信号に応じて自局の同期
タイミングを決定する同期部を備えた従属同期方式にお
いて、 上記制御部は、上記複数個の上位局から送出される多重
化信号に含まれるディジタル信号のうち所定の上位局と
自局との間の通信に使用されているディジタル信号を抽
出し、この抽出されたディジタル信号に異常が検出され
た場合に上記自走クロック信号を選択する選択指令を自
局の選択部に与える手段を備えたことを特徴とする従属
同期方式。
Claims: 1. A plurality of stations connected in cascade,
Each of the plurality of stations includes a free-running clock signal generator that generates a free-running clock.
A clock extraction unit that extracts the free-running clock signal of the uppermost station of this upper station from the multiplexed signal obtained by multiplexing the digital signals sent from each of the upper stations, and this clock extraction unit extracts it. A selection unit that selects one of the clock signal and the free-running clock signal, a control unit that gives a selection command to this selection unit, and a synchronization timing of the own station according to the clock signal selected by this selection unit. In the subordinate synchronization method including a determining synchronization unit, the control unit controls communication between a predetermined upper station and its own station among digital signals included in the multiplexed signal transmitted from the plurality of higher stations. A selection command of the own station is used to extract the digital signal being used and to select the free-running clock signal when an abnormality is detected in the extracted digital signal. A subordinate synchronization method, characterized in that it is provided with a means for giving.
JP3183662A 1991-06-27 1991-06-27 Dependent synchronization method Expired - Fee Related JP3010804B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3183662A JP3010804B2 (en) 1991-06-27 1991-06-27 Dependent synchronization method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3183662A JP3010804B2 (en) 1991-06-27 1991-06-27 Dependent synchronization method

Publications (2)

Publication Number Publication Date
JPH0514300A true JPH0514300A (en) 1993-01-22
JP3010804B2 JP3010804B2 (en) 2000-02-21

Family

ID=16139738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3183662A Expired - Fee Related JP3010804B2 (en) 1991-06-27 1991-06-27 Dependent synchronization method

Country Status (1)

Country Link
JP (1) JP3010804B2 (en)

Also Published As

Publication number Publication date
JP3010804B2 (en) 2000-02-21

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