JPH05114740A - Method of manufacturing semiconductor device - Google Patents
Method of manufacturing semiconductor deviceInfo
- Publication number
- JPH05114740A JPH05114740A JP30272691A JP30272691A JPH05114740A JP H05114740 A JPH05114740 A JP H05114740A JP 30272691 A JP30272691 A JP 30272691A JP 30272691 A JP30272691 A JP 30272691A JP H05114740 A JPH05114740 A JP H05114740A
- Authority
- JP
- Japan
- Prior art keywords
- gas
- insulating film
- tunnel insulating
- film
- furnace
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体装置の製造方法
特に電荷がトンネル可能な膜厚の絶縁膜（以下トンネル
絶縁膜という）の形成方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming an insulating film having a film thickness capable of tunneling charges (hereinafter referred to as a tunnel insulating film).
【０００２】[0002]
【従来の技術】従来、ＭＮＯＳ（Metal-Nitride-Oxide-
Semiconductor ）型やＭＯＮＯＳ（Metal-Oxide-Nitrid
e-Oxide-Semiconductor ）型の不揮発性記憶素子に使用
するトンネル絶縁膜は、つぎの方法で形成されていた。
すなわちN2ガスで希釈した低濃度O2ガス雰囲気中での
ドライ酸化、N2またはNH3 ガスを直接Si基板に反応さ
せる直接熱窒化、一旦酸化膜を作って、その酸化膜を
高温中においてNH3ガスで窒化するNH3 熱窒化。2. Description of the Related Art Conventionally, MNOS (Metal-Nitride-Oxide-
Semiconductor) type and MONOS (Metal-Oxide-Nitrid
The tunnel insulating film used for the e-Oxide-Semiconductor) type non-volatile memory element was formed by the following method.
That is, dry oxidation in a low-concentration O 2 gas atmosphere diluted with N 2 gas, direct thermal nitridation in which N 2 or NH 3 gas is directly reacted with a Si substrate, an oxide film is once formed, and the oxide film is heated at a high temperature. NH 3 thermal nitriding of nitriding in an NH 3 gas.
【０００３】こゝでのドライ酸化法では、プログラム
スピードを早くするためにトンネル絶縁膜を薄くすると
記憶保持特性が悪くなり、またの直接熱窒化法でもプ
ログラムスピードを早くするためにバンドギャップを小
さくすると記憶保持特性が悪くなる。すなわち, の
方法ではプログラムスピードと記憶保持特性とが相反す
る結果となる。さらにのNH3 熱窒化法ではトンネル絶
縁膜中にNH3 から解離した水素が多量に入り、この水素
が電子をトラップし固定電荷が発生, 増加して消去がで
きなくなり書換え寿命が短かいという問題があった。In this dry oxidation method, if the tunnel insulating film is thinned in order to increase the program speed, the memory retention characteristics deteriorate, and in the direct thermal nitriding method, the band gap is reduced in order to increase the program speed. Then, the memory retention characteristic deteriorates. That is, the method (2) results in a conflict between the program speed and the memory retention characteristic. Furthermore, in the NH 3 thermal nitriding method, a large amount of hydrogen dissociated from NH 3 enters the tunnel insulating film, and this hydrogen traps electrons and a fixed charge is generated, which increases and cannot be erased. was there.
【０００４】[0004]
【発明が解決しようとする課題】本発明は、前述のよう
な現状に鑑み、プログラムスピードが早く記憶保持特性
が良くかつ固定電荷の発生しないトンネル絶縁膜を形成
する技術を提供するためになされたものである。SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances and provides a technique for forming a tunnel insulating film having a fast program speed, good memory retention characteristics, and fixed charges not generated. It is a thing.
【０００５】[0005]
【課題を解決するための手段】本発明は、ＭＮＯＳ型，
ＭＯＮＯＳ型不揮発性記憶素子に使用するトンネル絶縁
膜を形成するに際し、N2O ガスとH2O とがほヾ９：１の
割合で混合されたガスを、半導体基板が装入されている
800 ℃〜900 ℃のファーネスに供給し、トンネル絶縁膜
を形成することを特徴とする半導体装置の製造方法であ
る。SUMMARY OF THE INVENTION The present invention is a MNOS type,
When forming a tunnel insulating film used for a MONOS type nonvolatile memory element, a semiconductor substrate is charged with a gas in which N 2 O gas and H 2 O are mixed at a ratio of about 9: 1.
This is a method for manufacturing a semiconductor device, which comprises supplying a furnace at 800 ° C. to 900 ° C. to form a tunnel insulating film.
【０００６】[0006]
【作用】本発明の構成，作用を以下に説明する。先ずO
2, H2ガスとを外部燃焼装置に入れて燃焼させ水蒸気に
して、これを半導体基板が装入されているファーネスに
導入する。したがってウェット酸化となり、SiとSiO2と
の界面がドライ酸化に比べてよりフラットとなり高信頼
性のトンネル絶縁膜が形成される。一方、N2O がファー
ネスに同時に導入される。こゝでN2O ガスとH2O との比
は、ほゞ９：１の割合に維持される。N2O が導入される
ことによってSiが酸化され、SiO2よりむしろ SiON に近
いトンネル酸化膜が形成される。ここで、所望の酸化速
度が得られるように、N2ガスあるいはArガスで希釈して
よい。The structure and operation of the present invention will be described below. First O
2, H 2 gas and an external combustion device are put into an external combustion apparatus to burn the water vapor, which is then introduced into the furnace in which the semiconductor substrate is placed. Therefore, wet oxidation is performed, and the interface between Si and SiO 2 is flatter than in dry oxidation, and a highly reliable tunnel insulating film is formed. On the other hand, N 2 O is simultaneously introduced into the furnace. Here, the ratio of N 2 O gas to H 2 O is maintained at a ratio of about 9: 1. The introduction of N 2 O oxidizes Si, forming a tunnel oxide film closer to SiO N rather than SiO 2 . Here, it may be diluted with N 2 gas or Ar gas so as to obtain a desired oxidation rate.
【０００７】したがって、Si基板側でバンドギャップが
小さくSiN 膜側でバンドギャップが大きいテーパーバン
ドギャップのトンネル絶縁膜が形成される。さらに従来
のNH3 熱窒化の場合のように解離した水素がないので固
定電荷が発生, 増加することはない。以上のように、本
発明によるとSi基板側でバンドギャップが小さく、SiN
膜側でバンドギャップが大きいテーパーバンドギャップ
のトンネル絶縁膜が形成されプログラムスピードが早
く、記憶保持性が良く、かつそのトンネル絶縁膜中に水
素が少ないため固定電荷の発生がなく書換え寿命が長く
なる。Therefore, a tunnel insulating film having a tapered bandgap having a small bandgap on the Si substrate side and a large bandgap on the SiN film side is formed. Furthermore, unlike the case of conventional NH 3 thermal nitriding, there is no dissociated hydrogen, so fixed charges are not generated or increased. As described above, according to the present invention, the band gap on the Si substrate side is small, and the SiN
A tunnel insulating film with a taper band gap with a large band gap is formed on the film side, and the programming speed is fast, memory retention is good, and since there is little hydrogen in the tunnel insulating film, fixed charges are not generated and the rewriting life is long. ..
【０００８】[0008]
【実施例】O2ガス0.05l/min とH2ガス0.1l/minとを外部
燃焼装置に導入し、水蒸気0.1l/minを発生させ、Si基板
を装入しているファーネスに導入した。一方、0.9l/min
のN2O ガスと 9l/min のN2ガスを同時にファーネス温度
800 ℃〜900 ℃のファーネスに導入しSi基板を酸化し
た。この結果、酸化時間15〜30分で膜厚 20A°程度のト
ンネル絶縁膜が形成された。従来のドライ、酸化法、
直接熱窒化法、NH3 熱窒化法で作成したトンネル絶
縁膜に比べると、このトンネル絶縁膜はプログラムスピ
ードが５倍（同じ記憶保持特性の場合）早く、記憶保持
特性が３倍（同じプログラムスピードの場合）良く、か
つ書換え寿命が２倍長くなった。[Examples] O 2 gas of 0.05 l / min and H 2 gas of 0.1 l / min were introduced into an external combustion apparatus to generate water vapor of 0.1 l / min, and introduced into a furnace containing a Si substrate. On the other hand, 0.9l / min
N 2 O gas and 9 l / min N 2 gas at the same furnace temperature
The Si substrate was oxidized by introducing it into a furnace at 800 ℃ to 900 ℃. As a result, a tunnel insulating film having a film thickness of about 20 A ° was formed in an oxidation time of 15 to 30 minutes. Conventional dry, oxidation method,
Compared to the tunnel insulating film formed by the direct thermal nitriding method or the NH 3 thermal nitriding method, this tunnel insulating film has a program speed 5 times faster (in the case of the same memory retention characteristic) and a memory retention characteristic 3 times (same program speed). In the case of), the rewriting life was doubled.
【０００９】[0009]
【発明の効果】本発明によると、前述のとおり従来のト
ンネル絶縁膜に比べプログラムスピードが早く記憶保持
特性が良く、かつ書換え寿命の長いトンネル絶縁膜を形
成することができる。As described above, according to the present invention, it is possible to form a tunnel insulating film having a faster programming speed, better memory retention characteristics and a longer rewriting life than the conventional tunnel insulating film.
Claims (1)
記憶素子に使用する電荷がトンネル可能な膜厚の絶縁膜
を半導体基板上に形成するに際し、 N2O ガスとH2O とがほゞ９：１の割合で混合されたガス
を、半導体基板が装入されている800 ℃〜900 ℃のファ
ーネスに供給し、トンネル絶縁膜を形成することを特徴
とする半導体装置の製造方法。1. When forming an insulating film having a film thickness capable of tunneling charges used in a MNOS type and MONOS type non-volatile memory element on a semiconductor substrate, N 2 O gas and H 2 O are mixed. A method of manufacturing a semiconductor device, characterized in that the tunnel insulating film is formed by supplying a gas mixed at a ratio of 1 to a furnace of 800 ° C. to 900 ° C. in which a semiconductor substrate is charged.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30272691A JPH05114740A (en) | 1991-10-23 | 1991-10-23 | Method of manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30272691A JPH05114740A (en) | 1991-10-23 | 1991-10-23 | Method of manufacturing semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05114740A true JPH05114740A (en) | 1993-05-07 |
Family
ID=17912425
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30272691A Pending JPH05114740A (en) | 1991-10-23 | 1991-10-23 | Method of manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05114740A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6239041B1 (en) | 1997-03-05 | 2001-05-29 | Hitachi, Ltd. | Method for fabricating semiconductor integrated circuit device |
| US6800502B2 (en) | 1998-10-07 | 2004-10-05 | Lg Philips Lcd Co., Ltd. | Thin film transistor, method of producing the same, liquid crystal display, and thin film forming apparatus |
| US6891744B2 (en) | 1999-03-29 | 2005-05-10 | Hewlett-Packard Development Company, L.P. | Configurable nanoscale crossbar electronic circuits made by electrochemical reaction |
-
1991
- 1991-10-23 JP JP30272691A patent/JPH05114740A/en active Pending
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6855642B2 (en) | 1997-03-05 | 2005-02-15 | Renesas Technology Corp. | Method for fabricating semiconductor integrated circuit device |
| US6596650B2 (en) | 1997-03-05 | 2003-07-22 | Hitachi, Ltd. | Method for fabricating semiconductor integrated circuit device |
| US6518201B1 (en) | 1997-03-05 | 2003-02-11 | Hitachi, Ltd. | Method for fabricating semiconductor integrated circuit device |
| US6518202B2 (en) | 1997-03-05 | 2003-02-11 | Hitachi, Ltd. | Method for fabricating semiconductor integrated circuit device |
| US6239041B1 (en) | 1997-03-05 | 2001-05-29 | Hitachi, Ltd. | Method for fabricating semiconductor integrated circuit device |
| US6569780B2 (en) | 1997-03-05 | 2003-05-27 | Hitachi, Ltd. | Method for fabricating semiconductor integrated circuit device |
| US6417114B2 (en) | 1997-03-05 | 2002-07-09 | Hitachi, Ltd. | Method for fabricating semiconductor integrated circuit device |
| US7799690B2 (en) | 1997-03-05 | 2010-09-21 | Renesas Electronics Corporation | Method for fabricating semiconductor integrated circuit device |
| US6528431B2 (en) | 1997-03-05 | 2003-03-04 | Hitachi, Ltd. | Method for fabricating semiconductor integrated circuit drive using an oxygen and hydrogen catalyst |
| US7250376B2 (en) | 1997-03-05 | 2007-07-31 | Renesas Technology Corp. | Method for fabricating semiconductor integrated circuit device |
| US6962880B2 (en) | 1997-03-05 | 2005-11-08 | Renesas Technology Corp. | Method for fabricating semiconductor integrated circuit device |
| US6962881B2 (en) | 1997-03-05 | 2005-11-08 | Renesas Technology Corp. | Method for fabricating semiconductor integrated circuit device |
| US7008880B2 (en) | 1997-03-05 | 2006-03-07 | Renesas Technology Corp. | Method for fabricating semiconductor integrated circuit device |
| US7053007B2 (en) | 1997-03-05 | 2006-05-30 | Renesas Technology Corp. | Method for fabricating semiconductor integrated circuit device |
| US6800502B2 (en) | 1998-10-07 | 2004-10-05 | Lg Philips Lcd Co., Ltd. | Thin film transistor, method of producing the same, liquid crystal display, and thin film forming apparatus |
| US6891744B2 (en) | 1999-03-29 | 2005-05-10 | Hewlett-Packard Development Company, L.P. | Configurable nanoscale crossbar electronic circuits made by electrochemical reaction |
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