JPH0482243A - Mounting apparatus of semiconductor element - Google Patents

Mounting apparatus of semiconductor element

Info

Publication number
JPH0482243A
JPH0482243A JP19647390A JP19647390A JPH0482243A JP H0482243 A JPH0482243 A JP H0482243A JP 19647390 A JP19647390 A JP 19647390A JP 19647390 A JP19647390 A JP 19647390A JP H0482243 A JPH0482243 A JP H0482243A
Authority
JP
Japan
Prior art keywords
semiconductor element
substrate
light
bonding tool
parallelism
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19647390A
Other languages
Japanese (ja)
Inventor
Katsunori Nishiguchi
勝規 西口
Atsushi Miki
淳 三木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP19647390A priority Critical patent/JPH0482243A/en
Publication of JPH0482243A publication Critical patent/JPH0482243A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To surely execute a facedown bonding operation by a method wherein the parallelism between a semiconductor element and a substrate is detected by the parallelism position detection part installed in a substrate-holding part and by the light reflection face on a bonding tool. CONSTITUTION:A semiconductor element 1 is sucked and fixed to the tip part of a bonding tool 2. Then, the tool 2 is moved to the -Z direction. When the toil 2 and a substrate-holding part 4 are approached up to a prescribed distance, a laser beam is irradiated from a laser-beam irradiation device 6. The incident position of reflected light is detected by using a two-dimensional position detection sensor 7; and the inclination state of a bump formation face 1a at the element 1 is operated and computed. The angle of rotation thetax in the X-axis direction of the tool 2 and the angle of rotation thetay in the Y-axis direction are adjusted so as to correct a found inclination state; the reflected light is set in a prescribed position. The inclination of the tool 2 is fixed in this state, the tool 2 is moved to the -Z direction and a facedown bonding operation is executed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体素子実装装置に関し、特に詳細には、半
導体素子をフェースダウンボンディングで基板上に実装
する半導体素子実装装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor element mounting apparatus, and more particularly to a semiconductor element mounting apparatus for mounting a semiconductor element on a substrate by face-down bonding.

〔従来技術〕[Prior art]

近年、半導体素子を基板上に実装する際、実装密度及び
作業性の点からフェースダウン方式において、フリップ
チップ実装技術が注目されるようになってきた。この方
法は、「エレクトロニック・パッケージング・テクノロ
ジー」の1989年12月号に掲載された「フリップチ
ップ実装の技術動向」と題する文献に記載されている。
In recent years, when mounting semiconductor elements on a substrate, flip-chip mounting technology has been attracting attention as a face-down method from the viewpoint of mounting density and workability. This method is described in a document entitled "Technology Trends in Flip Chip Mounting" published in the December 1989 issue of "Electronic Packaging Technology".

そして、フリップチップをフェースダウン方式で基板上
に実装する際、半導体素子を実装する基板面に対して平
行に保った状態でフェースダウンしなければならない。
When a flip chip is mounted on a substrate using a face-down method, the flip chip must be mounted face-down while being kept parallel to the surface of the substrate on which the semiconductor element is mounted.

しかし、従来は実装装置の最初の調節の際、ボンディン
グツールと基板面との平行度を調整した後は、調節をお
こなわすフェースダウンボンディングを実施していた。
However, conventionally, during the first adjustment of the mounting apparatus, face-down bonding was performed in which the parallelism between the bonding tool and the substrate surface was adjusted and then the adjustment was made.

このような方法では、半導体素子を基板面に対して確実
にボンディングできない場合かあった。そこで、フェー
スダウンボンディング中に半導体素子を吸着保持したソ
ールの真横にTVカメラ等を設け、このカメラ等で、半
導体素子を観察し、ツールと基板との平行度を観察しつ
つフェースダウンを行っていた。
With such a method, it may not be possible to reliably bond the semiconductor element to the substrate surface. Therefore, during face-down bonding, a TV camera, etc. is installed right next to the sole that holds the semiconductor element by suction, and the semiconductor element is observed with this camera, and face-down is performed while observing the parallelism between the tool and the substrate. Ta.

〔発明か解決しようとする課題〕[Invention or problem to be solved]

しかし、上記のような従来の装置では、バンプが設けら
れた半導体素子とこれがボンディングされる基板との間
では、10mm当たり数μm程度の平行度しか実現でき
ず、その結果、フリップチップのバンプ高さが10μm
以下となるような高密度化に伴う微細化に十分対応する
ことかできなかった。
However, with the above-mentioned conventional equipment, it is only possible to achieve parallelism of only a few μm per 10 mm between the semiconductor element provided with bumps and the substrate to which it is bonded, and as a result, the bump height of the flip chip is reduced. length 10μm
It was not possible to adequately respond to the miniaturization that accompanies higher density as described below.

本発明は上記課題を解決し、高密度化に伴い微細化に対
応できる半導体素子実装装置を提供することを目的とす
る。
An object of the present invention is to solve the above problems and provide a semiconductor element mounting apparatus that can cope with miniaturization as the density increases.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体素子実装装置は、吸着面と、この吸着面
の外側に設けられ、吸着面に平行な光反射面とを有し、
片面にバンプ電極が形成されている半導体素子を反対面
で吸着面に吸着させて保持するボンディングツールと、
半導体素子が実装される基板を保持する保持部材と、ボ
ンディングツルを保持部材に対して移動させる移動機構
と、保持部材に設けられ、光反射面に対してスポット光
を照射する光照射手段と、保持部材に設けられ、光照射
手段から出射した光の光反射面での反射光か入射するよ
うな位置に配置され、入射した反射光の入射位置を特定
できる光位置検出手段と、光位置検出手段からの出力に
基づいて、ボンディングツールに搭載された半導体素子
と保持部材に搭載された基板との平行度を求める平行度
検出手段とを備えたことを特徴とする。
The semiconductor element mounting apparatus of the present invention has a suction surface and a light reflecting surface provided outside the suction surface and parallel to the suction surface,
a bonding tool that holds a semiconductor element having bump electrodes formed on one side by adsorbing it to an adsorption surface on the other side;
a holding member that holds a substrate on which a semiconductor element is mounted; a moving mechanism that moves a bonding crane relative to the holding member; and a light irradiation means that is provided on the holding member and that irradiates a light-reflecting surface with spot light; a light position detection means provided on the holding member and arranged at a position where the reflected light on the light reflection surface of the light emitted from the light irradiation means is incident, and capable of identifying the incident position of the incident reflected light; The present invention is characterized by comprising a parallelism detecting means for determining the parallelism between the semiconductor element mounted on the bonding tool and the substrate mounted on the holding member based on the output from the means.

更に、上記装置において、ボンディングツールにその吸
着面の基板保持面に対する傾斜を調整できる傾斜調整機
構を設け、更に移動機構、傾斜調整機構を平行度検出手
段からの検出結果に基づいて制御する制御手段を設ける
ことにより、自動で平行度を調節し、フェースダウンボ
ンディングを行わせるように構成しておくことが好まし
い。
Furthermore, in the above apparatus, the bonding tool is provided with an inclination adjustment mechanism that can adjust the inclination of the suction surface of the bonding tool with respect to the substrate holding surface, and further includes a control means for controlling the moving mechanism and the inclination adjustment mechanism based on the detection result from the parallelism detection means. It is preferable that the parallelism be automatically adjusted by providing a configuration such that face down bonding is performed.

〔作用〕[Effect]

本発明の半導体素子実装装置では、ボンディングツール
の吸着面の周囲に吸着面と平行な光反射面を設け、この
光反射面に保持部材側からスポット光を照射し、そのス
ポット光の光反射面で反射した光の入射位置を保持部材
上に設けた光位置検出手段で検出している。これにより
、光反射面が所定の状態にあるときは、この反射したス
ポット光は所定の位置に入射されるが、もし所定の状態
から傾斜しているときは、別の場所に入射する。
In the semiconductor element mounting apparatus of the present invention, a light reflecting surface parallel to the attracting surface is provided around the attracting surface of the bonding tool, a spot light is irradiated onto this light reflecting surface from the holding member side, and the light reflecting surface of the spot light is The incident position of the reflected light is detected by a light position detection means provided on the holding member. As a result, when the light reflecting surface is in a predetermined state, the reflected spot light is incident on a predetermined position, but if it is tilted from the predetermined state, it is incident on another location.

そして、この反射したスポット光が入射した位置により
、光反射面、すなわちボンディングツールに搭載された
半導体素子の基板に対する傾斜状態を正確に検知するこ
とができる。そしてこの検知された結果により、ボンデ
ィングツールの傾斜状態を補正し、ボンディングツール
上に半導体素子の面を基板の素子搭載面に対して平行に
することかできる。
Based on the position where the reflected spot light is incident, it is possible to accurately detect the tilt state of the semiconductor element mounted on the light reflecting surface, that is, the bonding tool, with respect to the substrate. Based on this detected result, the tilted state of the bonding tool can be corrected to make the surface of the semiconductor element on the bonding tool parallel to the element mounting surface of the substrate.

〔実施例〕〔Example〕

以下、図面を参照しつつ本発明に従う実施例を説明して
いく。
Embodiments according to the present invention will be described below with reference to the drawings.

第1図は本発明に従う半導体素子実装装置の一実施例の
構成図である。
FIG. 1 is a block diagram of an embodiment of a semiconductor element mounting apparatus according to the present invention.

第1図に示すように、半導体素子実装装置は、半導体素
子1を搭載するボンディングツール2と、半導体素子]
か実装される半導体基板3を保持する基板保持部4と、
ボンディングツール2と基板保持部4との平行度を検出
する平行度検出部5とを備えている。
As shown in FIG. 1, the semiconductor element mounting apparatus includes a bonding tool 2 on which a semiconductor element 1 is mounted, and a semiconductor element].
a substrate holding section 4 that holds the semiconductor substrate 3 to be mounted;
It includes a parallelism detection section 5 that detects the parallelism between the bonding tool 2 and the substrate holding section 4.

このボンディングツール2の先端部には、半導体素子1
を吸着固定する平面2a(吸着面)が形成されている。
The tip of this bonding tool 2 has a semiconductor element 1 attached thereto.
A flat surface 2a (suction surface) for suctioning and fixing is formed.

そして、この平面2aの中央部には、真空ポンプ20に
接続された貫通口2bが形成されている。この吸着面2
aの外側には、そこに真空吸着される半導体素子のバン
プ電極形成面に平行な鏡面部2c(光反射面)が形成さ
れている。この鏡面部2Cは貫通口2bの外側に、例え
ば光反射性の良好な材料からなる部材を埋め込み、これ
を研磨することにより形成する。更に、ボンディングツ
ール2は、実装装置に装着される基板3の半導体素子搭
載面3aをXY平面としたとき、このXY平面に対して
直交する方向Zに移動可能であり、更に、このXY平面
に平行で、平面2a上の貫通孔2bの中心を通る平面を
規定するXY両軸に対してそれぞれ回転角θx1θy方
向に調節可能に保持されている。
A through hole 2b connected to the vacuum pump 20 is formed in the center of this plane 2a. This suction surface 2
A mirror surface portion 2c (light reflecting surface) parallel to the bump electrode forming surface of the semiconductor element vacuum-adsorbed thereon is formed on the outside of a. The mirror surface portion 2C is formed by embedding, for example, a member made of a material with good light reflectivity on the outside of the through hole 2b, and polishing the member. Further, when the semiconductor element mounting surface 3a of the substrate 3 mounted on the mounting apparatus is an XY plane, the bonding tool 2 is movable in a direction Z perpendicular to this XY plane, and It is held so as to be adjustable in the rotation angles θx1θy directions with respect to the XY axes that are parallel to each other and define a plane passing through the center of the through hole 2b on the plane 2a.

この半導体素子実装装置の基板保持部4は、基板3をそ
の下面全面で支持し、基板3を所定の位置に保持固定す
る固定機構(図示せず)を備えている。そして、この基
板保持部4の基板保持領域の外側領域であって、上記光
反射面2Cに対応する位置には、平行度検出部5が設け
られている。
The substrate holding section 4 of this semiconductor element mounting apparatus supports the substrate 3 on its entire lower surface and includes a fixing mechanism (not shown) for holding and fixing the substrate 3 in a predetermined position. A parallelism detection section 5 is provided in an area outside the substrate holding area of the substrate holding section 4 and at a position corresponding to the light reflecting surface 2C.

この平行度検出部5は、ボンディングツール2の光反射
面2cにスポット光を照射する、例えば半導体レーザ素
子等のレーザ光照射器6と、このレーザ光照射器6より
離間した位置にこのレーザ光照射器6から照射されたレ
ーザ光の光反射面2cでの反射光を受光し、その受光位
置を特定できる2次元位置検出センサ7、例えば2次元
半導体センサとを備えている。更に、この平行度検出部
5は、2次元位置検出センサ7からの信号に基づき、レ
ーザ光照射器6の設けられている位置及びその照射角度
、更にボンディングツール2の高さ位置に基づいて、ボ
ンディングツール2に搭載されている半導体素子1のバ
ンプ電極形成面1aと基板の素子搭載面3aとの傾斜状
態を算出する傾斜演算算出部7を備えている。
The parallelism detection unit 5 includes a laser beam irradiator 6, such as a semiconductor laser device, which irradiates a spot light onto the light reflecting surface 2c of the bonding tool 2, and a laser beam irradiator 6 at a position spaced apart from the laser beam irradiator 6. It is equipped with a two-dimensional position detection sensor 7, for example, a two-dimensional semiconductor sensor, which can receive the reflected light from the light reflection surface 2c of the laser beam irradiated from the irradiator 6 and specify the position where the light is received. Further, the parallelism detection unit 5 detects the position of the laser beam irradiator 6 based on the signal from the two-dimensional position detection sensor 7, the irradiation angle of the laser beam irradiator 6, and the height position of the bonding tool 2. The bonding tool 2 includes an inclination calculation calculation section 7 that calculates the inclination state between the bump electrode forming surface 1a of the semiconductor element 1 mounted on the bonding tool 2 and the element mounting surface 3a of the substrate.

上記のように構成したことにより、第2図(b)に示す
ように、光反射面2Cが基板の素子搭載面に平行な時は
、レーザ光照射器6から出射したレザ光Aは、光反射面
2Cで反射され、2次元位置検出センサ7の所定の位置
6aに到達する。
With the above configuration, as shown in FIG. 2(b), when the light reflecting surface 2C is parallel to the element mounting surface of the substrate, the laser light A emitted from the laser light irradiator 6 is It is reflected by the reflective surface 2C and reaches a predetermined position 6a of the two-dimensional position detection sensor 7.

方第2図(c)に示すように、光反射面2Cが基板の素
子搭載面に対して傾斜している時は、レーザ光照射器6
から出射したレーザ光Bは、光反射面2cで反射され、
2次元位置検出センサ7の所定の位置からずれた位置6
bに到達する。例えば、レーザ光が基板保持面4aに対
して垂直方向に照射している場合には、第2図(d)に
示すようにボンディングツール2の光反射面2Cかθ0
だけ傾斜すると、θ0が零に近いときは、レーザ光は約
2θ だけ傾斜し、その結果、2次元位置検出センサへ
の入射位置Wは、レーザ光照射器6の位置に於けるボン
ディングツール2の高さをdとすると、2θoxd−W
となる。このことより、d−25mmの時、Wの変位量
を5μmの精度でII定できたとすると、θ 、すなわ
ち光反射面2cの傾斜の精度1/10000radとな
る。この結果から、10mmの距離当たり1μmの精度
で平行度を調節することができる。このように、2次元
位置検出センサ7でのレーザ光の入射位置を検知するこ
とにより、ボンディングツール2に搭載された半導体素
子1のバンプ電極形成面1aの基板3上の素子搭載面3
aに対する傾斜状態を高い精度で知ることができる。ま
た、2次元の位置検出センサ7を使用したことにより、
半導体素子1のバンプ電極形成面1aの傾斜方向も知る
ことができる。
As shown in FIG. 2(c), when the light reflecting surface 2C is inclined with respect to the element mounting surface of the substrate, the laser beam irradiator 6
The laser beam B emitted from is reflected by the light reflecting surface 2c,
Position 6 of two-dimensional position detection sensor 7 shifted from a predetermined position
Reach b. For example, when the laser beam is irradiated perpendicularly to the substrate holding surface 4a, as shown in FIG. 2(d), the light reflecting surface 2C of the bonding tool 2 is
When θ0 is close to zero, the laser beam is tilted by approximately 2θ, and as a result, the incident position W on the two-dimensional position detection sensor is the same as that of the bonding tool 2 at the position of the laser beam irradiator 6. If the height is d, 2θoxd−W
becomes. From this, if the displacement amount of W can be determined with an accuracy of 5 μm when d-25 mm, the accuracy of θ, that is, the inclination of the light reflecting surface 2c, will be 1/10000 rad. From this result, the parallelism can be adjusted with an accuracy of 1 μm per 10 mm distance. In this way, by detecting the incident position of the laser beam with the two-dimensional position detection sensor 7, the element mounting surface 3 on the substrate 3 of the bump electrode formation surface 1a of the semiconductor element 1 mounted on the bonding tool 2 is detected.
The inclination state with respect to a can be known with high accuracy. In addition, by using the two-dimensional position detection sensor 7,
It is also possible to know the direction of inclination of the bump electrode forming surface 1a of the semiconductor element 1.

そして、ボンディングツールが所定の高さにあるときの
2次元位置検出センサ7でのレーザ光の検出位置が所定
の位置にあるとき、ボンディングツール2上の半導体素
子1のバンプ電極形成面1aか、基板保持部4の基板3
の素子搭載面3aに平行となっている。
When the bonding tool is at a predetermined height and the detection position of the laser beam by the two-dimensional position detection sensor 7 is at a predetermined position, the bump electrode forming surface 1a of the semiconductor element 1 on the bonding tool 2 or Substrate 3 of substrate holder 4
It is parallel to the element mounting surface 3a.

次に、上記装置を使用して、半導体素子1を基板3上の
素子搭載面3a上にフェースダウンボンディングする方
法について説明する。
Next, a method of face-down bonding the semiconductor element 1 onto the element mounting surface 3a of the substrate 3 using the above-mentioned apparatus will be described.

マス、バンプ電極が形成されている面の反対面かボンデ
ィングツール2の貫通孔2bを覆うように半導体素子1
をセットし、真空ポンプ20で貫通孔2b内を真空吸引
して、半導体素子1をボンディングツール2の先端部に
吸着固定する。
The semiconductor element 1 is placed so as to cover the surface opposite to the surface on which the mass and bump electrodes are formed or the through hole 2b of the bonding tool 2.
is set, and the inside of the through hole 2b is vacuum-suctioned with the vacuum pump 20, and the semiconductor element 1 is suctioned and fixed to the tip of the bonding tool 2.

次に、ボンディングツール2を−Z力方向移動させてい
く。そして、ボンディングツール2と基板保持部4とが
所定の距離まで近付いたとき、レーザ光照射器6からレ
ーザ光を照射する。しかし、ボンデインツール2か基板
保持部4に対して大きく傾斜しているときは、光反射面
2Cてのレーザ光の反射光は2次元位置検出センサ7内
に入射しない。その場合には、ボンディングツール2の
X軸方向の回転角θX、Y軸方向の回転角θyを調節し
、反射光が2次元位置検出センサ7内に照射されるよう
にする。そして、2次元位置検出センサ7により反射光
の入射位置を検出し、ボンディングツール2上の半導体
素子1のバンプ電極形成面]aの傾斜状態を演算算出す
る。
Next, the bonding tool 2 is moved in the -Z force direction. Then, when the bonding tool 2 and the substrate holder 4 approach to a predetermined distance, a laser beam is irradiated from the laser beam irradiator 6. However, when the bonding tool 2 is greatly inclined with respect to the substrate holding part 4, the reflected light of the laser beam from the light reflecting surface 2C does not enter the two-dimensional position detection sensor 7. In that case, the rotation angle θX in the X-axis direction and the rotation angle θy in the Y-axis direction of the bonding tool 2 are adjusted so that the reflected light is irradiated into the two-dimensional position detection sensor 7. Then, the two-dimensional position detection sensor 7 detects the incident position of the reflected light, and calculates the inclination state of the bump electrode forming surface a of the semiconductor element 1 on the bonding tool 2.

次に、この算出により求められた傾斜状態を補正するよ
うにボンディングツール2のX軸方向の回転角θx、Y
軸方向の回転角θyを調節し、反射光が所定の位置(平
行となったとき、反射光が照射される位置)にくるよう
にする。この状態でボンディングツール2の傾斜を固定
し、ボンディングツール2を−Z方向に移動させてフェ
ースダウンボンディングを行う。
Next, the rotation angle θx, Y of the bonding tool 2 in the
The rotation angle θy in the axial direction is adjusted so that the reflected light is at a predetermined position (the position where the reflected light is irradiated when they are parallel). In this state, the inclination of the bonding tool 2 is fixed, and the bonding tool 2 is moved in the -Z direction to perform face-down bonding.

このようにして、半導体素子1のバンプ電極か形成面1
aと、基板の半導体素子搭載面3aとの平行度を簡単に
かつ精度よく検出でき、この検出結果に基ついて、ボン
ディングツール2の傾斜を調整することにより、高精度
なフェースダウンボンディングを実施することかできる
In this way, the bump electrode of the semiconductor element 1 is formed on the formation surface 1.
a and the semiconductor element mounting surface 3a of the substrate can be easily and accurately detected, and based on this detection result, the inclination of the bonding tool 2 is adjusted to perform highly accurate face-down bonding. I can do it.

本発明は上記実施例に限定されず種々の変形例か考えら
れ得る。
The present invention is not limited to the above embodiments, and various modifications may be made.

具体的には、上記実施例において、ボンディングツール
2の傾斜を調整することかできるステッピングモータ等
の電気制御型の傾斜駆動機構を設け、更に、ボンディン
グツール2をZ方向に移動させる移動機構を電気制御型
にし、これらを制御する、例えば、マイクロコンピュー
タのような電子制御装置を設けておくことにより、自動
的に半導体素子のバンプ電極形成面1aを基板3の素子
搭載面3aに対して平行に調節し、フェースダウンボン
ディングを実施させることができる。具体的には、ます
、電子制御装置を各機構に接続し、平行度検出部5から
の信号に基づく傾斜状態に従って傾斜駆動機構を付勢さ
せ、ボンディングツールの傾斜の調節を行なわせる。そ
してその後、ボンディングツール2の傾斜を固定した後
、移動機構を付勢させ、ボンディングツールを−Z力方
向移動させてフェースダウンボンディングを行うように
構成する。
Specifically, in the above embodiment, an electrically controlled tilt drive mechanism such as a stepping motor that can adjust the tilt of the bonding tool 2 is provided, and a moving mechanism that moves the bonding tool 2 in the Z direction is electrically controlled. By making it a control type and providing an electronic control device such as a microcomputer to control these, the bump electrode forming surface 1a of the semiconductor element can be automatically aligned parallel to the element mounting surface 3a of the substrate 3. Adjustments can be made to perform face-down bonding. Specifically, an electronic control device is connected to each mechanism, and the tilt drive mechanism is energized according to the tilt state based on the signal from the parallelism detection section 5, thereby adjusting the tilt of the bonding tool. Then, after fixing the inclination of the bonding tool 2, the moving mechanism is energized to move the bonding tool in the -Z force direction to perform face-down bonding.

〔発明の効果〕〔Effect of the invention〕

本発明の半導体素子実装装置では、先に説明したように
、基板保持部に設けた平行度位置検出部とボンディング
ツール上の光反射面とにより半導体素子と基板との平行
度を、演算算出し、その算出検知結果から半導体素子と
基板との平行度を精度よく検出しているので、微細なバ
ンプを有する半導体素子においても確実なフェースダウ
ンボンディングを行うことができる。
As described above, in the semiconductor element mounting apparatus of the present invention, the parallelism between the semiconductor element and the substrate is calculated using the parallelism position detection section provided in the substrate holding part and the light reflecting surface on the bonding tool. Since the parallelism between the semiconductor element and the substrate is detected with high accuracy from the calculated detection result, reliable face-down bonding can be performed even on a semiconductor element having minute bumps.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の半導体素子実装装置の構成
を示す図、第2図は第1図に示す基板保持部上の平行度
検出部の配置状態及びこの平行度検出部の検出原理を説
明する図である。 1・・・半導体素子、2・・・ボンディングツール、3
・・基板、4・・・基板保持部、5・・・平行度検知部
、6・・・レーザ光照射器、7・・・2次元位置検出セ
ンサ。
FIG. 1 is a diagram showing the configuration of a semiconductor element mounting apparatus according to an embodiment of the present invention, and FIG. 2 is a diagram showing the arrangement state of the parallelism detection section on the substrate holder shown in FIG. 1 and the detection of this parallelism detection section. It is a figure explaining a principle. 1... Semiconductor element, 2... Bonding tool, 3
... Substrate, 4... Substrate holding section, 5... Parallelism detection section, 6... Laser beam irradiator, 7... Two-dimensional position detection sensor.

Claims (1)

【特許請求の範囲】 1、吸着面と、前記吸着面の外側に設けられ、前記吸着
面に平行な光反射面とを有し、片面にバンプ電極が形成
されている半導体素子を反対面で吸着面に吸着させて保
持するボンディングツールと、 前記半導体素子が実装される基板を保持する保持部材と
、 前記ボンディングツールを前記保持部材に対して移動さ
せる移動機構と、 前記保持部材に設けられ、前記光反射面に対してスポッ
ト光を照射する光照射手段と、 前記保持部材に設けられ、前記光照射手段から出射した
光の前記光反射面での反射光が入射するような位置に配
置され、入射した反射光の入射位置を特定できる光位置
検出手段と、 前記光位置検出手段からの出力に基づいて、前記ボンデ
ィングツールに搭載された半導体素子と前記保持部材に
搭載された基板との平行度を求める平行度検出手段とを
備えた半導体素子実装装置。 2、前記ボンディングツールがその吸着面の基板保持面
に対する傾斜を調整できる傾斜調整機構を含み、前記移
動機構、前記傾斜調整機構を前記平行度検出手段からの
検出結果に基づいて制御する制御手段を更に備えている
請求項1記載の半導体素子実装装置。
[Claims] 1. A semiconductor element having a suction surface and a light reflecting surface provided on the outside of the suction surface and parallel to the suction surface, with a bump electrode formed on one side, on the opposite side. a bonding tool that is sucked and held on a suction surface; a holding member that holds a substrate on which the semiconductor element is mounted; a movement mechanism that moves the bonding tool with respect to the holding member; provided on the holding member; a light irradiation means for irradiating a spot light onto the light reflection surface; and a light irradiation means provided on the holding member and arranged at a position such that the light reflected by the light reflection surface of the light emitted from the light irradiation means is incident. , an optical position detection means capable of identifying the incident position of the incident reflected light; and based on the output from the optical position detection means, parallelism between the semiconductor element mounted on the bonding tool and the substrate mounted on the holding member is determined. A semiconductor element mounting apparatus comprising a parallelism detection means for determining parallelism. 2. The bonding tool includes an inclination adjustment mechanism that can adjust the inclination of the suction surface with respect to the substrate holding surface, and a control means that controls the moving mechanism and the inclination adjustment mechanism based on the detection result from the parallelism detection means. The semiconductor element mounting apparatus according to claim 1, further comprising: a semiconductor element mounting apparatus;
JP19647390A 1990-07-25 1990-07-25 Mounting apparatus of semiconductor element Pending JPH0482243A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19647390A JPH0482243A (en) 1990-07-25 1990-07-25 Mounting apparatus of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19647390A JPH0482243A (en) 1990-07-25 1990-07-25 Mounting apparatus of semiconductor element

Publications (1)

Publication Number Publication Date
JPH0482243A true JPH0482243A (en) 1992-03-16

Family

ID=16358389

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19647390A Pending JPH0482243A (en) 1990-07-25 1990-07-25 Mounting apparatus of semiconductor element

Country Status (1)

Country Link
JP (1) JPH0482243A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012038992A (en) * 2010-08-10 2012-02-23 Hitachi High-Tech Instruments Co Ltd Die bonder and semiconductor device manufacturing method
CN113327879A (en) * 2021-05-14 2021-08-31 长江存储科技有限责任公司 Chuck adjusting device and method and wafer bonding device and method
US20220412733A1 (en) * 2020-07-30 2022-12-29 Shinkawa Ltd. Mounting apparatus and parallelism detection method in mounting apparatus
WO2024134007A1 (en) * 2022-12-21 2024-06-27 Iqm Finland Oy Flip-chip bonding with tilt feedback

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012038992A (en) * 2010-08-10 2012-02-23 Hitachi High-Tech Instruments Co Ltd Die bonder and semiconductor device manufacturing method
US20220412733A1 (en) * 2020-07-30 2022-12-29 Shinkawa Ltd. Mounting apparatus and parallelism detection method in mounting apparatus
US12018936B2 (en) * 2020-07-30 2024-06-25 Shinkawa Ltd. Mounting apparatus and parallelism detection method in mounting apparatus
CN113327879A (en) * 2021-05-14 2021-08-31 长江存储科技有限责任公司 Chuck adjusting device and method and wafer bonding device and method
WO2024134007A1 (en) * 2022-12-21 2024-06-27 Iqm Finland Oy Flip-chip bonding with tilt feedback

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