JPH047819A - Gaas thin film - Google Patents
Gaas thin filmInfo
- Publication number
- JPH047819A JPH047819A JP10929890A JP10929890A JPH047819A JP H047819 A JPH047819 A JP H047819A JP 10929890 A JP10929890 A JP 10929890A JP 10929890 A JP10929890 A JP 10929890A JP H047819 A JPH047819 A JP H047819A
- Authority
- JP
- Japan
- Prior art keywords
- growth
- substrate
- thin film
- gaas
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 19
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 16
- 239000010408 film Substances 0.000 abstract description 14
- 229910052751 metal Inorganic materials 0.000 abstract description 3
- 239000002184 metal Substances 0.000 abstract description 3
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 abstract description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 2
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 2
- 230000007547 defect Effects 0.000 abstract description 2
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 2
- 239000001257 hydrogen Substances 0.000 abstract description 2
- 238000000151 deposition Methods 0.000 abstract 3
- 230000008021 deposition Effects 0.000 abstract 3
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 abstract 1
- 229910000070 arsenic hydride Inorganic materials 0.000 abstract 1
- 238000001816 cooling Methods 0.000 abstract 1
- 238000005336 cracking Methods 0.000 abstract 1
- 239000013078 crystal Substances 0.000 description 7
- 150000001875 compounds Chemical class 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、ＧａＡｓ薄膜に係り、より詳細にはシリコン
基板上に形成されたＧａＡ３化合物半導体単結晶薄膜に
関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a GaAs thin film, and more particularly to a GaA3 compound semiconductor single crystal thin film formed on a silicon substrate.
［従来の技術］
ＧａＡｓ、ＩｎＰ等の化合物半導体はその優れた特徴を
活かして、高性能、高機能デバイスに利用されつつある
。しかし化合物半導体は一般に高価であり、また大面積
の高品質基板結晶を得にくい等の問題点がある。このよ
うな問題点を克服するための試みとして、安価で、良買
、軽量、大面積のシリコンを基板とし、このシリコン基
板上に化合物半導体を積層し、この化合物半導体層にデ
バイスを製造することが行われている。[Prior Art] Compound semiconductors such as GaAs and InP are being utilized for high-performance and highly functional devices by taking advantage of their excellent characteristics. However, compound semiconductors are generally expensive and have problems such as difficulty in obtaining large-area, high-quality substrate crystals. In an attempt to overcome these problems, we have used cheap, well-purchased, lightweight, and large-area silicon as a substrate, stacked compound semiconductors on this silicon substrate, and manufactured devices on this compound semiconductor layer. is being carried out.
しかし、ＳｉとＧａＡｓとの格子定数は４％異なるため
通常のエピタキシャル成長方法では良好な品質のＧａＡ
ｓの単結晶薄膜（例えば転位密度が低い単結晶薄膜）は
得られない。However, since the lattice constants of Si and GaAs differ by 4%, it is difficult to produce good quality GaAs using normal epitaxial growth methods.
A single crystal thin film of s (for example, a single crystal thin film with a low dislocation density) cannot be obtained.
そこで、低温成長と高温成長とからなる二段階成長法が
考案されている。二段階成長法は、格子定数が大きく異
なる基板への単結晶薄膜の成長に広く採用され、良好な
品質を有する単結晶薄膜の成長に成功している。この二
段階成長においては低温成長層の厚みは約１００人が最
適とされていた（Ａｐｐｌ、 Ｐｈｙｓ、 Ｌｅｔｔｅ
ｒ ５１巻 ３６ページ）。Therefore, a two-step growth method consisting of low-temperature growth and high-temperature growth has been devised. The two-step growth method has been widely adopted for growing single-crystal thin films on substrates with significantly different lattice constants, and has been successful in growing single-crystal thin films with good quality. In this two-step growth, the optimal thickness of the low-temperature growth layer was approximately 100 (Appl, Phys, Lette
r Volume 51, Page 36).
しかしながら、Ｓｉ基板上へのＧａＡｓ薄膜の成長にお
いては、基板と成長薄膜との格子定数および熱膨張係数
の差はいかんともし難く、高品質のＧａＡｓ薄膜は得ら
れるには至っていない。However, when growing a GaAs thin film on a Si substrate, the difference in lattice constant and thermal expansion coefficient between the substrate and the grown thin film is difficult to manage, and a high quality GaAs thin film has not yet been obtained.
ＧａＡｓ薄膜の高品質化を図るためには、Ｓｉ基板上に
成長するＧａＡｓ薄膜の成長モードが問題とされる。成
長には２次元的な成長と３次元的な成長がある。３次元
的な成長では基板の随所でＧａＡｓの核が発生し、成長
過程で多くの核から基板に垂直方向および水平な方向に
広がり会合しながら膜が成長していく、それに対し、２
次元的な成長では基板に到達した原子は基板上を動き回
り基板のステップ（未完成の一原子層の端）のキンクに
順次到達しながら基板の水平方向に成長することを繰り
返しながら、全体として成長して行く、この２ｆ！類の
成長モードの差異は、３次元成長ではそれぞれの核から
成長し、会合する際その境界から転位が発生するとされ
ているのに対し、理想的な２次元的な成長では会合する
核が存在しないため転位の発生がないとされている。In order to improve the quality of GaAs thin films, the growth mode of GaAs thin films grown on Si substrates is an issue. Growth includes two-dimensional growth and three-dimensional growth. In three-dimensional growth, GaAs nuclei are generated everywhere on the substrate, and during the growth process, many nuclei spread out to the substrate in the vertical and horizontal directions and the film grows.
In dimensional growth, the atoms that reach the substrate move around on the substrate, successively reaching kinks on the substrate's steps (edges of unfinished single atomic layers), and grow horizontally on the substrate, repeating the process of growing as a whole. Let's go to this 2F! The difference between the growth modes of these types is that in three-dimensional growth, each nucleus grows, and dislocations occur from the boundary when they meet, whereas in ideal two-dimensional growth, there are nuclei that meet. Therefore, it is said that no dislocation occurs.
したがって、２次元的な成長を行わせるための方策が種
々提案されてきた。そのひとつが原子層エピタキシャル
成長法であり、もう−っがＭｌ：Ｆ：。Therefore, various measures have been proposed to achieve two-dimensional growth. One of them is the atomic layer epitaxial growth method, and the other is Ml:F:.
（Ｍｉｇｒａｔｉｏｎ Ｅｎｈａｎｃｅｄ Ｅｐ’１ｔ
ａｘｙ）法である。しかしながら、これらの方法はいず
れも成長速度が極端に遅いこと、原料Ｇａと原料Ａｓと
を交互に供給するため成長装置上特別の工夫が必要なこ
と、さらにこのような努力の割には膜質が改善されない
ことなどの問題点であった。(Migration Enhanced Ep'1t
axy) method. However, in all of these methods, the growth rate is extremely slow, special measures are required for the growth equipment because the raw material Ga and raw material As are supplied alternately, and the film quality is poor in spite of such efforts. The problem was that it was not improved.
［発明が解決しようとする課題］
本発明の目的は、Ｓｉ基板上に簡易に形成可能であり、
クラックや欠陥の無い高品質のＧａＡｓ薄膜を提供する
ことにある。[Problems to be Solved by the Invention] An object of the present invention is to easily form a silicon substrate on a Si substrate;
The objective is to provide a high quality GaAs thin film without cracks or defects.
［課題を解決するための手段］
本発明のＧａＡｓ薄膜は、二段階成長法によりＳｉ基板
上に形成されたＧａＡｓ薄膜において、低温成長層の厚
さが３０００Å以上であることを特徴とする。[Means for Solving the Problems] The GaAs thin film of the present invention is formed on a Si substrate by a two-step growth method, and is characterized in that the thickness of the low-temperature growth layer is 3000 Å or more.
また、二段階成長法によりＳｉ基板上に形成されたＧａ
Ａｓ薄膜において、低温成長層の厚さが３０００Å以上
であり、かつ高温成長層は高温成長において作製した歪
超格子層を含むことを特徴とする。In addition, Ga formed on a Si substrate by a two-step growth method
The As thin film is characterized in that the low temperature growth layer has a thickness of 3000 Å or more, and the high temperature growth layer includes a strained superlattice layer produced by high temperature growth.
なお、低温成長層は３５０〜４５０℃で成長せしめた層
とし、高温成長層は６５０〜７５０℃で成長せしめた層
とすることが好ましい。Note that the low temperature growth layer is preferably a layer grown at 350 to 450°C, and the high temperature growth layer is preferably a layer grown at 650 to 750°C.
［作用］
本発明においては、低温成長の膜厚を３０００Å以上と
することにより、薫た低温成長層をこのように厚くする
と同時にＩ ｎＧａＡｓとＧａＡｓとの歪超格子を導入
することによりＳｉ基板上のＧａＡｓ膜の高品質化を実
現するものである。[Function] In the present invention, by setting the film thickness of low-temperature growth to 3000 Å or more, the fragrant low-temperature growth layer is thickened in this way, and at the same time, a strained superlattice of InGaAs and GaAs is introduced to form a layer on the Si substrate. This will realize high quality GaAs films.
［実施例］
（実施例１）
減圧（７０Ｔｏｒｒ）のＭ ＯＣＶ Ｄ （ｍｅｔａｌ
ｏｒｇａｎｉｃ ｃｈｅｍｉｃａｌ ｖａｐｏｒ ｄｅ
ｐｏｓｉｔｉｏｎ ：有機金属化学気相堆積）法により
ＧａＡｓの成長を行った。以下にその詳細を説明する。[Example] (Example 1) M OCV D (metal
organic chemical vapor
GaAs was grown using a metal organic chemical vapor deposition method. The details will be explained below.
トリクロルエチレンおよびアセトンで単結晶Ｓｉ基板を
脱脂した後、このＳｉ基板をＭＯＣＶＤ装置にセットし
、真空引きをし約１０””Ｔｏｒｒとした。その後、Ｓ
ｉ基板を成長室に移動し、水素雰囲気中で熱処理を行い
表面酸化物の除去を行フた。なお、この熱処理は約９０
０℃で５分間行った。その後二段階成長の低温成長を行
うために４００℃に冷却した。この過程で約６００℃に
温度が下がった時点でＡｓＨ。After degreasing the single crystal Si substrate with trichlorethylene and acetone, the Si substrate was set in an MOCVD apparatus and evacuated to approximately 10'' Torr. After that, S
The i-substrate was moved to a growth chamber and heat treated in a hydrogen atmosphere to remove surface oxide. Note that this heat treatment is approximately 90
The test was carried out at 0°C for 5 minutes. Thereafter, it was cooled to 400° C. to perform two-step low-temperature growth. During this process, when the temperature drops to about 600°C, AsH is formed.
を導入した。このＡｓＨ，の流量は低温成長の時に流す
量と同じとし、４００ｔ：に温度が安定するまで待った
後トリメチルガリウム（ＴＭＧ）を流しはじめて成長を
開始した。低温成長層を成長した後７００℃で約３ミク
ロンＧａＡｓを成長した。第１図に低温成長層の膜厚と
Ｘ線半値幅との関・係を低温成長層を成長するときのＶ
族とＩＨ族の流量比（以下Ｖ −ＩＩＩ比と表す）をパ
ラメータとして示す。Ｖ −ＩＩＩ比を小さくすると低
温成長層は厚さが大きくなフても鏡面状のＧａＡｓ膜が
得られ、それぞれのＶ −ＩＩＩ比で、Ｘ１ｌＡ半値幅
が最小となる低温成長層の厚さが存在する。低温成長層
を５：１のＶ −ＩＩＩ比で約０．７ミクロン成長した
時のエッチピット密度は５Ｘ１０’／ａｍ２となリ、ａ
ｓ−ｇｒｏｗｎ （例えば、後処理としてのアニールを
行なわない結晶成長のままの状態）ではこれまで報告さ
れている中でもっとも低い値となり、膜質の顕著な改善
が明らかとなった。introduced. The flow rate of AsH was the same as the amount flowed during low-temperature growth, and after waiting until the temperature stabilized at 400 t, trimethyl gallium (TMG) was started flowing and growth started. After growing the low temperature growth layer, about 3 microns of GaAs was grown at 700°C. Figure 1 shows the relationship between the film thickness of the low-temperature growth layer and the X-ray half width when growing the low-temperature growth layer.
The flow ratio of the group and IH group (hereinafter referred to as V-III ratio) is shown as a parameter. When the V-III ratio is decreased, the thickness of the low-temperature grown layer becomes large, but a mirror-like GaAs film can be obtained.For each V-III ratio, the thickness of the low-temperature grown layer that minimizes the half-width of X1lA is exist. When the low temperature growth layer is grown to a thickness of approximately 0.7 microns at a V-III ratio of 5:1, the etch pit density is 5 x 10'/am2, a
In the case of s-grown (for example, a state in which crystal growth is maintained without post-treatment annealing), the value was the lowest reported so far, and a remarkable improvement in film quality was revealed.
これは４００℃で成長した低温成長層の膜質が良いほど
７００℃で成長する膜質が良くなることを示している。This indicates that the better the film quality of the low temperature growth layer grown at 400°C, the better the film quality grown at 700°C.
４００℃で成長した低温成長層は７００℃に上昇する過
程でＳｔ基板とＧａＡｓとの熱膨張係数の違いにより圧
縮応力を受ける７この圧縮応力は低温成長層の膜質が良
いほど犬きくなる。この圧縮応力により、ＳｉとＧ ａ
Ａ ｓとの界面で発生した、格子定数の差により発生
したミスフィツト転位の多くが消滅し転位密度が減少す
るものと考えられる。The low-temperature growth layer grown at 400° C. is subjected to compressive stress due to the difference in thermal expansion coefficient between the St substrate and GaAs during the temperature rise to 700° C. 7 This compressive stress becomes more severe as the film quality of the low-temperature growth layer improves. This compressive stress causes Si and Ga
It is considered that many of the misfit dislocations generated at the interface with As due to the difference in lattice constant disappear, and the dislocation density decreases.
（実施例２）
実施例１で述べた５二１のＶ −ＩＩＩ比で低温成長層
を０．７ミクロン成長し、７００℃で１ミクロン成長し
た後、同じ温度でＩｎＧａＡＳとＧａＡｓの歪超格子を
相互に各１０層（各層の厚さはそれぞれ０．１ミクロン
）導入しさらに、ＧａＡｓ層を１ミクロン成長した。こ
うして得たＧａＡｓ層のＸ線半値幅は９０秒、エッチビ
ット。(Example 2) After growing a low-temperature growth layer of 0.7 microns with the V-III ratio of 521 described in Example 1 and growing it to 1 micron at 700°C, strained superlattices of InGaAS and GaAs were grown at the same temperature. 10 layers each (the thickness of each layer is 0.1 micron) were introduced into each other, and a GaAs layer of 1 micron was further grown. The X-ray half width of the GaAs layer thus obtained is 90 seconds, an etch bit.
密度は５ Ｘ １０’ ／ Ｃｍ”となり大幅に膜質が
改善された。The density was 5 x 10'/Cm'', and the film quality was significantly improved.
［発明の効果］
本発明によれば、高品質のＧａＡｓ層腹を提供すること
ができる。[Effects of the Invention] According to the present invention, a high quality GaAs layer can be provided.
第１図は本実施例で得られた結果を示すグラフであり、
縦軸はＧａＡｓｆｆ膜（低温成長を行った後７００℃で
約３ミクロン成長した）のＸ線半値幅、横軸は低温成長
層の厚ざである。FIG. 1 is a graph showing the results obtained in this example,
The vertical axis is the X-ray half-width of the GaAsff film (grown to about 3 microns at 700° C. after low-temperature growth), and the horizontal axis is the thickness of the low-temperature grown layer.
Claims (2)
Ａｓ薄膜において、低温成長層の厚さが３０００Å以上
であることを特徴とするＧａＡｓ薄膜。(1) Ga formed on a Si substrate by a two-step growth method
A GaAs thin film characterized in that the thickness of the low-temperature growth layer is 3000 Å or more.
Ａｓ薄膜において、低温成長層の厚さが３０００Å以上
であり、かつ高温成長層は高温成長において作製した歪
超格子層を含むことを特徴とするＧａＡｓ薄膜。(2) Ga formed on a Si substrate by a two-step growth method
A GaAs thin film characterized in that the low temperature growth layer has a thickness of 3000 Å or more, and the high temperature growth layer includes a strained superlattice layer produced by high temperature growth.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10929890A JPH047819A (en) | 1990-04-25 | 1990-04-25 | Gaas thin film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10929890A JPH047819A (en) | 1990-04-25 | 1990-04-25 | Gaas thin film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH047819A true JPH047819A (en) | 1992-01-13 |
Family
ID=14506638
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10929890A Pending JPH047819A (en) | 1990-04-25 | 1990-04-25 | Gaas thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH047819A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5492860A (en) * | 1992-04-17 | 1996-02-20 | Fujitsu Limited | Method for growing compound semiconductor layers |
| US9724251B2 (en) | 2010-01-20 | 2017-08-08 | The Procter & Gamble Company | Refastenable absorbent article |
-
1990
- 1990-04-25 JP JP10929890A patent/JPH047819A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5492860A (en) * | 1992-04-17 | 1996-02-20 | Fujitsu Limited | Method for growing compound semiconductor layers |
| US9724251B2 (en) | 2010-01-20 | 2017-08-08 | The Procter & Gamble Company | Refastenable absorbent article |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7732306B2 (en) | Methods for producing improved epitaxial materials | |
| JPH01225114A (en) | Manufacture of semiconductor thin-film | |
| JPH0856015A (en) | Formation of semiconductor thin film | |
| EP2602812B1 (en) | High-quality gan high-voltage hfets on silicon | |
| JPH07176485A (en) | Method for depositing ge on substrate and preparation of semiconductor device | |
| US4835116A (en) | Annealing method for III-V deposition | |
| JP2004111848A (en) | Sapphire substrate, epitaxial substrate using it, and its manufacturing method | |
| US6339014B1 (en) | Method for growing nitride compound semiconductor | |
| JP4213896B2 (en) | Manufacturing method of semiconductor substrate | |
| JPH04198095A (en) | Method for growing thin film of compound semiconductor | |
| JP3369304B2 (en) | Method for growing compound semiconductor crystal layer | |
| JPH047819A (en) | Gaas thin film | |
| JP3270945B2 (en) | Heteroepitaxial growth method | |
| JPH02221196A (en) | Formation of thin film of iii-v compound semiconductor | |
| JPS6012775B2 (en) | Method for forming a single crystal semiconductor layer on a foreign substrate | |
| JP2024042982A (en) | Single crystal silicon substrate with nitride semiconductor layer and method for manufacturing single crystal silicon substrate with nitride semiconductor layer | |
| JPH0645249A (en) | Growth method of gaas layer | |
| JPH01179788A (en) | Method for growing iii-v compound semiconductor on si substrate | |
| JP2668236B2 (en) | Semiconductor element manufacturing method | |
| JPH0214513A (en) | Formation of compound semiconductor layer | |
| JPH0536605A (en) | Manufacture of compound semiconductor substrate | |
| JP2023045163A (en) | Method for manufacturing heteroepitaxial wafer | |
| JPS62147722A (en) | Epitaxial growth method | |
| JP2810299B2 (en) | Method for forming compound semiconductor layer | |
| JPH04335519A (en) | Manufacture of semiconductor crystal |