JPH0450793A - Clock accuracy adjusting device - Google Patents

Clock accuracy adjusting device

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Publication number
JPH0450793A
JPH0450793A JP2159820A JP15982090A JPH0450793A JP H0450793 A JPH0450793 A JP H0450793A JP 2159820 A JP2159820 A JP 2159820A JP 15982090 A JP15982090 A JP 15982090A JP H0450793 A JPH0450793 A JP H0450793A
Authority
JP
Japan
Prior art keywords
frequency
division ratio
frequency division
clock
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2159820A
Other languages
Japanese (ja)
Inventor
Kenji Ito
健司 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2159820A priority Critical patent/JPH0450793A/en
Publication of JPH0450793A publication Critical patent/JPH0450793A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To adjust the accuracy of a clock automatically without being limited by the selection of a crystal oscillator by dividing the output signal of an oscillation device at a correction frequency division ratio by a programmable frequency divider whose frequency division ratio is optionally settable. CONSTITUTION:The programmable frequency divider 14 divides the clock 100 of the input oscillation signal at the frequency division ratio written in a nonvolatile memory 15 and outputs the result as a timer interruption signal 200 to a CPU 13 and an external output terminal 18 and a CPU 13 perform time calculation through software with the signal 200. When the clock accuracy of a timer microcomputer 10 is adjusted, an external adjustment device 6 is connected to external terminals 7 and 8 to input the signal 200 and the correction frequency division ratio N0+DELTAN (N0: center frequency division ratio, DELTAN: deviation from N0) is calculated from the frequency measured value and written in a memory 15. The frequency divider 14 corrects the oscillation frequency division of the crystal oscillator 12 by using the correction frequency division ratio N0+DELTAN to obtain the accurate frequency of the signal 200, thereby securing the clock accuracy of the CPU 13.

Description

【発明の詳細な説明】 ;発明の目的〕 (産業上の利用分野) 本発明はタイマ予約機能等の時計機能を有する機器の時
計の精度を調整する時計精度調整装置に関する。
DETAILED DESCRIPTION OF THE INVENTION; OBJECTS OF THE INVENTION (Industrial Field of Application) The present invention relates to a clock accuracy adjusting device for adjusting the accuracy of a clock of a device having a clock function such as a timer reservation function.

(従来の技術) 一般に、時計機能を有する機器では、精度のよい水晶発
振子から発生される信号の周波数を計数して、秒、分、
時間等が表示されるようになっている。このような機器
がタイマ予約機能を有する場合は更に厳しい時計精度が
必要とされるため、前記水晶発振子の発振周波数をトリ
マコンデンサを用いて調整するのが通常である。
(Prior art) Generally, in devices with a clock function, seconds, minutes, and
The time etc. are displayed. If such equipment has a timer reservation function, even stricter clock precision is required, so the oscillation frequency of the crystal oscillator is usually adjusted using a trimmer capacitor.

第2図は上記のような時計の精度を調整するための時計
精度調整装置の従来例を示したブロック図である。10
は水晶発振回路11、分周器12及びCPU13によっ
て時計機能を実現するマイクロコンピュータであり、通
称タイママイコンと呼ばれている。水晶発振口fill
は外付の水晶発振子2とコンデンサ3とトリマコンデン
サ4によって発振して、CPtJ13の動作原クロック
100を発生する。これと同時に、水晶発振回路11か
ら発生されたクロック100は分周器12により分周さ
れてタイマ割込み信号200となる。タイマ割込み信号
200はCP’U13の割込み入力となると共に、外部
出力端子8から外に出力される。
FIG. 2 is a block diagram showing a conventional example of a timepiece precision adjusting device for adjusting the precision of a timepiece as described above. 10
is a microcomputer that realizes a clock function using a crystal oscillation circuit 11, a frequency divider 12, and a CPU 13, and is commonly called a timer microcomputer. crystal oscillation port fill
is oscillated by an external crystal oscillator 2, a capacitor 3, and a trimmer capacitor 4 to generate the operating clock 100 of the CPtJ13. At the same time, the clock 100 generated from the crystal oscillation circuit 11 is frequency-divided by the frequency divider 12 to become a timer interrupt signal 200. The timer interrupt signal 200 serves as an interrupt input to the CP'U 13 and is also output from the external output terminal 8.

CPU13はタイマ割込み信号200が到来する毎に、
ソフト的に時計計数を行って秒、分、時間などの時刻情
報を得ることにより時計機能を実現する。
Each time the timer interrupt signal 200 arrives, the CPU 13
The clock function is realized by performing clock counting using software to obtain time information such as seconds, minutes, and hours.

ところで分周器12はCPU1Bのソフト分周の負担を
軽くするために必要であり、分周器12及びCPU1B
のソフト分周の簡素化のなめ、水晶発振子2の発振周波
数f。は、IH7(つまり1秒)の2 倍に選ばれてい
る。例えば、foを4 M Hz付近とすると、n=2
2として、fo”222=4.194304MH7に選
択される。
By the way, the frequency divider 12 is necessary to lighten the burden of software frequency division on the CPU 1B, and the frequency divider 12 and the CPU 1B
By simplifying the soft frequency division, the oscillation frequency f of the crystal oscillator 2. is selected to be twice that of IH7 (that is, 1 second). For example, if fo is around 4 MHz, n=2
2, fo''222=4.194304MH7 is selected.

ところで、上記第2図のタイママイコン10の時計の精
度の調整は、外部出力端子8から出力されたタイマ割込
み信号200を図示されないカウンタに接続し、その周
波数fBがf□/21mは分周器6の段数)になるよう
にトリマコンデンサ4を調整することにより行われる。
By the way, the accuracy of the clock of the timer microcomputer 10 shown in FIG. This is done by adjusting the trimmer capacitor 4 so that the number of stages is 6).

しかしながら、上記従来時計精度調整装置では、高価な
トリマコンデンサ4が必要で自動調整に適していないた
め、調整に手間がかかると共にCPtJ13の動作原ク
ロック100を2nに選ぶ必要があるため水晶発振子2
の選択が制限される等の欠点を有していた。
However, the above-mentioned conventional timepiece accuracy adjustment device requires an expensive trimmer capacitor 4 and is not suitable for automatic adjustment, which requires time and effort for adjustment.In addition, it is necessary to select 2n as the operating source clock 100 of the CPtJ13, so the crystal oscillator 2
However, there were disadvantages such as limited selection of options.

(発明が解決しようとする課題) 従来のタイママイコン10の時計精度は上記の如くトリ
マコンデンサ4の容量を変化させて調整されるため、高
価なトリマコンデンサ4が必要であると共に、前記トリ
マコンデンサ4は手動調整されるため、自動調整に適し
ていないという欠点があった。しかも、CPU13の動
作原クロック100を2nH2に選択する必要があり、
水晶発振子2の選択に制限が生じるという欠点があった
(Problems to be Solved by the Invention) Since the clock accuracy of the conventional timer microcomputer 10 is adjusted by changing the capacitance of the trimmer capacitor 4 as described above, an expensive trimmer capacitor 4 is required, and the trimmer capacitor 4 Since it is manually adjusted, it has the disadvantage that it is not suitable for automatic adjustment. Moreover, it is necessary to select 2nH2 as the operating source clock 100 of the CPU 13.
There is a drawback that there are restrictions on the selection of the crystal oscillator 2.

そこで本発明は上記の欠点を除去するもので、時計の精
度を自動調整することができる時計精度調整装置を提供
することを目的としている。
SUMMARY OF THE INVENTION Therefore, the present invention aims to eliminate the above-mentioned drawbacks and provides a timepiece accuracy adjusting device that can automatically adjust the accuracy of a timepiece.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明の時計精度調整装置は、水晶発振装置と、分周比
を記憶するメモリと、前記発振装置からの出力信号を前
記メモリから読み出した分周比に従って分周する分周比
を任意に設定可能なプログラマブル分周器と、前記分周
器からの出力信号をカウントして計時を行う計時手段と
、所定の分周比に基づく前記分周器からの出力信号の周
波数を計測する計測手段と、この計測手段で計測された
周波数と所定の周波数とのずれを補正するために、前記
計測値に基づき前記分周器の補正分周比を求める演算手
段と、この演算手段で求められた補正分周比を前記メモ
リに書き込む書込手段とを具備した構成を有する。
(Means for Solving the Problems) A clock accuracy adjustment device of the present invention includes a crystal oscillation device, a memory that stores a frequency division ratio, and an output signal from the oscillation device that is divided according to the frequency division ratio read from the memory. a programmable frequency divider that can arbitrarily set a frequency division ratio; a timer that measures time by counting output signals from the frequency divider; and an output from the frequency divider based on a predetermined frequency division ratio. a measuring means for measuring the frequency of a signal; and a calculating means for calculating a corrected frequency division ratio of the frequency divider based on the measured value in order to correct a deviation between the frequency measured by the measuring means and a predetermined frequency. , and writing means for writing the corrected frequency division ratio obtained by the calculation means into the memory.

(作用) 本発明の時計精度調整装置において、メモリは分周比を
記憶する。プログラマブル分周器は発振装置からの出力
信号を前記メモリから読み出した分周比に従って分周す
る分周比を任意に設定可能としている。計時手段は前記
分周比器からの出力信号をカウントして計時を行う。計
測手段は所定の分周比に基づく前記分周比器からの出力
信号の周波数を計測する。演算手段は前記計測手段で計
測された周波数と所定の周波数とのずれを補正するため
に、前記計測値に基づき前記分周器の補正分周比を求め
る。書込手段は前記演算手段で求められた補正分周比を
前記メモリに書き込む。
(Function) In the timepiece precision adjusting device of the present invention, the memory stores the frequency division ratio. The programmable frequency divider can arbitrarily set a frequency division ratio for dividing the output signal from the oscillation device according to the frequency division ratio read from the memory. The timer measures the time by counting the output signal from the frequency divider. The measuring means measures the frequency of the output signal from the frequency divider based on a predetermined frequency division ratio. The calculating means calculates a corrected frequency division ratio of the frequency divider based on the measured value in order to correct a deviation between the frequency measured by the measuring means and a predetermined frequency. The writing means writes the corrected frequency division ratio obtained by the calculation means into the memory.

(実施例) 以下、本発明の一実施例を従来例と同一部には同一符号
を付して図面を参照して説明する。第1図は本発明の時
計精度調整装置の一実施例を示したブロック図である。
(Example) Hereinafter, an example of the present invention will be described with reference to the drawings, in which the same parts as those of the conventional example are denoted by the same reference numerals. FIG. 1 is a block diagram showing an embodiment of the timepiece precision adjusting device of the present invention.

10は時計機能を有するタイママイコーンで、水晶発振
回路11、CPU13、プログラマブル分周器14、不
揮発性メモリ15を有している。2は水晶発振回路11
に外付けされた水晶発振子、3.5は水晶発振回路11
に外付けされたコンデンサ、6はプログラマブル分周器
14からの周波数と本来の周波数とのずれを補正するべ
く、プログラマブル分周器14に対する補正分周比を算
出して、これを不揮発性メモリ1ヲに書込む外部調整装
置、7は外部入力端子、8は外部出力端子である。
10 is a timer microcone having a clock function, and includes a crystal oscillation circuit 11, a CPU 13, a programmable frequency divider 14, and a nonvolatile memory 15. 2 is a crystal oscillation circuit 11
3.5 is the crystal oscillator circuit 11 attached externally to the crystal oscillator.
A capacitor 6 externally connected to the programmable frequency divider 14 calculates a correction division ratio for the programmable frequency divider 14 in order to correct the deviation between the frequency from the programmable frequency divider 14 and the original frequency, and stores this in the non-volatile memory 1. 7 is an external input terminal, and 8 is an external output terminal.

ここで、外部調整装置6は計測手段、演算手段及び書込
み手段とを構成している。外部調整装置6と不揮発性メ
モリ15は分周比設定手段を構成している。
Here, the external adjustment device 6 constitutes a measuring means, a calculating means, and a writing means. The external adjustment device 6 and the nonvolatile memory 15 constitute frequency division ratio setting means.

次に本実施例の動作について説明する。水晶発振子2は
所定の周波数で発振し、水晶発振回路11はこの発振信
号をクロック100として、CPU13及びプログラマ
ブル分周器14に出力する。CPU13は入力されるク
ロック100に基づいて動作し、プログラマブル分周器
14は入力されるクロック100を不揮発性メモリ15
に書き込まれた分周比にて分周してタイマ割り込み信号
200を作成して、これをCPU13及び外部出力端子
8に出力する。CPU13はタイマ割り込み信号200
が到来すると、ソフト的に時計計算を行う。
Next, the operation of this embodiment will be explained. The crystal oscillator 2 oscillates at a predetermined frequency, and the crystal oscillation circuit 11 outputs this oscillation signal to the CPU 13 and the programmable frequency divider 14 as a clock 100. The CPU 13 operates based on the input clock 100, and the programmable frequency divider 14 stores the input clock 100 in the nonvolatile memory 15.
The timer interrupt signal 200 is generated by dividing the frequency using the frequency division ratio written in the , and outputs it to the CPU 13 and the external output terminal 8. CPU 13 uses timer interrupt signal 200
When the clock arrives, the software calculates the clock.

ここで、タイママイコン10の時計精度を調整する場合
は、外部調整装置6を外部端子7.8に接続することに
より行う。外部調整装置6はタイマ割り込み信号200
を取込んでこの周波数を計測し、この計測値に基づいて
後述する如き補正分周比を算出し、この補正分周比を不
揮発性メモリ15に書込むことにより、前記時計精度の
調整を行なう。
Here, when adjusting the clock accuracy of the timer microcomputer 10, it is done by connecting the external adjustment device 6 to the external terminal 7.8. External adjustment device 6 receives timer interrupt signal 200
The clock accuracy is adjusted by taking in the frequency and measuring this frequency, calculating a corrected frequency dividing ratio as described later based on this measured value, and writing this corrected frequency dividing ratio into the non-volatile memory 15. .

ここで、前記水晶発振子2の発振周波数で。を4 M 
Hzにした場合の前記外部調製装置6の詳細動作につい
て説明する。即ち、lppmステップの周波数調整を行
う場合、プログラマブル分周器14の分周比としては、
1/1000000だけあれば良く、20ビツトのカウ
ンタ(22°=1048576>が必要になる。ここで
クロック100の周波数foがlppmずれて、4.0
00004MH2になった場合、プログラマブル分周器
14にて1000001分周することにより、割込み信
号200は真値である4H7にすることができる。
Here, at the oscillation frequency of the crystal oscillator 2. 4M
The detailed operation of the external preparation device 6 in the case of Hz will be explained. That is, when performing frequency adjustment in lppm steps, the frequency division ratio of the programmable frequency divider 14 is as follows.
Only 1/1000000 is required, and a 20-bit counter (22° = 1048576> is required.The frequency fo of the clock 100 is shifted by 1ppm, and 4.0
If it becomes 00004MH2, the programmable frequency divider 14 divides the frequency by 1000001, thereby making the interrupt signal 200 the true value 4H7.

このことを−最北すれば、クロック100の周波数のセ
ンタ値をfo、このセンタ値からのずれ量をΔf、時計
として正確な割込み信号の周波数をf、プログラマブル
分周器14のセンタ分周比をN。、この分周比がNoの
時の割込み信号の測定周波数をfとし、且つ、ずれを補
正するための分周比のセンタ分周比NoからのずれをΔ
Nとすれば以下の関係が成立する。
If we take this to the northernmost point, fo is the center value of the frequency of the clock 100, Δf is the amount of deviation from this center value, f is the frequency of the interrupt signal that is accurate as a clock, and is the center frequency division ratio of the programmable frequency divider 14. N. , let f be the measured frequency of the interrupt signal when this frequency division ratio is No, and let Δ be the deviation of the frequency division ratio from the center frequency division ratio No to correct the deviation.
If N, the following relationship holds true.

N□ ”fQ /fi       (1)f”(fO
+Δf)/No(2) fl=(fo+Δf>/ (NO士ΔN>  (3)(
2)、(3)式より、ΔNを求めれば、ΔN=N o 
(f / f 1  1 >        (4)よ
って、(1)よりNOは既知であるので、(4)式より
補正分周比のうちのずれΔNが求まる。従って、分周補
正比NOすΔN=No(f/f1〉として求まる。外部
調整装置6はこうして求めた補正分周比を不揮発性メモ
リ15に書き込むことにより、プログラマブル分周器1
4の分周比をNo+ΔNとして、水晶発振子2の発振周
波数ずれを補正してタイマ割込み信号の周波数をfxと
することにより、CPU13における時計精度を確保す
る。
N□ “fQ /fi (1)f” (fO
+Δf)/No(2) fl=(fo+Δf>/ (NO ΔN> (3)(
2) and (3), if we calculate ΔN, we get ΔN=N o
(f / f 1 1 > (4) Therefore, since NO is known from (1), the deviation ΔN of the correction frequency division ratio can be found from equation (4). Therefore, the frequency division correction ratio NO ΔN= It is determined as No(f/f1).The external adjustment device 6 writes the corrected frequency division ratio determined in this way into the nonvolatile memory 15, thereby adjusting the programmable frequency divider 1.
By setting the frequency division ratio of 4 to No+ΔN, correcting the oscillation frequency shift of the crystal oscillator 2, and setting the frequency of the timer interrupt signal to fx, clock accuracy in the CPU 13 is ensured.

本実施例によれば、水晶発振子2の発振周波数ずれをプ
ログラマブル分周器14の分周比を調整することによっ
て補正し、この補正にてCPU13が得る時刻情報の精
度を確保するようにしているため、前記分周比の補正を
デジタル化することができ、時計精度の調整を自動的に
行うことができる。従って、前記水晶発振子2の発振周
波数ずれを補正するトリマコンデンサを省略できると共
に、水晶発振子2の発振周波数が限定されないため、タ
イムマイコン10を安価に制作することができる。尚、
本実施例では不揮発性メモリ15をタイムマイコン10
内に取り込んでいるが、これは外付けとしても良い。又
、工場出荷時に上述した調整を行う場合は、予め不揮発
性メモリ15に上述したセンタ分周比N。を書き込んで
おけば便利である 〔発明の効果〕 以上記述した如(本発明の時計精度調整装置によれば、
時計の精度を自動調整することができる。
According to this embodiment, the oscillation frequency deviation of the crystal oscillator 2 is corrected by adjusting the frequency division ratio of the programmable frequency divider 14, and this correction ensures the accuracy of the time information obtained by the CPU 13. Therefore, the correction of the frequency division ratio can be digitized, and the clock precision can be adjusted automatically. Therefore, the trimmer capacitor for correcting the oscillation frequency deviation of the crystal oscillator 2 can be omitted, and since the oscillation frequency of the crystal oscillator 2 is not limited, the time microcomputer 10 can be manufactured at low cost. still,
In this embodiment, the nonvolatile memory 15 is used as the time microcomputer 10.
Although it is installed internally, it can also be installed externally. In addition, when performing the above-mentioned adjustment at the time of factory shipment, the above-mentioned center frequency division ratio N is stored in the nonvolatile memory 15 in advance. [Effects of the Invention] As described above (according to the clock accuracy adjustment device of the present invention,
The accuracy of the clock can be automatically adjusted.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の時計精度調整装置の一実施例を示した
ブロック図、第2図は従来の時計精度調整装置の一例を
示したブロック図である。 2・・・水晶発振子 3.5・・・コンデンサ 6・・・外部調整装置 10・・・タイママイコン 11・・・水晶発振回路 13・・・CPU 14・・・プログラマブル分周器 15・・・不揮発性メモリ 代理人 弁理士 則 近 憲 佑 同  宇治 弘
FIG. 1 is a block diagram showing an embodiment of a timepiece precision adjusting device of the present invention, and FIG. 2 is a block diagram showing an example of a conventional timepiece precision adjusting device. 2...Crystal oscillator 3.5...Capacitor 6...External adjustment device 10...Timer microcomputer 11...Crystal oscillation circuit 13...CPU 14...Programmable frequency divider 15...・Non-volatile memory agent Patent attorney Nori Chika Yudo Hiroshi Uji

Claims (1)

【特許請求の範囲】[Claims] 水晶発振装置と、分周比を記憶するメモリと、前記発振
装置からの出力信号を前記メモリから読み出した分周比
に従って分周する分周比を任意に設定可能なプログラマ
ブル分周器と、前記分周器からの出力信号をカウントし
て計時を行う計時手段と、所定の分周比に基づく前記分
周器からの出力信号の周波数を計測する計測手段と、こ
の計測手段で計測された周波数と所定の周波数とのずれ
を補正するために、前記計測値に基づき前記分周器の補
正分周比を求める演算手段と、この演算手段で求められ
た補正分周比を前記メモリに書き込む書込手段とを具備
したことを特徴とする時計精度調整装置。
a crystal oscillator, a memory that stores a frequency division ratio, a programmable frequency divider that can arbitrarily set a frequency division ratio that divides the output signal from the oscillation device according to the frequency division ratio read from the memory; A clock means for measuring time by counting the output signal from the frequency divider, a measuring means for measuring the frequency of the output signal from the frequency divider based on a predetermined frequency division ratio, and a frequency measured by the measuring means. and a calculation means for calculating a correction frequency division ratio of the frequency divider based on the measured value, and a writing device for writing the correction frequency division ratio obtained by the calculation means into the memory. A timepiece precision adjusting device characterized by comprising: a means for adjusting a timepiece;
JP2159820A 1990-06-20 1990-06-20 Clock accuracy adjusting device Pending JPH0450793A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2159820A JPH0450793A (en) 1990-06-20 1990-06-20 Clock accuracy adjusting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2159820A JPH0450793A (en) 1990-06-20 1990-06-20 Clock accuracy adjusting device

Publications (1)

Publication Number Publication Date
JPH0450793A true JPH0450793A (en) 1992-02-19

Family

ID=15701967

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2159820A Pending JPH0450793A (en) 1990-06-20 1990-06-20 Clock accuracy adjusting device

Country Status (1)

Country Link
JP (1) JPH0450793A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481507A (en) * 1993-11-29 1996-01-02 Mitsubishi Denki Kabushiki Kaisha Electronic timekeeping device reduced adjustment data storage requirement
JP2007026028A (en) * 2005-07-15 2007-02-01 Fujitsu Ten Ltd Device for detecting abnormality in microcomputer
JP2016071413A (en) * 2014-09-26 2016-05-09 京セラドキュメントソリューションズ株式会社 Clock adjustment mechanism

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481507A (en) * 1993-11-29 1996-01-02 Mitsubishi Denki Kabushiki Kaisha Electronic timekeeping device reduced adjustment data storage requirement
JP2007026028A (en) * 2005-07-15 2007-02-01 Fujitsu Ten Ltd Device for detecting abnormality in microcomputer
JP2016071413A (en) * 2014-09-26 2016-05-09 京セラドキュメントソリューションズ株式会社 Clock adjustment mechanism

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