JPH0449739A - Optical receiver - Google Patents
Optical receiverInfo
- Publication number
- JPH0449739A JPH0449739A JP2160804A JP16080490A JPH0449739A JP H0449739 A JPH0449739 A JP H0449739A JP 2160804 A JP2160804 A JP 2160804A JP 16080490 A JP16080490 A JP 16080490A JP H0449739 A JPH0449739 A JP H0449739A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- voltage
- output
- circuit
- phase side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003287 optical effect Effects 0.000 title claims abstract description 23
- 238000000605 extraction Methods 0.000 claims description 12
- 239000003990 capacitor Substances 0.000 claims description 4
- 239000000284 extract Substances 0.000 claims description 4
- 230000001360 synchronised effect Effects 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000003321 amplification Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 235000009508 confectionery Nutrition 0.000 description 1
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- Dc Digital Transmission (AREA)
- Optical Communication System (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は光受信装置に係シ、特に閾値発生回路を備え
た光受信装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an optical receiver, and particularly to an optical receiver equipped with a threshold value generation circuit.
従来の光受信装置の一例を第３図に示し説明する。 An example of a conventional optical receiver is shown in FIG. 3 and will be described.
この第３図は、例えば、文献（Ｋｏｕｉｅｈ、ｔ Ｂｅ
ｇｓｍｌ らによる「１７０ Ｍｂｉ ｔ／ｓ Ｔ−Ｒ
ＩｎｔｅｇｒａｔｅｄＯｐｔｉｃｍｌ Ｃｏｎｃｅｐｔ
ｓ Ｊ ＦＯＣ／ＬＡＮ’ ８７＆ＭＦＯＣ−ＷＥｓｔ
、Ｐ１６７〜Ｐ１７０）に示された従来の光受信装置で
あり、図において、１は受信光信号を電気信号に変換す
る受光素子、２１ｄ受信光信号に対応した正相信号と逆
相信号のオフセット電圧を一定に保持する機能を有する
受光増幅回路、３はこの受光増幅回路２の出力より受信
信号のビットレートに対応したタイミング成分を抽出す
るタイミング抽出回路、４はこのタイミング抽出回路３
の出力を用いて受信信号の同期再生を行う識別回路、５
はこの識別回路４の闇値入力電圧端子（Ｖｔｈｘ）、６
はタイミング抽出回路３の闇値入力電圧端子（Ｖｔｈｚ
）、１は信号が送出される出方端子、８Ｆｉクロツクが
送出される出力端子である。そして、ＤＴ、ＤＴはデー
タ（信号）を示し、ＣＬＫはクロックを示す。This FIG. 3 can be seen, for example, in the literature
“170 Mbit/s T-R” by gsml et al.
Integrated Opticml Concept
s J FOC/LAN'87&MFOC-WEst
, P167 to P170), in which 1 is a light receiving element that converts a received optical signal into an electrical signal, 21d is an offset between a normal phase signal and a negative phase signal corresponding to the received optical signal. 3 is a timing extraction circuit that extracts a timing component corresponding to the bit rate of the received signal from the output of the light reception amplifier circuit 2; 4 is this timing extraction circuit 3;
an identification circuit that performs synchronous reproduction of a received signal using the output of the 5
is the dark value input voltage terminal (Vthx) of this identification circuit 4, 6
is the dark value input voltage terminal (Vthz
), 1 is an output terminal from which a signal is sent, and an output terminal from which an 8Fi clock is sent. Further, DT and DT indicate data (signal), and CLK indicates a clock.
つぎにこの第３図に示す光受信装置の動作について説明
する。Next, the operation of the optical receiver shown in FIG. 3 will be explained.
まず、受信され九九信号は受光素子１によシミ流に変換
され、その電気信号は受光増幅回路２によシ出力ＤＣオ
フセット電圧と出力電圧振幅の揃った正相信号と逆相信
号が差動出力される。First, the received multiplication table signal is converted into a smudge signal by the light receiving element 1, and the electrical signal is output by the light receiving amplifier circuit 2. is output.
つぎに、識別回路４とタイミング抽出回路３へはそれぞ
れ受光増幅回路２の出力信号の正相と逆相が片側ずつ入
力され、識別回路４の閾値電圧入力端子５とタイミング
抽出回路３の闇値電圧入力端子６には外部から闇値電圧
が与えられる。そして、入力された信号よシクロツクの
抽出と信号の識別再生を行い、出力端子７には信号が、
出力端子８にはクロックがそれぞれ出力される。Next, the positive phase and negative phase of the output signal of the light receiving amplification circuit 2 are input to the identification circuit 4 and the timing extraction circuit 3 on one side, respectively, and the threshold voltage input terminal 5 of the identification circuit 4 and the dark value of the timing extraction circuit 3 A dark value voltage is applied to the voltage input terminal 6 from the outside. Then, the signal is extracted from the input signal, the signal is identified and reproduced, and the signal is output to the output terminal 7.
A clock is output to each output terminal 8.
上記のような従来の光受信装置では、識別回路やタイミ
ング抽出回路に入力する信号のＤＣレベルが温度や電源
電圧変動に対し変化し外部から与え次間値電圧が最適値
とはなシ得ず受信特性が劣化するという課題があった。In conventional optical receivers such as those described above, the DC level of the signal input to the identification circuit and timing extraction circuit changes due to changes in temperature and power supply voltage, and the voltage applied from the outside may not be the optimal value. There was a problem that reception characteristics deteriorated.
また、製造の度に外部閾値の調整が必要で生産コストが
高くなるという課題があった。In addition, there is a problem in that the external threshold value needs to be adjusted every time it is manufactured, which increases production costs.
この発明はかかる課題を解決するためになされたもので
、温度や電源電圧変動に影響されない良好な閾値電圧が
得られ、また、製造の度に外部閾値の調整が必要無く生
産コストの低い光受信装置を得ることを目的とする。This invention was made in order to solve these problems, and it is possible to obtain a good threshold voltage that is not affected by temperature or power supply voltage fluctuations, and it also eliminates the need for external threshold adjustment every time it is manufactured, resulting in a low production cost. The purpose is to obtain equipment.
この発明による光受信装置は、受信光信号を電気信号に
変換する受光素子と、受信光信号に対応した正相信号と
逆相信号のオフセット電圧を一定に保持する機能を有す
る受光増幅回路と、この受光増幅回路の出力よシ受信信
号のピットレートに対応したタイミング成分を抽出する
タイミング抽出回路と、このタイミング抽出回路の出力
を用いて受信信号の同期再生を行う識別回路よ多構成さ
れた光受信装置において、上記受光増幅回路出力の正相
信号と逆相信号の間に直列に接続した第１の抵抗と第２
の抵抗とこの第１および第２の抵抗の接続点からＧＮＤ
Ｋ接続した容量とからなる閾値発生回路を備えたもの
である。An optical receiver according to the present invention includes: a light receiving element that converts a received optical signal into an electrical signal; a light receiving amplifier circuit having a function of maintaining constant offset voltages of a normal phase signal and a negative phase signal corresponding to the received optical signal; The output of this light receiving amplifier circuit is composed of a timing extraction circuit that extracts a timing component corresponding to the pit rate of the received signal, and an identification circuit that performs synchronous reproduction of the received signal using the output of this timing extraction circuit. In the receiving device, a first resistor and a second resistor are connected in series between the positive phase signal and the negative phase signal of the output of the light receiving amplifier circuit.
GND from the connection point between the resistor and the first and second resistors.
It is equipped with a threshold generation circuit consisting of K-connected capacitors.
この発明においては、受信光信号に対応した正相信号と
逆相信号のオフセット電圧を一定に保持する機能を有す
る受光増幅回路の出力の正相信号と逆相信号の間に、闇
値発生回路を備えることによって、温度や電源電圧変動
に影響されない良好なｒＡｆＥ電圧が得られる。In this invention, the dark value generation circuit is connected between the positive phase signal and the negative phase signal of the output of the light receiving amplifier circuit, which has the function of keeping constant the offset voltage of the positive phase signal and negative phase signal corresponding to the received optical signal. By providing this, a good rAfE voltage that is not affected by temperature or power supply voltage fluctuations can be obtained.
以下、図面に基づきこの発明の実施例を詳細に説明する
。Hereinafter, embodiments of the present invention will be described in detail based on the drawings.
第１図はこの発明による光受信装置の一実施例を示す構
成図である。FIG. 1 is a block diagram showing an embodiment of an optical receiver according to the present invention.
この第１図において第３図と同一符号のものは相当部分
を示し、９は受光増幅回路２の出力の正相信号と逆相信
号の間に直列に接続した抵抗１０゜１１とこの抵抗１０
．１１の接続点からＧＮＤ Ｋ接続した容量１２とから
なる闇値発生回路である。In FIG. 1, the same reference numerals as in FIG.
．． This is a dark value generation circuit consisting of a capacitor 12 connected to GND K from a connection point of 11.
Ｖ ｒ ｅ ｆは抵抗１０．１１の接続点より発生する
電圧を示す。V r e f indicates the voltage generated at the connection point of the resistor 10.11.
第２図は第１図における受光増幅回路の出力電圧波形を
示す説明図であシ、図において、１３は正相側出力信号
、１４は逆相側出力信号である。FIG. 2 is an explanatory diagram showing the output voltage waveform of the light receiving and amplifying circuit in FIG. 1. In the figure, 13 is a positive phase side output signal, and 14 is a negative phase side output signal.
つぎに第１図に示す実施例の動作を第２図を参照して説
明する。Next, the operation of the embodiment shown in FIG. 1 will be explained with reference to FIG. 2.
まず、受信された光信号は受光素子１によシミ流に変換
され、その電気信号は受光増幅回路２により、出力ＤＣ
オフセット電圧と第２図に示す電圧振幅（）Ｖ）のそろ
った正相側出力信号１３と逆相側出力信号１４が差動出
力される。ここでこの出力信号の正相側直流電圧を■】
、逆相側直流電圧をｖ２ とし、正相側出力信号１３の
ローレベルをｖ２．逆相側出力信号１４のハイレベルを
ＶＨ（＝ＶＩ、）とする。また、信号のマーク率をｍと
すると、出力信号の正相側直流電圧ｖ１はＶ Ｉ＝Ｖ（
、、＋ ｍ・Δ■、逆相逆相側直流電圧上２２ ＝ＶＬ
＋（１ｍ ） ・ＡＶ テ表わされる。First, the received optical signal is converted into a spot signal by the light receiving element 1, and the electric signal is converted to an output DC by the light receiving amplifier circuit 2.
A positive phase side output signal 13 and a negative phase side output signal 14 having the same offset voltage and voltage amplitude (V) shown in FIG. 2 are differentially output. Here, the positive phase side DC voltage of this output signal is
, the negative phase side DC voltage is v2, and the low level of the positive phase side output signal 13 is v2. The high level of the negative phase side output signal 14 is assumed to be VH (=VI, ). Also, if the mark rate of the signal is m, the positive phase side DC voltage v1 of the output signal is V I = V (
,, + m・Δ■, reverse phase reverse phase side DC voltage upper 22 = VL
+(1m) ・AV Te is expressed.
そして、闇値発生回路９を構成する抵抗１０と抵抗１１
を同値の抵抗とすると、抵抗１０１１の接続点よυ発生
する電圧ｖｒｅｆは正相側直流電圧ｖ１と逆相側直流電
圧ｖ２の和の１／２となるからＶｒ、ｆ ＝ＶＬ＋ １
／２・ΔＶとなり、常に出力振幅の半分の最適闇値電圧
が発生する。A resistor 10 and a resistor 11 forming the dark value generating circuit 9
Assuming that are resistances of the same value, the voltage vref generated at the connection point of the resistor 1011 is 1/2 of the sum of the positive-phase side DC voltage v1 and the negative-phase side DC voltage v2, so Vr, f = VL+ 1
/2·ΔV, and the optimal dark value voltage, which is half the output amplitude, is always generated.
つぎに、このように発生した闇値電圧は上記と同じよう
に識別回路４とタイミング抽出回路３Ｋ。Next, the dark value voltage generated in this way is sent to the identification circuit 4 and the timing extraction circuit 3K in the same way as above.
受光増幅回路２の差動出力信号の片側と闇値電圧がそれ
ぞれ渡される。そして、タイミング抽出回路３にてクロ
ックが抽出され、識別回路４にて抽出したクロックによ
り受信信号の識別再生を行い、出力端子１には信号が、
出力端子８にはクロックがそれぞれ出力される。One side of the differential output signal of the light receiving amplifier circuit 2 and the dark value voltage are respectively passed. Then, the timing extraction circuit 3 extracts the clock, and the identification circuit 4 identifies and reproduces the received signal using the extracted clock.
A clock is output to each output terminal 8.
この発明は以上説明したとおり、受信光信号に対応した
正相信号と逆相信号のオフセット電圧を一足に保持する
機能を有する受光増幅回路の出力の正相信号と逆相信号
の間に挿入した２つの抵抗と１つの容量による閾値発生
回路を備えることによって、温度や電源電圧変動に影響
されない良好な閾値電圧が得られる効果がある。また、
製造の度ｔこ外部ｌ値の調整が必要無く生産コストの低
い光受信装置を実現することができる効果がある。As explained above, this invention has a function of keeping the offset voltage of the normal phase signal and the negative phase signal corresponding to the received optical signal at one level. By providing a threshold generation circuit with two resistors and one capacitor, it is possible to obtain a good threshold voltage that is not affected by temperature or power supply voltage fluctuations. Also,
This has the effect that it is possible to realize an optical receiving device with low production cost since there is no need to adjust the external l value every time it is manufactured.
第１図はこの発明による光受信装置の一実施例を示す構
成図、第２図は第１図における受光増幅回路の出力電圧
波形を示す説明図、第３図は従来の光受信装置の一例を
示すブロック図である。
１・・・・受光菓子、２−＃−−受光増幅回路、３会争
−・タイミング抽出回路、４・・−〇識別回路、９・愉
・・閾値発生回路、１０．１１−・・・抵抗、１２・曹
・・容量。FIG. 1 is a block diagram showing an embodiment of an optical receiving device according to the present invention, FIG. 2 is an explanatory diagram showing an output voltage waveform of the light receiving amplification circuit in FIG. 1, and FIG. 3 is an example of a conventional optical receiving device. FIG. 1...Light receiving confectionery, 2-#--Light receiving amplification circuit, 3--timing extraction circuit, 4...-〇 identification circuit, 9--Threshold generation circuit, 10.11--... Resistance, 12. Capacity.
Claims (1)
光信号に対応した正相信号と逆相信号のオフセット電圧
を一定に保持する機能を有する受光増幅回路と、この受
光増幅回路の出力より受信信号のビットレートに対応し
たタイミング成分を抽出するタイミング抽出回路と、こ
のタイミング抽出回路の出力を用いて受信信号の同期再
生を行う識別回路より構成された光受信装置において、
前記受光増幅回路出力の正相信号と逆相信号の間に直列
に接続した第１の抵抗と第２の抵抗とこの第１および第
２の抵抗の接続点からＧＮＤに接続した容量とからなる
閾値発生回路を備えたことを特徴とする光受信装置。A light-receiving element that converts a received optical signal into an electrical signal, a light-receiving amplifying circuit having a function of keeping constant the offset voltage of a positive-phase signal and a negative-phase signal corresponding to the received optical signal, and an output of this light-receiving amplifying circuit. In an optical receiver comprising a timing extraction circuit that extracts a timing component corresponding to the bit rate of a received signal, and an identification circuit that performs synchronous reproduction of the received signal using the output of this timing extraction circuit,
It consists of a first resistor and a second resistor connected in series between the positive phase signal and the negative phase signal of the output of the light receiving amplifier circuit, and a capacitor connected to GND from the connection point of the first and second resistors. An optical receiver comprising a threshold generation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2160804A JPH0449739A (en) | 1990-06-18 | 1990-06-18 | Optical receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2160804A JPH0449739A (en) | 1990-06-18 | 1990-06-18 | Optical receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0449739A true JPH0449739A (en) | 1992-02-19 |
Family
ID=15722802
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2160804A Pending JPH0449739A (en) | 1990-06-18 | 1990-06-18 | Optical receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0449739A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5804997A (en) * | 1995-09-19 | 1998-09-08 | Fujitsu Limited | Current-to-voltage converting device and light receiver |
| US6335815B1 (en) | 1997-05-16 | 2002-01-01 | Nec Corporation | Optical receiver |
-
1990
- 1990-06-18 JP JP2160804A patent/JPH0449739A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5804997A (en) * | 1995-09-19 | 1998-09-08 | Fujitsu Limited | Current-to-voltage converting device and light receiver |
| US5880610A (en) * | 1995-09-19 | 1999-03-09 | Fujitsu Limited | Current-to-voltage converting device and light receiver |
| US6335815B1 (en) | 1997-05-16 | 2002-01-01 | Nec Corporation | Optical receiver |
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