JPH0436110Y2 - - Google Patents
Info
- Publication number
- JPH0436110Y2 JPH0436110Y2 JP10109386U JP10109386U JPH0436110Y2 JP H0436110 Y2 JPH0436110 Y2 JP H0436110Y2 JP 10109386 U JP10109386 U JP 10109386U JP 10109386 U JP10109386 U JP 10109386U JP H0436110 Y2 JPH0436110 Y2 JP H0436110Y2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- relay terminal
- lead
- auxiliary relay
- internal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 31
- 239000000758 substrate Substances 0.000 claims description 4
- 239000012212 insulator Substances 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims 1
- 238000001465 metallisation Methods 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910017309 Mo—Mn Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Description
【考案の詳細な説明】
〔概要〕
リードを側壁に設けた収納容器を持ち、収納容
器側壁の内側に補助中継端子板を設け、この補助
中継端子板は絶縁基板上に配線パターンとボンデ
イングランドを備え、半導体素子と内部端子の配
線にこの補助中継端子板を用いる半導体装置。[Detailed description of the invention] [Summary] The device has a storage container with leads provided on the side wall, and an auxiliary relay terminal board is provided inside the side wall of the storage container. A semiconductor device that uses this auxiliary relay terminal board for wiring between semiconductor elements and internal terminals.
本考案は収納容器内の半導体素子と内部端子の
配線に用いる補助中継端子板を持つ半導体装置に
関するものである。
The present invention relates to a semiconductor device having an auxiliary relay terminal board used for wiring a semiconductor element in a storage container and internal terminals.
収納容器（以下ケースと略称する）内の半導体
素子と内部端子（以下内部リードと略称する）を
配線接続する半導体装置において、プリント配線
基板への外部端子（以下外部リードと略称する）
の接続方法変更に伴うケース内の配線仕様変更に
より、ケース内配線距離が非常に長くなり配線間
に接触の恐れがあつて配線の信頼性を確保できな
くなる場合や、極端な場合には配線が不可能とな
ることも考えられる。 In a semiconductor device in which a semiconductor element in a storage container (hereinafter referred to as a case) and an internal terminal (hereinafter referred to as an internal lead) are wire-connected, an external terminal (hereinafter referred to as an external lead) to a printed wiring board is connected by wiring.
Due to a change in the wiring specifications inside the case due to a change in the connection method, the wiring distance inside the case becomes extremely long, and there is a risk of contact between the wires, making it impossible to ensure the reliability of the wiring, or in extreme cases, the wiring may become impossible. It may even be impossible.
以上のような場合にも信頼性を確保できる配線
を可能にする手段の考案が要求されている。 There is a need to devise means to enable wiring that can ensure reliability even in the above cases.
従来の半導体装置のケース内の仕様通りの配線
は、第５図に示すように半導体素子２と内部リー
ド３ａの距離を短くして、半導体素子２と内部リ
ード３ａの配線接続が最も良好な形状で行えるよ
うに設計されており、その配線については充分な
信頼性が確保されていた。
As shown in FIG. 5, wiring according to specifications in the case of a conventional semiconductor device is achieved by shortening the distance between the semiconductor element 2 and the internal leads 3a to achieve the best wiring connection between the semiconductor element 2 and the internal leads 3a. The wiring was designed to be able to be used in a variety of ways, and its wiring was sufficiently reliable.
しかし、半導体装置の使用分野の拡大に伴つ
て、搭載されるプリント配線基板の種類も多くな
り、半導体装置の内部配線を設計仕様とは異なる
配線接続にすることが必要になつてきた。 However, as the field of use of semiconductor devices expands, the types of printed wiring boards on which they are mounted also increase, and it has become necessary to connect the internal wiring of semiconductor devices in a manner different from the design specifications.
このような場合には第４図に示すように、ケー
ス内配線距離が非常に長くなつて配線が困難にな
り、その配線については充分な信頼性が確保でき
なくなつている。 In such a case, as shown in FIG. 4, the wiring distance inside the case becomes very long, making wiring difficult, and it is no longer possible to ensure sufficient reliability for the wiring.
又、極端な仕様変更の場合には配線が不可能に
なることも考えられる。 Furthermore, in the case of extreme changes in specifications, wiring may become impossible.
以上説明の従来の半導体装置の内部配線で問題
となるのは、使用状況の変化に伴いケース内配線
距離が非常に長くなることである。
A problem with the internal wiring of the conventional semiconductor device described above is that the wiring distance within the case becomes extremely long as the usage conditions change.
本考案は以上のような状況から半導体装置の内
部配線の信頼性を確保し、配線不可能となる事態
を防止する簡単且つ安価に調達できる補助中継端
子板を設けた半導体装置の提供を目的としたもの
である。 The purpose of this invention is to provide a semiconductor device equipped with an auxiliary relay terminal board that can be easily and inexpensively procured to ensure the reliability of the internal wiring of the semiconductor device and prevent wiring failure. This is what I did.
上記問題点は、リードを絶縁物を介して設けた
ケースの側壁の内側に、配線パターンとボンデイ
ングランドを備えた補助中継端子板を設けた本考
案の半導体装置によつて解決される。
The above problem is solved by the semiconductor device of the present invention, which includes an auxiliary relay terminal board provided with a wiring pattern and a bonding land inside the side wall of a case where leads are provided via an insulator.
即ち本考案においては、半導体素子の内部リー
ド間の配線距離の、変更仕様と設計仕様との差に
相当する長さの配線パターンを補助中継端子板に
設け、その両端にボンデイングランドを銀ろう付
けしているので、配線は半導体素子とボンデイン
グランドの間及びボンデイングランドと内部リー
ドの間のみを行なつて、半導体素子と内部リード
間の遠距離空中配線の替わりとすることができ、
ケース内の配線の信頼性を向上させると同時に配
線不可能となる事態を防止することが可能とな
る。
That is, in the present invention, a wiring pattern with a length corresponding to the difference in wiring distance between the internal leads of the semiconductor element between the changed specification and the design specification is provided on the auxiliary relay terminal board, and bonding lands are silver-brazed to both ends of the wiring pattern. Therefore, wiring can be performed only between the semiconductor element and the bonding land and between the bonding land and the internal leads, instead of long-distance aerial wiring between the semiconductor element and the internal leads,
This makes it possible to improve the reliability of wiring within the case and at the same time prevent a situation where wiring becomes impossible.
以下第１図〜第３図について本考案の一実施例
を説明する。
An embodiment of the present invention will be described below with reference to FIGS. 1 to 3.
第１図において、ケース１内には半導体素子２
を載置した素子取付台５が収納されており、側壁
には複数の電極取り出し用のリード３が、ケース
１と絶縁して設けられている。 In FIG. 1, there is a semiconductor element 2 inside the case 1.
An element mounting base 5 on which a component is mounted is housed therein, and a plurality of leads 3 for taking out electrodes are provided on the side wall insulated from the case 1.
本実施例では、補助中継端子板４は底面に設け
られており、その構造の詳細は第３図に図示する
ものである。 In this embodiment, the auxiliary relay terminal plate 4 is provided on the bottom surface, and the details of its structure are shown in FIG. 3.
第３図において、絶縁基板４ａは絶縁部材例え
ばアルミナよりなり、配線パターン４ｂは導電性
部材例えばMo−Mnが絶縁基板４ａ上にメタラ
イズされている。ボンデイングランド４ｃは導電
性部材例えば銅よりなり配線パターン５ｂに銀ろ
う付けされている。補助中継端子板４全体はニツ
ケルめつき下地の上に金めつきが施されている。 In FIG. 3, the insulating substrate 4a is made of an insulating material such as alumina, and the wiring pattern 4b is made of a conductive material such as Mo-Mn metallized on the insulating substrate 4a. The bonding land 4c is made of a conductive material, such as copper, and is soldered with silver to the wiring pattern 5b. The entire auxiliary relay terminal board 4 is gold-plated on a nickel-plated base.
第１図、第２図においては、設計仕様では半導
体素子２とリードNo.７の内部リード３ａに配線し
ていたものを、変更仕様では半導体素子２とリー
ドNo.４の内部リード３ａに配線しなければならな
くなつたので、ケース内に第３図に示す補助中継
端子板４を設けて、半導体素子２とボンデイング
ランド４ｃのＢ及びボンデイングランド４ｃのＣ
とリードNo.４の内部リード３ａを配線している。 In Figures 1 and 2, the wiring was wired to the semiconductor element 2 and the internal lead 3a of lead No. 7 in the design specification, but the wiring was wired to the semiconductor element 2 and the internal lead 3a of lead No. 4 in the modified specification. Since it became necessary to do so, an auxiliary relay terminal board 4 shown in FIG.
and the internal lead 3a of lead No. 4 is wired.
同様に、半導体素子２とリードNo.８の内部リー
ド３ａに配線していたものを、変更仕様では半導
体素子２とリードNo.３の内部リード３ａに配線し
なければならなくなつたので、半導体素子２の電
極取り出し部の位置を変更して半導体素子２とボ
ンデイングランド４ｃのＡ及びボンデイングラン
ド４ｃのＤとリードNo.３の内部リード３ａを配線
している。 Similarly, the wiring that used to be wired to the internal lead 3a of semiconductor element 2 and lead No. 8 now needs to be wired to the internal lead 3a of semiconductor element 2 and lead No. 3 in the revised specification. By changing the position of the electrode extraction portion of the element 2, wiring is made between the semiconductor element 2, A of the bonding land 4c, D of the bonding land 4c, and the internal lead 3a of lead No. 3.
以上のように従来の構造のままでは、遠距離空
中配線を余儀なくされていたのを、極めて短距離
の配線にて代替することが可能となる。 As described above, the conventional structure that required long-distance aerial wiring can now be replaced with extremely short-distance wiring.
なお、半導体素子２と内部リード３ａの間に回
路部品を接続することが必要な場合においても、
補助中継端子板４の配線パターン５ｂを二分割し
てその間に接続することが可能である。 Note that even if it is necessary to connect circuit components between the semiconductor element 2 and the internal leads 3a,
It is possible to divide the wiring pattern 5b of the auxiliary relay terminal board 4 into two parts and connect between them.
以上説明したように本考案によれば極めて簡単
な構造の補助中継端子板をケース内に設けること
により、内部の配線距離を著しく短縮することが
可能となるので、従来技術では配線不可能な変更
仕様に対しても対応することができるので、実用
的効果は著しい。
As explained above, according to the present invention, by providing an auxiliary relay terminal board with an extremely simple structure inside the case, it is possible to significantly shorten the internal wiring distance, making changes that would not be possible with conventional technology. Since it is possible to comply with specifications, the practical effects are significant.
第１図は本考案による一実施例を示す半導体装
置の斜視図、第２図は本考案による一実施例を示
す半導体装置の平面図、第３図は本考案の補助中
継端子板の構造を示す図、第４図は変更仕様に対
する従来技術を示す半導体装置の平面図、第５図
は設計仕様による半導体装置の平面図、である。
図において、１はケース、２は半導体素子、３
はリード、３ａは内部リード、３ｂは外部リー
ド、４は補助中継端子、４ａは絶縁基板、４ｂは
配線パターン、４ｃはボンデイングランド、５は
素子取付台、である。
FIG. 1 is a perspective view of a semiconductor device showing an embodiment of the invention, FIG. 2 is a plan view of a semiconductor device showing an embodiment of the invention, and FIG. 3 shows the structure of an auxiliary relay terminal board of the invention. FIG. 4 is a plan view of a semiconductor device showing a conventional technique for modified specifications, and FIG. 5 is a plan view of a semiconductor device according to design specifications. In the figure, 1 is a case, 2 is a semiconductor element, and 3 is a case.
3a is a lead, 3a is an internal lead, 3b is an external lead, 4 is an auxiliary relay terminal, 4a is an insulating substrate, 4b is a wiring pattern, 4c is a bonding ground, and 5 is an element mounting base.
Claims (1)
器１の該側壁の内側に補助中継端子板４を設け、
該補助中継端子板４は絶縁基板４ａ上に配線パタ
ーン４ｂをメタライズ加工により形成し、ボンデ
イングランド４ｃを該配線パターン４ｂ上に銀ろ
う付けしたことを特徴とする半導体装置。 An auxiliary relay terminal board 4 is provided inside the side wall of the storage container 1 in which the lead 3 is provided on the side wall via an insulator,
The auxiliary relay terminal board 4 is a semiconductor device characterized in that a wiring pattern 4b is formed on an insulating substrate 4a by metallization processing, and a bonding land 4c is silver soldered onto the wiring pattern 4b.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10109386U JPH0436110Y2 (en) | 1986-06-30 | 1986-06-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10109386U JPH0436110Y2 (en) | 1986-06-30 | 1986-06-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS636735U JPS636735U (en) | 1988-01-18 |
| JPH0436110Y2 true JPH0436110Y2 (en) | 1992-08-26 |
Family
ID=30971522
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10109386U Expired JPH0436110Y2 (en) | 1986-06-30 | 1986-06-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0436110Y2 (en) |
-
1986
- 1986-06-30 JP JP10109386U patent/JPH0436110Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS636735U (en) | 1988-01-18 |
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