JPH04311125A - Transmission line failure detecting circuit - Google Patents
Transmission line failure detecting circuitInfo
- Publication number
- JPH04311125A JPH04311125A JP3076630A JP7663091A JPH04311125A JP H04311125 A JPH04311125 A JP H04311125A JP 3076630 A JP3076630 A JP 3076630A JP 7663091 A JP7663091 A JP 7663091A JP H04311125 A JPH04311125 A JP H04311125A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- output
- transmission line
- master station
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 title claims abstract description 48
- 238000001514 detection method Methods 0.000 claims description 17
- 230000005856 abnormality Effects 0.000 claims description 3
- 230000002159 abnormal effect Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
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- Small-Scale Networks (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】この発明は、親局と複数の子局が
ループ状の伝送路で接続される伝送システムの伝送路故
障検出回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission path failure detection circuit for a transmission system in which a master station and a plurality of slave stations are connected through a looped transmission path.
【０００２】0002
【従来の技術】親局と複数の子局間でデータ伝送を行う
のに、図５に示すように、親局１と子局２−１、２−２
、…、２−ｎを伝送路３でループ状に接続し、親局１の
送信部１Ｔ から信号を送り、その信号が各子局２−１
、…、２−ｎを経て親局１の受信部１Ｒに戻るようにし
た伝送システムがある。この種の伝送システムにおいて
、伝送路３の故障を検出するのに、従来ＮＯＴ回路４と
、ＡＮＤ回路５と、ＯＲ回路６とタイマ７で伝送路故障
検出回路８を構成し、伝送路３に故障が生じた場合、故
障表示灯９を点灯するようにしている。この伝送路故障
検出回路８で伝送路３が正常な場合、送信部１Ｔ から
発信された信号が発信中に、受信部１Ｒ にエコーバッ
ク信号が戻ってくる。そのため、ＮＯＴ回路４の出力は
「Ｌ」（ロー）となり、ＡＮＤ回路５の出力も「Ｌ」と
なり、ＯＲ回路６の出力は送信部１Ｔ からの信号発信
中のみ「Ｈ」となり、したがってタイマ７はタイムアッ
プせず、故障表示灯は点灯しない。しかし、伝送中途で
信号遅延が生じ、送信部１Ｔ からの発信信号が消滅し
て、ある時間が経過してエコーバック信号が戻ると、発
信信号が消滅する直前はＮＯＴ回路４の出力「Ｈ」、Ｏ
Ｒ回路６の出力「Ｈ」でＡＮＤ回路５の出力も「Ｈ」で
あり、この状態はエコーバック信号が戻るまで続く。し
たがって、ＯＲ回路６の出力は送信部１Ｔ からの信号
発信からエコーバック信号が戻るまでの時間“Ｈ”とな
り、タイマ７がタイムアップし、故障表示灯９が点灯す
る。2. Description of the Related Art In order to transmit data between a master station and a plurality of slave stations, as shown in FIG.
,..., 2-n are connected in a loop through the transmission line 3, and a signal is sent from the transmitter 1T of the master station 1, and the signal is transmitted to each slave station 2-1.
There is a transmission system in which the signal returns to the receiving section 1R of the master station 1 via 2-n. In this type of transmission system, in order to detect a failure in the transmission line 3, a conventional transmission line failure detection circuit 8 is configured with a NOT circuit 4, an AND circuit 5, an OR circuit 6, and a timer 7. When a failure occurs, a failure indicator light 9 is turned on. If the transmission path failure detection circuit 8 determines that the transmission path 3 is normal, an echo back signal is returned to the receiving section 1R while the signal transmitted from the transmitting section 1T is being transmitted. Therefore, the output of the NOT circuit 4 becomes "L" (low), the output of the AND circuit 5 also becomes "L", and the output of the OR circuit 6 becomes "H" only while the signal is being transmitted from the transmitter 1T. The timer does not time up and the fault indicator light does not light up. However, when a signal delay occurs during transmission, the transmitted signal from the transmitter 1T disappears, and the echo back signal returns after a certain period of time, the output of the NOT circuit 4 becomes "H" immediately before the transmitted signal disappears. , O
The output of the R circuit 6 is "H" and the output of the AND circuit 5 is also "H", and this state continues until the echo back signal returns. Therefore, the output of the OR circuit 6 becomes "H" during the period from the signal transmission from the transmitter 1T until the echo back signal returns, the timer 7 times out, and the failure indicator light 9 lights up.
【０００３】この他、故障検出を行うのに、ソフトウェ
アで発信データとエコーバック信号や子局からの応答信
号を確認チェックする方式が実施されている。[0003] In addition, in order to detect a failure, a system has been implemented in which software is used to confirm and check transmitted data, an echo back signal, and a response signal from a slave station.
【０００４】0004
【発明が解決しようとする課題】上記した、従来の伝送
路故障検出回路は、タイマ回路を必要とし、回路が複雑
になるという問題がある。また、ソフトウェアで故障検
出を行う方法は、通信プログラムに負担がかかるという
問題がある。この発明は、上記問題点に着目してなされ
たものであって、簡単な構成で伝送路の故障を検出し得
る伝送路故障検出回路を提供することを目的としている
。SUMMARY OF THE INVENTION The conventional transmission path failure detection circuit described above requires a timer circuit, which results in a complicated circuit. Furthermore, the method of detecting failures using software has the problem of placing a burden on the communication program. The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a transmission line failure detection circuit that can detect a transmission line failure with a simple configuration.
【０００５】[0005]
【課題を解決するための手段及び作用】この発明の伝送
路故障検出回路は、親局と複数の子局がループ状の伝送
路で接続され、親局から発信された信号が各子局を経由
して親局に戻る伝送システムにおいて、親局から発信さ
れた信号が所定の第１の論理状態である間に、各子局を
経由して戻ってきた信号を受信した場合に正常とし、第
１の論理状態である間に、信号が戻って来ない場合に異
常と判断する論理回路を備えている。[Means and operations for solving the problems] In the transmission line failure detection circuit of the present invention, a master station and a plurality of slave stations are connected by a loop-shaped transmission line, and a signal transmitted from the master station is transmitted to each slave station. In a transmission system that returns to a master station via the master station, it is considered normal if a signal returned via each slave station is received while the signal transmitted from the master station is in a predetermined first logical state, A logic circuit is provided that determines that there is an abnormality if a signal does not come back while the device is in the first logic state.
【０００６】この伝送路故障検出回路では、伝送路が正
常な場合、親局の送信部より発信された信号が第１の論
理状態（例えば「Ｈ」）である時に、各子局を経て親局
の受信部に戻ってくる信号も「Ｈ」で戻るので正常と判
定される。しかし、伝送路が異常で信号遅延が生じると
、発信部からの信号が「Ｈ」の間に受信部へ「Ｈ」の信
号が戻らないので、また伝送路が断線している場合も、
発信部からの信号が「Ｈ」の間に、受信部への「Ｈ」の
信号が戻らないので、それぞれ異常と判定される。In this transmission path failure detection circuit, when the transmission path is normal and the signal transmitted from the transmitter of the master station is in the first logic state (for example, "H"), the signal is transmitted to the parent station via each slave station. Since the signal that returns to the receiving section of the station also returns as "H", it is determined to be normal. However, if the transmission path is abnormal and a signal delay occurs, the "H" signal will not be returned to the receiving section while the signal from the transmitting section is "H".
Since the "H" signal is not returned to the receiving section while the signal from the transmitting section is "H", each is determined to be abnormal.
【０００７】[0007]
【実施例】以下、実施例により、この発明をさらに詳細
に説明する。図１は、この発明の一実施例を示す伝送シ
ステムのブロック図である。図１において、親局１と複
数個の子局２−１、２−２、…、２−ｎが伝送路３によ
ってループ状に接続され、親局１の送信部１Ｔ から信
号が発信され、伝送路３を介して、各子局２−１、２−
２、…、２−ｎを経て、親局１の受信部１Ｒ に信号が
戻って来るようになっている。また、親局１の送信部１
Ｔ の出力端と受信部１Ｒ の入力端間に、伝送路故障
検出回路１０が接続されている。この基本構成は図５の
ものと特に変わるところはない。[Examples] The present invention will be explained in more detail with reference to Examples below. FIG. 1 is a block diagram of a transmission system showing one embodiment of the present invention. In FIG. 1, a master station 1 and a plurality of slave stations 2-1, 2-2, . Each slave station 2-1, 2-
2, . . . , 2-n, the signal returns to the receiving section 1R of the master station 1. In addition, the transmitter 1 of the master station 1
A transmission path failure detection circuit 10 is connected between the output end of T and the input end of the receiver 1R. This basic configuration is not particularly different from that shown in FIG.
【０００８】伝送路故障検出回路１０は、送信部１Ｔ
の出力端に入力端が接続されるＮＯＴ回路１１と、受信
部１Ｒ の入力端に入力端が接続されるＮＯＴ回路１２
と、送信部１Ｔ の出力端に入力の一端が接続されるＯ
Ｒ回路１３と、前記ＮＯＴ回路１１とＮＯＴ回路１２の
出力を両入力に受けるＯＲ回路１４と、ＯＲ回路１３と
ＯＲ回路１４の出力を両入力に受け、出力端がＯＲ回路
１３の入力の他端に接続されるＡＮＤ回路１５と、ＮＯ
Ｔ回路１１、ＮＯＴ回路１２及びＯＲ回路１３の出力を
それぞれ個別の入力端に受けるＡＮＤ回路１６と、この
ＡＮＤ回路１６の出力を受けて点灯する故障表示灯１７
とから構成されている。[0008] The transmission path failure detection circuit 10 includes a transmitting section 1T.
A NOT circuit 11 whose input terminal is connected to the output terminal of the receiving section 1R, and a NOT circuit 12 whose input terminal is connected to the input terminal of the receiving section 1R.
, and one end of the input is connected to the output end of the transmitter 1T.
An R circuit 13, an OR circuit 14 which receives the outputs of the NOT circuit 11 and NOT circuit 12 at both inputs, and an OR circuit 14 which receives the outputs of the OR circuit 13 and the OR circuit 14 at both inputs, and has an output terminal other than the input of the OR circuit 13. AND circuit 15 connected to the end and NO
An AND circuit 16 that receives the outputs of the T circuit 11, NOT circuit 12, and OR circuit 13 at separate input terminals, and a failure indicator light 17 that lights up in response to the output of the AND circuit 16.
It is composed of.
【０００９】次に、上記伝送路故障検出回路の動作につ
いて説明する。先ず伝送路３が正常な場合の動作を、図
２に示す波形タイムチャートを参照して説明する。送信
部１Ｔ より伝送路３に図２のａに示す信号が発信され
ると、この信号の立上りＡに応じてＯＲ回路１３の出力
も図２のｃに示すように「Ｈ」に立上り、受信部１Ｒ
へは若干の時間遅れをもって図２のｂに示すように、エ
コーバック信号が到達する。発信信号の「Ｈ」出力でＮ
ＯＴ回路１１の出力が「Ｌ」、エコーバック信号の到達
でＮＯＴ回路１２の出力が「Ｌ」となり、この時点Ｃで
ＯＲ回路１４の出力も図２のｅに示すように「Ｌ」とな
る。
発信信号ａが「Ｈ」である間、ＮＯＴ回路１１の出力は
「Ｌ」であり、したがって、この間はＡＮＤ回路１６の
出力は「Ｌ」である。次に、発信信号ａが「Ｌ」になる
と、それまでＯＲ回路１４の出力も「Ｌ」であるため、
ＯＲ回路１３の出力Ｃも「Ｌ」となり、ＡＮＤ回路１６
の出力ｄがやはり「Ｌ」のままであり、故障表示灯１７
は点灯しない。Next, the operation of the transmission path failure detection circuit will be explained. First, the operation when the transmission line 3 is normal will be explained with reference to the waveform time chart shown in FIG. When the signal shown in a of FIG. 2 is transmitted from the transmitter 1T to the transmission path 3, the output of the OR circuit 13 also rises to "H" as shown in c of FIG. 2 in response to the rising edge A of this signal, and the reception Part 1R
As shown in FIG. 2B, the echo back signal arrives with a slight time delay. N at "H" output of outgoing signal
The output of the OT circuit 11 becomes "L", and when the echo back signal arrives, the output of the NOT circuit 12 becomes "L", and at this point C, the output of the OR circuit 14 also becomes "L" as shown in e of FIG. . While the transmission signal a is "H", the output of the NOT circuit 11 is "L", and therefore, the output of the AND circuit 16 is "L" during this period. Next, when the transmission signal a becomes "L", the output of the OR circuit 14 is also "L" until then, so
The output C of the OR circuit 13 also becomes "L", and the AND circuit 16
The output d remains at "L", and the fault indicator light 17
does not light up.
【００１０】次に伝送路３で信号遅延が生じた場合の動
作を図３に示す波形タイムチャートを参照して説明する
。送信部１Ｔ より伝送路３に図３のａに示す信号が発
信されると、この信号の立上がりＡに応じてＯＲ回路１
３の出力も図３のｃに示すように「Ｈ」に立上がる。し
かし、遅延のため信号ａが「Ｌ」になるまでに、受信部
１Ｒ の入力端にエコーバック信号（図３のｂ参照）が
現れず、信号ａが「Ｌ」になると、ＮＯＴ回路１１の出
力も「Ｈ」となり、さらにそれまではＯＲ回路１３の出
力ｃと、ＮＯＴ回路１２を介してのＯＲ回路１４の出力
とも「Ｈ」であり、ＡＮＤ回路１５の出力も「Ｈ」で保
持され、この「Ｈ」がＯＲ回路１３を介してＡＮＤ回路
１６に入力されるので、信号ａの立下がり時ＡでＡＮＤ
回路１６の三入力が「Ｈ」で揃い、ＡＮＤ回路１６の出
力ｄが「Ｈ」となる。この「Ｈ」により故障表示灯１７
が点灯する。この後も、ＯＲ回路１４の出力ｅは「Ｈ」
のため、ＯＲ回路１３の出力ｃは自己保持され、故障表
示は継続される。Next, the operation when a signal delay occurs in the transmission line 3 will be explained with reference to the waveform time chart shown in FIG. When the signal shown in a of FIG. 3 is transmitted from the transmitter 1T to the transmission line 3, the OR circuit 1
The output of No. 3 also rises to "H" as shown in FIG. 3C. However, due to the delay, the echo back signal (see b in FIG. 3) does not appear at the input terminal of the receiving section 1R by the time the signal a becomes "L", and when the signal a becomes "L", the NOT circuit 11 The output also becomes "H", and until then, the output c of the OR circuit 13 and the output of the OR circuit 14 via the NOT circuit 12 are both "H", and the output of the AND circuit 15 is also held at "H". , this "H" is input to the AND circuit 16 via the OR circuit 13, so when the signal a falls, it is ANDed at A.
The three inputs of the circuit 16 are all "H", and the output d of the AND circuit 16 is "H". This "H" causes the fault indicator light 17 to
lights up. Even after this, the output e of the OR circuit 14 is "H"
Therefore, the output c of the OR circuit 13 is self-maintained, and the failure indication continues.
【００１１】伝送路３が断線した場合は、図４に示すよ
うに、送信部１Ｔ から発信信号ａが出力されても、エ
コーバック信号は戻って来ない（図４のｂ）。したがっ
てこの場合、信号遅延時と同様に、信号ａが「Ｈ」から
「Ｌ」に落ちる時点ＢでＡＮＤ回路１６の出力ｄが「Ｈ
」となり、故障表示灯１７が点灯する。If the transmission line 3 is disconnected, as shown in FIG. 4, even if the transmission signal a is output from the transmitter 1T, no echo back signal is returned (b in FIG. 4). Therefore, in this case, as in the case of signal delay, the output d of the AND circuit 16 becomes "H" at time B when the signal a falls from "H" to "L".
” and the failure indicator light 17 lights up.
【００１２】0012
【発明の効果】この発明によれば、親局から発信された
信号が所定の第１の論理状態である間に、各子局を経由
して戻って来た信号を受信した場合に正常とし、第１の
論理状態である間に、信号が戻って来ない場合に異常と
判断する論理回路を備えているので、タイマ回路を使用
するものではなく、またソフトウェアによる故障検出で
ないから、簡単な構成で、また通信ソフトウェアに負担
をかけることなく、故障検出を行うことができる。また
、子局から送信する（応答信号）とエコーバック信号が
判別しやすく、特に二重化ループでは有効である。[Effects of the Invention] According to the present invention, when a signal returned via each slave station is received while the signal transmitted from the master station is in a predetermined first logic state, it is determined to be normal. , it is equipped with a logic circuit that determines that it is abnormal if the signal does not return while in the first logic state, so it does not use a timer circuit, and it is not a failure detection by software, so it is easy to use. Failure detection can be performed without burdening the configuration or communication software. Furthermore, it is easy to distinguish between echo back signals and echo back signals transmitted from slave stations (response signals), which is particularly effective in duplex loops.
【図面の簡単な説明】[Brief explanation of drawings]
【図１】この発明の一実施例を示す伝送システムの回路
ブロック図である。FIG. 1 is a circuit block diagram of a transmission system showing an embodiment of the present invention.
【図２】同伝送システムの伝送路故障検出回路の伝送路
正常時の動作を説明するための波形タイムチャートであ
る。FIG. 2 is a waveform time chart for explaining the operation of the transmission line failure detection circuit of the same transmission system when the transmission line is normal.
【図３】同伝送路故障検出回路の伝送遅延時の動作を説
明するための波形タイムチャートである。FIG. 3 is a waveform time chart for explaining the operation of the transmission path failure detection circuit during transmission delay.
【図４】同伝送路故障検出回路の伝送路断時の動作を説
明するための波形タイムチャートである。FIG. 4 is a waveform time chart for explaining the operation of the transmission line failure detection circuit when the transmission line is disconnected.
【図５】従来の伝送システムを示すブロック図である。FIG. 5 is a block diagram showing a conventional transmission system.
１ 親局 ２−１、…、２−ｎ 子局 ３ 伝送路 １０ 伝送路故障検出回路 １１、１２ ＮＯＴ回路 １３、１４ ＯＲ回路 １５、１６ ＡＮＤ回路 １７ 故障表示灯 1. Master station 2-1,..., 2-n slave station 3 Transmission line 10 Transmission line failure detection circuit 11, 12 NOT circuit 13, 14 OR circuit 15, 16 AND circuit 17 Malfunction indicator light
Claims (1)
続され、親局から発信された信号が各子局を経由して親
局に戻る伝送システムにおいて、親局から発信された信
号が所定の第１の論理状態である間に、各子局を経由し
て戻ってきた信号を受信した場合に正常とし、第１の論
理状態である間に、信号が戻って来ない場合に異常と判
断する論理回路を備えたことを特徴とする伝送路故障検
出回路。Claim 1: In a transmission system in which a master station and a plurality of slave stations are connected by a loop-shaped transmission line, and a signal transmitted from the master station returns to the master station via each slave station, the signal is transmitted from the master station. If the signal returned via each slave station is received while the signal is in the predetermined first logic state, it is considered normal, and the signal does not return while the signal is in the first logic state. 1. A transmission path failure detection circuit characterized by comprising a logic circuit that determines that an abnormality occurs in the case of an abnormality.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3076630A JPH04311125A (en) | 1991-04-10 | 1991-04-10 | Transmission line failure detecting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3076630A JPH04311125A (en) | 1991-04-10 | 1991-04-10 | Transmission line failure detecting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04311125A true JPH04311125A (en) | 1992-11-02 |
Family
ID=13610693
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3076630A Pending JPH04311125A (en) | 1991-04-10 | 1991-04-10 | Transmission line failure detecting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04311125A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0643509A1 (en) * | 1993-09-10 | 1995-03-15 | BRITISH TELECOMMUNICATIONS public limited company | Communication terminal |
| US5617542A (en) * | 1993-09-10 | 1997-04-01 | British Telecommunications Public Limited Company | Keyboard terminal with rapid keyed character local display that is altered if character transmitted to host is not timely acknowledged |
-
1991
- 1991-04-10 JP JP3076630A patent/JPH04311125A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0643509A1 (en) * | 1993-09-10 | 1995-03-15 | BRITISH TELECOMMUNICATIONS public limited company | Communication terminal |
| US5617542A (en) * | 1993-09-10 | 1997-04-01 | British Telecommunications Public Limited Company | Keyboard terminal with rapid keyed character local display that is altered if character transmitted to host is not timely acknowledged |
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