JPH04264747A - Semiconductor integrated circuit testing device - Google Patents
Semiconductor integrated circuit testing deviceInfo
- Publication number
- JPH04264747A JPH04264747A JP3025822A JP2582291A JPH04264747A JP H04264747 A JPH04264747 A JP H04264747A JP 3025822 A JP3025822 A JP 3025822A JP 2582291 A JP2582291 A JP 2582291A JP H04264747 A JPH04264747 A JP H04264747A
- Authority
- JP
- Japan
- Prior art keywords
- temperature
- test
- tester
- value
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 63
- 239000004065 semiconductor Substances 0.000 title claims description 8
- 238000001816 cooling Methods 0.000 claims description 24
- 238000001514 detection method Methods 0.000 claims description 11
- 230000005856 abnormality Effects 0.000 claims description 10
- 238000005259 measurement Methods 0.000 claims description 10
- 230000007257 malfunction Effects 0.000 abstract description 2
- 230000000630 rising effect Effects 0.000 abstract description 2
- 230000000391 smoking effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 11
- 239000007788 liquid Substances 0.000 description 4
- 230000002159 abnormal effect Effects 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000000779 smoke Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000009835 boiling Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 2
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000007779 soft material Substances 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31724—Test controller, e.g. BIST state machine
Landscapes
- Engineering & Computer Science (AREA)
- Environmental & Geological Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は、半導体集積回路試験装
置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit testing device.
【0002】0002
【従来の技術】従来から、高電力用のICなどをICテ
スタで測定する場合は、動作時の消費電力によるICの
接合部温度が上昇するのを防ぐため、被試験ICを冷却
している。図6は、従来のIC試験の一例のブロック図
であり、ICテスタ1bには、被試験IC20の電気特
性試験(以下、テストと称す)を実施する為の電圧およ
び電流の印加手段や計測を制御する試験制御回路2と制
御ソフト6と動作するコンピュータ装置4とを有し、コ
ンピュータ装置4と試験制御回路2を接続するコンピュ
ータバス5を介してこの試験制御回路2に所定の動作を
させている。また、試験制御回路2により印加される電
圧,電流、或いはIC20によって発生する電圧,電流
を相互に伝達するための計測信号接続線3を有する。ま
た、IC20とICテスタ1bの計測信号接続線3の延
端(図中、上部延端を指す)を接続する手段として接続
器30を用い、この接続器30とIC20との接続は接
触子31により達成し、接続器30とICテースタ1b
との接続は詳細の図示はしていないがICテスタ1bの
計測信号接続線3の延端により達成する。[Prior Art] Conventionally, when measuring high-power ICs using an IC tester, the IC under test is cooled to prevent the IC's junction temperature from rising due to power consumption during operation. . FIG. 6 is a block diagram of an example of a conventional IC test, and the IC tester 1b includes voltage and current application means and measurement for carrying out an electrical characteristic test (hereinafter referred to as a test) of the IC 20 under test. It has a test control circuit 2 to control, control software 6, and a computer device 4 to operate, and causes the test control circuit 2 to perform predetermined operations via a computer bus 5 connecting the computer device 4 and the test control circuit 2. There is. It also has a measurement signal connection line 3 for mutually transmitting the voltage and current applied by the test control circuit 2 or the voltage and current generated by the IC 20. In addition, a connector 30 is used as a means for connecting the extended end of the measurement signal connection line 3 of the IC tester 1b (indicates the upper extended end in the figure), and the connection between the connector 30 and the IC 20 is made using the contactor 31. This is achieved by connecting the connector 30 and the IC tester 1b.
Although not shown in detail, the connection with the IC tester 1b is achieved by the extended end of the measurement signal connection line 3 of the IC tester 1b.
【0003】一般に高電力ICは、その消費電力値によ
り被試験IC20の形態が異なり、従ってIC冷却装置
10の形態も異なる。例えば本発明で対象としているI
C20は電力が20W以上の場合であり、図7(A)の
斜視図と図7(B)の断面図に示すように、TAB(T
ape Automated Bonding)で
あり、ICチップ21が露出した状態となる。このIC
チップ21はTABテープ22上に載置されTABボン
ディング24によりTABテープ22の配線と電気的接
続がなされている。またTABテープ22は柔らかい材
質、例えばポリイミドが使用され物流やテスト時にはT
ABテープ22の機械的を強化する目的でキャリア23
で固定される。ここではこのキャリアを含めて被試験I
C20という。このIC20を前述の接続手段によりテ
ストする場合には、ICチップ21が自己発熱するので
、外付のIC冷却装置10を用いて強制冷却を施す手法
が一般的である。[0003] In general, high-power ICs have different forms of the IC under test 20 depending on their power consumption values, and accordingly, the forms of the IC cooling device 10 also differ. For example, I
C20 is the case where the power is 20W or more, and as shown in the perspective view of FIG. 7(A) and the cross-sectional view of FIG. 7(B), TAB(T
ape Automated Bonding), and the IC chip 21 is exposed. This IC
The chip 21 is placed on the TAB tape 22 and electrically connected to the wiring on the TAB tape 22 by TAB bonding 24 . In addition, the TAB tape 22 is made of a soft material, such as polyimide, and TAB tape 22 is
Carrier 23 for the purpose of mechanically strengthening the AB tape 22
It is fixed at Here, the test subject I including this carrier
It's called C20. When testing this IC 20 using the above-mentioned connection means, since the IC chip 21 self-generates heat, it is common to use an external IC cooling device 10 to perform forced cooling.
【0004】IC冷却装置10とIC冷却装置接続器1
1は熱抵抗が最少となる様に接着され、IC冷却装置接
続器11の下端をIC20のICチップ21に押しつけ
接触させる事により、IC20のテストにより発生する
自己発熱をIC冷却装置接続器11からIC冷却装置1
0へ伝搬させ、ICチップ21が高温によりジャンクシ
ョン破壊しない様にジャンクション温度Tjを一定にす
る。また、IC20のTABテープ22は、IC押さえ
12と接続器30の接触子31に挟まれる事により一定
の圧力を得、ICテスタ1からの電気信号をICチップ
21に伝達する。詳細には図示はしていないが、TAB
テープ22には電気的接続を目的としたパッドやICチ
ップ21へ電気信号を伝達する為の配線がなされている
。通常、接触子31はポゴコンタクトローブが使用され
、このスプリング圧力によりTABテープ22上のパッ
ドに電気的接触を取る。IC cooling device 10 and IC cooling device connector 1
1 is bonded to minimize thermal resistance, and by pressing the lower end of the IC cooling device connector 11 into contact with the IC chip 21 of the IC 20, self-heating generated by the test of the IC 20 is removed from the IC cooling device connector 11. IC cooling device 1
0, and the junction temperature Tj is kept constant so that the IC chip 21 does not break down due to high temperature. Further, the TAB tape 22 of the IC 20 is held between the IC presser 12 and the contact 31 of the connector 30 to obtain a certain pressure, and transmits the electric signal from the IC tester 1 to the IC chip 21. Although not shown in detail, TAB
The tape 22 has pads for electrical connection and wiring for transmitting electrical signals to the IC chip 21. Typically, a pogo contact lobe is used as the contactor 31, and the spring pressure makes electrical contact with the pad on the TAB tape 22.
【0005】[0005]
【発明が解決しようとする課題】前述の半導体集積回路
試験装置は、強制冷却を行っているが、例えばIC冷却
装置10が何等かの要因により機能しない場合、或いは
IC冷却装置接続器ICチップの接触が不充分の場合で
は、ICテスタからのテスト信号、特に被試験ICに与
えるバイアス電源電圧によって冷却されないまま自己発
熱量が増加する。この場合、数10WのICではほんの
数秒で数百度という温度に達し、IC上のICチップの
ジャンクション破壊はもとより、発煙によるIC冷却装
置接続器のICチップへの接触面の破壊を発生する恐れ
がある。[Problems to be Solved by the Invention] Although the semiconductor integrated circuit testing apparatus described above performs forced cooling, for example, if the IC cooling device 10 does not function due to some reason, or if the IC cooling device connector IC chip If the contact is insufficient, the amount of self-heating increases without being cooled by the test signal from the IC tester, especially the bias power supply voltage applied to the IC under test. In this case, an IC of several tens of watts will reach a temperature of several hundred degrees in just a few seconds, which may not only destroy the junction of the IC chip on the IC, but also destroy the contact surface of the IC cooling device connector to the IC chip due to smoke. be.
【0006】特に、IC冷却装置接続器のICチップへ
の接触面は、接触による熱抵抗を極力少なくする為に1
μmの荒さを問題にする程の仕上げ状態であり、発煙に
より不純物が付着したりすると、これを修理する事が困
難である。また図示してはいないが、強制冷却の手段と
してフッ化炭素液を用いている場合では、この液体の沸
点をゆうに越えてしまい、人体に有害なフッ化水素を発
生させる恐れがある。In particular, the contact surface of the IC cooling device connector to the IC chip is
The finish is such that micrometer roughness becomes a problem, and if impurities adhere to it due to smoke, it will be difficult to repair it. Although not shown, when a fluorocarbon liquid is used as a forced cooling means, the boiling point of this liquid will be easily exceeded, and there is a risk that hydrogen fluoride, which is harmful to the human body, will be generated.
【0007】[0007]
【課題を解決するための手段】本発明の半導体集積回路
試験装置は、内部にダイオードを有する被試験ICに接
触して冷却する冷却装置と、前記被試験ICに電気的に
接続して計測信号を授受する試験制御回路を有するIC
テスタとを有する半導体集積回路試験装置において、前
記ICテスタが、前記ダイオードの温度特性に対応する
温度特性信号と予め設定された温度に対応する温度規格
値とを入力して比較し、前記温度特性信号が前記温度規
格値を超えた場合に前記試験制御回路に警報出力を供給
し試験を中断する異常検出回路を有して構成されている
。[Means for Solving the Problems] A semiconductor integrated circuit testing device of the present invention includes a cooling device that cools down an IC under test by contacting it and having a diode therein, and a cooling device that is electrically connected to the IC under test to generate measurement signals. IC with a test control circuit that sends and receives
In the semiconductor integrated circuit testing apparatus having a tester, the IC tester inputs and compares a temperature characteristic signal corresponding to the temperature characteristic of the diode with a temperature standard value corresponding to a preset temperature, and The apparatus includes an abnormality detection circuit that supplies an alarm output to the test control circuit and interrupts the test when the signal exceeds the temperature standard value.
【0008】[0008]
【実施例】図1および図2は本発明の第1の実施例のブ
ロック図および被試験ICと異常検出回路のブロック図
である。内部にダイオード回路29を有する被試験IC
20のICチップ21にIC冷却装置接続器11を介し
て接触して冷却するIC冷却装置10と、被試験IC2
0に計測信号接続線3を介して接続して計測信号を授受
する試験制御回路2を有するICテスタ1とを有する。
このICテスタは、ダイオード29の接合部温度特性に
対応する特性信号Aと予め設定された温度Tjmaxに
対応する温度規格値Bとを比較器55に入力して比較し
、温度特性信号Aが温度規格値Bを超えた場合に試験制
御回路2に警報出力信号53を供給し試験を中断する異
常検出回路A50を有する。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1 and 2 are block diagrams of a first embodiment of the present invention, and a block diagram of an IC under test and an abnormality detection circuit. IC under test that has a diode circuit 29 inside
An IC cooling device 10 that contacts and cools the 20 IC chips 21 via the IC cooling device connector 11;
The IC tester 1 has a test control circuit 2 connected to the IC tester 1 via a measurement signal connection line 3 to send and receive measurement signals. This IC tester inputs and compares a characteristic signal A corresponding to the junction temperature characteristic of the diode 29 and a temperature standard value B corresponding to a preset temperature Tjmax to a comparator 55, and compares the temperature characteristic signal A corresponding to the temperature It has an abnormality detection circuit A50 which supplies an alarm output signal 53 to the test control circuit 2 and interrupts the test when the standard value B is exceeded.
【0009】図2のブロックをさらに説明すると、被試
験IC20のIC内部回路28へは電源27とグランド
25及びI/O信号26を接触子31,接続器30及び
計測信号接続線3を以て試験制御回路2とを接続し、I
C20のバイアス印加や入出力の情報を相互に伝送しテ
ストを行う。また、IC20のICチップ温度をモニタ
する為のダイオード回路29のカソード側をIC回路2
8と共用のグランド25に接続し、アノード側を異常検
出回路A50の比較器55の入力A及び定電流発生器5
4に接続する。また、試験制御回路2から出力する警報
を発する基準の温度規格値を比較器55の入力Bに入力
し、入力Aと入力Bの電圧値によって警報結果を試験制
御回路2に入力する。To further explain the block in FIG. 2, a power supply 27, a ground 25, and an I/O signal 26 are connected to the IC internal circuit 28 of the IC under test 20 for test control using a contact 31, a connector 30, and a measurement signal connection line 3. Connect circuit 2 and I
Tests are performed by mutually transmitting C20 bias application and input/output information. In addition, the cathode side of the diode circuit 29 for monitoring the IC chip temperature of the IC 20 is connected to the IC circuit 2.
8 and the common ground 25, and the anode side is connected to the input A of the comparator 55 of the abnormality detection circuit A50 and the constant current generator 5.
Connect to 4. Further, the reference temperature standard value for issuing an alarm outputted from the test control circuit 2 is inputted to the input B of the comparator 55, and the alarm result is inputted to the test control circuit 2 based on the voltage values of the inputs A and B.
【0010】一般的にIC20のジャンクション温度T
jを得るには、ICチップ21内部の温度検出用のダイ
オード回路29に定電流Iを流し、この時発生する順方
向の電圧値Vfを観測する。Generally, the junction temperature T of IC20
In order to obtain j, a constant current I is passed through a diode circuit 29 for temperature detection inside the IC chip 21, and the forward voltage value Vf generated at this time is observed.
【0011】今、何等かの要因で、IC20のICチッ
プ21を強制冷却できなくなった場合、ダイオード回路
29の温度上昇に伴いVf特性が変化し、アナログ比較
器55の入力Aの電圧値が変化する。If for some reason it becomes impossible to forcibly cool the IC chip 21 of the IC 20, the Vf characteristics will change as the temperature of the diode circuit 29 increases, and the voltage value at the input A of the analog comparator 55 will change. do.
【0012】すなわち図3によれば、IC20のジャン
クション温度Tjとダイオード回路29の順方向電圧V
fとの関係は、直線的な関係が有る。このグラフは、一
般的なバイポーラ(ECL)回路の温度特性に対応して
いる。従って、ジャンクション温度Tjの変化が、警報
を発する為の規格値を越えた場合、警報出力線53に比
較器55から警報が発せられ、これをICテスタ1の試
験制御回路2が受領したら、直ちにテストを終了させる
。試験制御回路2の詳細については図示していないが、
警報出力信号53をゲート回路で受け、これによりIC
20に出力しているバイアス電源27やデバイスI/0
26への電圧出力を中断する。例ばTj=100℃でテ
ストを中止するなら、Vf=650mVのポイントで比
較器55の出力を反転する様に、温度規格の電圧値を比
較器55の入力Bに与えれば良い。That is, according to FIG. 3, the junction temperature Tj of the IC 20 and the forward voltage V of the diode circuit 29
There is a linear relationship with f. This graph corresponds to the temperature characteristics of a typical bipolar (ECL) circuit. Therefore, when the change in junction temperature Tj exceeds the standard value for issuing an alarm, an alarm is issued from the comparator 55 to the alarm output line 53, and when the test control circuit 2 of the IC tester 1 receives this, it immediately Terminate the test. Although details of the test control circuit 2 are not shown,
The alarm output signal 53 is received by the gate circuit, and the IC
Bias power supply 27 and device I/0 output to 20
The voltage output to 26 is interrupted. For example, if the test is to be stopped at Tj=100° C., a temperature-standard voltage value may be applied to the input B of the comparator 55 so that the output of the comparator 55 is inverted at the point where Vf=650 mV.
【0013】図4,図5は、本発明の第2の実施例のブ
ロック図および異常検出回路BとICのブロック図であ
り、図1との違いは、IC20のダイオード回路29に
発生する順方向電圧Vfの入力を、異常検出回路B60
内のAD変換(アナログ/デジタル変換)器65と、B
USインタフェイス回路66により、AD変換器65に
よりデジタル化された電圧値をコンピュータバス5を介
してコンピュータ装置4aに接続し、コンピュータ装置
4aに予め記憶する警報温度比較情報7をコンピュータ
装置4内の制御ソフト6によりAD変換器65の電圧値
及び前記記憶した警報温度比較情報7を逐次比較し、そ
の比較結果により異常温度と判断した場合には強制的に
試験を終了とする手段を有する。FIGS. 4 and 5 are block diagrams of a second embodiment of the present invention and a block diagram of the abnormality detection circuit B and IC. The difference from FIG. The input of the directional voltage Vf is input to the abnormality detection circuit B60.
AD converter (analog/digital converter) 65 in
The US interface circuit 66 connects the voltage value digitized by the AD converter 65 to the computer device 4a via the computer bus 5, and transmits the alarm temperature comparison information 7 stored in the computer device 4a in advance to the computer device 4. The control software 6 successively compares the voltage value of the AD converter 65 and the stored alarm temperature comparison information 7, and if it is determined that the temperature is abnormal based on the comparison result, the test is forcibly terminated.
【0014】本実施例では、ICテスタ1aでIC20
をテストする時、同時に定電流発生器54から温度特性
値入力線51を経由してIC20のダイオード回路29
に一定電流Iを印加し、ダイオード回路29の順方向電
圧Vfを温度特性値入力信号51を経由してAD変換器
65で受ける。これを、AD変換器65によりアナログ
/デジタル変換し、変換結果をBUSインタフェイス回
路66に渡す。更に、BUSインタフェイス回路66か
らコンピュータバス5によりコンピュータ装置4に与え
る。また、ICチップ21のジャンクション温度とを比
較する為のリファレンス値、即ち、警報温度比較情報7
は、コンピュータ装置4の主記憶装置の一部に、予め記
憶されている。In this embodiment, the IC tester 1a tests the IC20.
When testing, the diode circuit 29 of the IC 20 is simultaneously connected from the constant current generator 54 via the temperature characteristic value input line 51.
A constant current I is applied to the diode circuit 29, and the forward voltage Vf of the diode circuit 29 is received by the AD converter 65 via the temperature characteristic value input signal 51. This is converted from analog to digital by an AD converter 65, and the conversion result is passed to a BUS interface circuit 66. Furthermore, it is provided to the computer device 4 via the computer bus 5 from the BUS interface circuit 66 . Also, a reference value for comparing with the junction temperature of the IC chip 21, that is, alarm temperature comparison information 7
is stored in advance in a part of the main storage device of the computer device 4.
【0015】今、何等かの要因で、IC20のICチッ
プ21を強制冷却できなくなった場合、ダイオード回路
29の特性が変化し、AD変換器65の入力電圧値が変
化する。この変化情報は、逐次AD変換されコンピュー
タ装置4aに与えられている。また、コンピュータ装置
4aの警報温度比較情報7とコンピュータバス5から入
力されるAD変換後のダイオード回路29の順方向電圧
Vfの夫々の値は、制御ソフト6の実行により逐次比較
が行われ、制御ソフト6の判断により異常温度と判断し
た場合、直ちに、制御ソフト6の制御により、コンピュ
ータ装置4aからコンピュータバス5を経由して試験制
御回路2にテストを中止せしめる。制御ソフト6のアル
ゴリズムは具体的に図示してはいないが、温度比較やテ
スト中止制御は、割込み制御により容易に構成が可能で
ある。If for some reason it becomes impossible to forcibly cool the IC chip 21 of the IC 20, the characteristics of the diode circuit 29 change, and the input voltage value of the AD converter 65 changes. This change information is sequentially AD converted and given to the computer device 4a. Further, the alarm temperature comparison information 7 of the computer device 4a and the respective values of the forward voltage Vf of the diode circuit 29 after AD conversion inputted from the computer bus 5 are successively compared by execution of the control software 6. If the software 6 determines that the temperature is abnormal, the control software 6 immediately causes the test control circuit 2 from the computer device 4a via the computer bus 5 to stop the test. Although the algorithm of the control software 6 is not specifically illustrated, temperature comparison and test abort control can be easily configured using interrupt control.
【0016】[0016]
【発明の効果】以上説明した様に本発明によれば、高電
力ICの強制冷却しつつテスト中に、何等かの要因によ
りIC冷却装置が機能せず、自己発熱量が増加した場合
でも、ICテスタで異常温度を検出し、ICの故障に至
る温度となる前にテストを中止する為、ICのジャンク
ション破壊はもとより、発煙によるIC冷却装置接続器
のICチップ接触面の破壊を未然に防止出来る。[Effects of the Invention] As explained above, according to the present invention, even if the IC cooling device does not function due to some reason and the self-heating amount increases during forced cooling and testing of a high-power IC, The IC tester detects abnormal temperatures and stops the test before the temperature reaches the point where the IC malfunctions, preventing damage to the IC junction as well as damage to the IC chip contact surface of the IC cooling device connector due to smoke generation. I can do it.
【0017】また、強制冷却の手段としてフッ化炭素液
を用いている場合でも、この液体の沸点を越えない為、
人体に有害なフッ化水素を発生させない。[0017] Furthermore, even when a fluorocarbon liquid is used as a means of forced cooling, the boiling point of this liquid is not exceeded;
Does not generate hydrogen fluoride, which is harmful to the human body.
【図1】本発明の第1の実施例のブロック図である。FIG. 1 is a block diagram of a first embodiment of the invention.
【図2】図1の異常検出回路AとICのブロック図であ
る。FIG. 2 is a block diagram of an abnormality detection circuit A and an IC in FIG. 1;
【図3】図1のブロックの動作を説明するためのダイオ
ード特性の接合温度特性図である。FIG. 3 is a junction temperature characteristic diagram of diode characteristics for explaining the operation of the block in FIG. 1;
【図4】本発明の第2の実施例のブロック図である。FIG. 4 is a block diagram of a second embodiment of the invention.
【図5】図4の異常検出回路BとICのブロック図であ
る。FIG. 5 is a block diagram of the abnormality detection circuit B and IC in FIG. 4;
【図6】従来の半導体試験装置試験装置の一例のブロッ
ク図である。FIG. 6 is a block diagram of an example of a conventional semiconductor testing device testing device.
【図7】被試験半導体装置の一例の斜視図および断面図
である。FIG. 7 is a perspective view and a cross-sectional view of an example of a semiconductor device under test.
1,1a ICテスタ 2 試験制御回路 3 計測信号接続線 4 コンピュータ装置 5 コンピュータバス 6 制御ソフト 11 IC冷却装置接続器 12 IC押さえ 20 被試験IC 29 ダイオード回路 30 接続器 31 接触子 50 異常検出回路A 51 温度特性入力線 52 温度規格値入力線 53 警報出力線 54 定電流回路 55 比較器 1,1a IC tester 2 Test control circuit 3 Measurement signal connection line 4 Computer equipment 5 Computer bus 6 Control software 11 IC cooling device connector 12 IC holder 20 IC under test 29 Diode circuit 30 Connector 31 Contact 50 Abnormality detection circuit A 51 Temperature characteristic input line 52 Temperature standard value input line 53 Alarm output line 54 Constant current circuit 55 Comparator
Claims (1)
に接触して冷却する冷却装置と、前記被試験ICに電気
的に接続して計測信号を授受する試験制御回路を有する
ICテスタとを有する半導体集積回路試験装置において
、前記ICテスタが、前記ダイオードの温度特性に対応
する温度特性信号と予め設定された温度に対応する温度
規格値とを入力して比較し、前記温度特性信号が前記温
度規格値を超えた場合に前記試験制御回路に警報出力を
供給し試験を中断する異常検出回路を有することを特徴
とする半導体集積回路試験装置。[Claim 1] IC under test having a diode inside
and an IC tester having a test control circuit electrically connected to the IC under test to send and receive measurement signals, the IC tester comprising: a cooling device that cools the IC under test; input and compare a temperature characteristic signal corresponding to the temperature characteristic of the temperature characteristic and a temperature standard value corresponding to a preset temperature, and output an alarm to the test control circuit when the temperature characteristic signal exceeds the temperature standard value. 1. A semiconductor integrated circuit testing device characterized by having an abnormality detection circuit that supplies an error and interrupts the test.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3025822A JPH04264747A (en) | 1991-02-20 | 1991-02-20 | Semiconductor integrated circuit testing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3025822A JPH04264747A (en) | 1991-02-20 | 1991-02-20 | Semiconductor integrated circuit testing device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04264747A true JPH04264747A (en) | 1992-09-21 |
Family
ID=12176555
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3025822A Pending JPH04264747A (en) | 1991-02-20 | 1991-02-20 | Semiconductor integrated circuit testing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04264747A (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63132A (en) * | 1986-06-19 | 1988-01-05 | Mitsubishi Electric Corp | Wafer testing unit |
JPH0243760A (en) * | 1988-08-04 | 1990-02-14 | Sumitomo Electric Ind Ltd | Integrated circuit |
JPH0364038A (en) * | 1989-08-02 | 1991-03-19 | Mitsubishi Electric Corp | Semiconductor testing device |
-
1991
- 1991-02-20 JP JP3025822A patent/JPH04264747A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63132A (en) * | 1986-06-19 | 1988-01-05 | Mitsubishi Electric Corp | Wafer testing unit |
JPH0243760A (en) * | 1988-08-04 | 1990-02-14 | Sumitomo Electric Ind Ltd | Integrated circuit |
JPH0364038A (en) * | 1989-08-02 | 1991-03-19 | Mitsubishi Electric Corp | Semiconductor testing device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6094059A (en) | Apparatus and method for burn-in/testing of integrated circuit devices | |
US5397997A (en) | Burn-in technologies for unpackaged integrated circuits | |
Ji et al. | In situ diagnostics and prognostics of wire bonding faults in IGBT modules for electric vehicle drives | |
US6552561B2 (en) | Apparatus and method for controlling temperature in a device under test using integrated temperature sensitive diode | |
Mandeya et al. | Gate–emitter pre-threshold voltage as a health-sensitive parameter for IGBT chip failure monitoring in high-voltage multichip IGBT power modules | |
US8427187B2 (en) | Probe wafer, probe device, and testing system | |
JPH05235122A (en) | Fixture and method for testing integrated circuit | |
US6573743B2 (en) | Testing apparatus for test piece, testing method, contactor and method of manufacturing the same | |
US6069366A (en) | Endpoint detection for thinning of silicon of a flip chip bonded integrated circuit | |
US6741092B2 (en) | Method and system for detecting an arc condition | |
JPH10111315A (en) | Probe card and testing device using the same | |
JPH06109797A (en) | Device and method for inspecting connection | |
Tran et al. | Constant Δt j power cycling strategy in DC mode for top-metal and bond-wire contacts degradation investigations | |
Wang et al. | Monitoring bond wire defects of IGBT module using module transconductance | |
JPH08340030A (en) | Burn-in equipment and wafer tray for burn-in | |
US7064568B2 (en) | Optical testing of integrated circuits with temperature control | |
US6545494B1 (en) | Apparatus and method for controlling temperature in a wafer using integrated temperature sensitive diode | |
US6577146B2 (en) | Method of burning in an integrated circuit chip package | |
CN104062574B (en) | The manufacturing method of the inspection method of semiconductor device and the semiconductor device of use this method | |
US6255124B1 (en) | Test arrangement and method for thinned flip chip IC | |
JPH04264747A (en) | Semiconductor integrated circuit testing device | |
JP3231668B2 (en) | Probe device | |
JP2013007603A (en) | Manufacturing method of semiconductor device | |
US6252239B1 (en) | Substrate removal from a semiconductor chip structure having buried insulator (BIN) | |
US6566888B1 (en) | Repair of resistive electrical connections in an integrated circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19971216 |