JPH04258157A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPH04258157A
JPH04258157A JP3038904A JP3890491A JPH04258157A JP H04258157 A JPH04258157 A JP H04258157A JP 3038904 A JP3038904 A JP 3038904A JP 3890491 A JP3890491 A JP 3890491A JP H04258157 A JPH04258157 A JP H04258157A
Authority
JP
Japan
Prior art keywords
die pad
bonding
lead frame
lead
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3038904A
Other languages
Japanese (ja)
Inventor
Seiya Yamanaka
誠也 山中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3038904A priority Critical patent/JPH04258157A/en
Publication of JPH04258157A publication Critical patent/JPH04258157A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/26175—Flow barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To effectively and easily perform a wire bonding to a hanging lead without being disturbed by flow of a solder from a die pad. CONSTITUTION:A hole 11 is provided between a bonding part 2a of a hanging lead 2 and a die pad 1 or a nonplated part 12 is provided on a surface between the part 2 and the pad 1, thereby preventing flow of a solder to the part 2a.

Description

【発明の詳細な説明】[Detailed description of the invention]

【０００１】0001

【産業上の利用分野】請求項１及び請求項２に係る発明
は、半導体素子が搭載されるダイパッドと、このダイパ
ッドに接続され、ボンディングワイヤがボンディングさ
れる宙吊りリードとを備えているリードフレームに関す
るものである。[Field of Industrial Application] The invention according to claims 1 and 2 relates to a lead frame comprising a die pad on which a semiconductor element is mounted and a suspended lead connected to the die pad and to which a bonding wire is bonded. It is something.

【０００２】0002

【従来の技術】図６は従来のリードフレームを使用した
半導体装置の内部構造を示す斜視図、図７は図６の宙吊
りリードの周囲を拡大して示す斜視図である。図におい
て、１はダイパッド、２はダイパッド１に一体に接続さ
れている宙吊りリード、３はダイパッド１の周囲に間隔
をおいて配置されている複数本の内部リードである。こ
のようなリードフレームの表面部には、金属のめっき（
図中斜線）が施されている。４はダイパッド１上にはん
だ接合されて搭載された半導体素子、５は宙吊りリード
２や内部リード３と半導体素子４とを接続しているボン
ディングワイヤである。2. Description of the Related Art FIG. 6 is a perspective view showing the internal structure of a semiconductor device using a conventional lead frame, and FIG. 7 is an enlarged perspective view showing the periphery of the suspended lead in FIG. In the figure, 1 is a die pad, 2 is a suspended lead integrally connected to the die pad 1, and 3 is a plurality of internal leads arranged at intervals around the die pad 1. The surface of such a lead frame is coated with metal plating (
(hatched lines in the figure) are applied. 4 is a semiconductor element soldered and mounted on the die pad 1, and 5 is a bonding wire connecting the suspended lead 2 or internal lead 3 to the semiconductor element 4.

【０００３】0003

【発明が解決しようとする課題】上記のように構成され
た従来の半導体装置においては、半導体素子４をダイパ
ッド１上にはんだ接合する際にはんだの量が多すぎると
、はんだが図７の矢印方向に流出し、半導体素子４と宙
吊りリード２との間のワイヤボンディングが行えなくな
ってしまうという問題点があった。[Problems to be Solved by the Invention] In the conventional semiconductor device configured as described above, when the semiconductor element 4 is soldered onto the die pad 1, if too much solder is used, the solder will be damaged as shown by the arrow in FIG. There was a problem that wire bonding between the semiconductor element 4 and the suspended lead 2 could not be performed due to the leakage in the direction.

【０００４】請求項１及び請求項２に係る発明は、上記
のような問題点を解決することを課題としてなされたも
のであり、ダイパッドからのはんだの流入により阻害さ
れることなく、宙吊りリードへのワイヤボンディングを
行うことができるリードフレームを得ることを目的とす
る。[0004] The inventions according to claims 1 and 2 have been made with the aim of solving the above-mentioned problems, and it is possible to prevent the solder from flowing into the suspended lead from the die pad without being obstructed by the inflow of solder from the die pad. The purpose of the present invention is to obtain a lead frame that can perform wire bonding.

【０００５】[0005]

【課題を解決するための手段】請求項１に係る発明のリ
ードフレームは、宙吊りリードのボンディング部とダイ
パッドとの間に穴部を設けたものである。請求項２に係
る発明のリードフレームは、宙吊りリードのボンディン
グ部とダイパッドとの間の表面に非めっき部を設けたも
のである。[Means for Solving the Problems] A lead frame of the invention according to claim 1 is one in which a hole is provided between a bonding portion of a suspended lead and a die pad. In the lead frame of the invention according to claim 2, a non-plated portion is provided on the surface between the bonding portion of the suspended lead and the die pad.

【０００６】[0006]

【作用】請求項１に係る発明においては、ダイパッドか
ら流出したはんだの流れを、ダイパッドとボンディング
部との間に設けた穴部で止める。請求項２に係る発明に
おいては、ダイパッドから流出したはんだの流れを、ダ
イパッドとボンディング部との間に設けた非めっき部で
止める。In the invention according to claim 1, the flow of solder flowing out from the die pad is stopped by the hole provided between the die pad and the bonding portion. In the invention according to claim 2, the flow of solder flowing out from the die pad is stopped at the non-plated part provided between the die pad and the bonding part.

【０００７】[0007]

【実施例】以下、請求項１に係る発明の実施例を図につ
いて説明する。図１は請求項１に係る発明の一実施例に
よるリードフレームの要部を示す斜視図、図２は図１の
リードフレームにワイヤボンディングを行った状態を示
す斜視図であり、図７と同一又は相当部分には同一符号
を付し、その説明を省略する。図において、１１は宙吊
りリード２のボンディング部２ａの幅方向両側及びダイ
パッド１側に隣接して設けられているコ字状の穴部であ
る。Embodiments Hereinafter, embodiments of the invention according to claim 1 will be described with reference to the drawings. 1 is a perspective view showing essential parts of a lead frame according to an embodiment of the invention according to claim 1, and FIG. 2 is a perspective view showing a state in which wire bonding is performed on the lead frame of FIG. 1, and is the same as FIG. Or equivalent parts are given the same reference numerals and their explanations are omitted. In the figure, reference numeral 11 denotes a U-shaped hole provided adjacent to both widthwise sides of the bonding portion 2a of the suspended lead 2 and on the die pad 1 side.

【０００８】上記のようなリードフレームにおいては、
半導体素子４とダイパッド１とをはんだ接合する際に、
はんだが宙吊りリード２側へ流出しても、穴部１１が設
けられているため、はんだはボンディング部２ａには達
しない。従って、宙吊りリード２上にボンディングワイ
ヤ５を正常にボンディングできる。[0008] In the above lead frame,
When soldering the semiconductor element 4 and die pad 1,
Even if the solder flows out to the side of the suspended lead 2, the solder will not reach the bonding part 2a because the hole part 11 is provided. Therefore, the bonding wire 5 can be properly bonded onto the suspended lead 2.

【０００９】次に、請求項２に係る発明の実施例を図に
ついて説明する。図３は請求項２に係る発明の一実施例
によるリードフレームの要部を示す斜視図、図４は図３
のリードフレームにワイヤボンディングを行った状態を
示す斜視図であり、図７と同一又は相当部分には同一符
号を付し、その説明を省略する。図において、１２はダ
イパッド１とボンディング部２ａとの間の表面に設けら
れた非めっき部であり、宙吊りリード２は、図の斜線に
示すように、ボンディング部２ａにのみ金属のめっきが
施されている。また、内部リード３についても、ボンデ
ィング部にのみ金属のめっきが施されている。Next, an embodiment of the invention according to claim 2 will be described with reference to the drawings. FIG. 3 is a perspective view showing a main part of a lead frame according to an embodiment of the invention according to claim 2, and FIG.
FIG. 8 is a perspective view showing a state in which wire bonding has been performed on the lead frame of FIG. In the figure, 12 is a non-plated part provided on the surface between the die pad 1 and the bonding part 2a, and the suspended lead 2 is plated with metal only on the bonding part 2a, as shown by diagonal lines in the figure. ing. Also, regarding the internal leads 3, metal plating is applied only to the bonding portions.

【００１０】上記のようなリードフレームにおいては、
はんだがダイパッド１から宙吊りリード２側へ流出して
も、宙吊りリード２のめっきを施す部分がボンディング
部２ａのみに限定されているため、はんだはボンディン
グ部２ａには達しない。即ち、非めっき部１２上では、
金属めっき上に比べてはんだが流動しにくいため、ボン
ディング部２ａへのはんだの流入が阻止される。従って
、宙吊りリード２上にボンディングワイヤ５を正常にボ
ンディングできる。[0010] In the above lead frame,
Even if the solder flows out from the die pad 1 to the suspended lead 2 side, the solder does not reach the bonding part 2a because the part of the suspended lead 2 to be plated is limited to the bonding part 2a. That is, on the non-plated portion 12,
Since the solder is less likely to flow than on metal plating, the solder is prevented from flowing into the bonding portion 2a. Therefore, the bonding wire 5 can be properly bonded onto the suspended lead 2.

【００１１】次に、図５は各発明の他の実施例として両
方の発明を組み合わせたリードフレームを示す斜視図で
ある。このようなリードフレームでは、非めっき部１２
が設けられているので、ダイパッド１から宙吊りリード
２へのはんだの流出が防止される。また、もし宙吊りリ
ード２上にはんだが流出しても、穴部１１が設けられて
いるので、ボンディング部２ａへのはんだの流入はより
確実に防止される。そして、ボンディング部２ａには金
属めっきが施されているので、ボンディングワイヤ５と
のボンディングも問題はない。Next, FIG. 5 is a perspective view showing a lead frame combining both inventions as another embodiment of each invention. In such a lead frame, the non-plated portion 12
Since this is provided, solder is prevented from flowing from the die pad 1 to the suspended leads 2. Further, even if the solder flows out onto the suspended lead 2, since the hole 11 is provided, the solder can be more reliably prevented from flowing into the bonding part 2a. Since the bonding portion 2a is plated with metal, there is no problem in bonding it to the bonding wire 5.

【００１２】なお、上記実施例ではコ字状の穴部１１を
示したが、例えば長方形など、ボンディング部２ａへの
はんだの流入を防止するものであれば穴部１１の形状は
他のものでもよい。また、穴部１１を複数設けてもよい
。また、上記実施例では非めっき部１２を形成するため
に、ボンディング部２ａのみにめっきを施したが、非め
っき部１２を残して他の部分全体にめっきを施してもよ
い。Note that although the U-shaped hole 11 is shown in the above embodiment, the hole 11 may have any other shape, such as a rectangle, as long as it prevents solder from flowing into the bonding portion 2a. good. Further, a plurality of holes 11 may be provided. Further, in the above embodiment, in order to form the non-plated portion 12, only the bonding portion 2a was plated, but the entire other portion may be plated, leaving the non-plated portion 12.

【００１３】[0013]

【発明の効果】以上説明したように、請求項１に係る発
明のリードフレームは、宙吊りリードのボンディング部
とダイパッドとの間に穴部を設けたので、ダイパッドか
らボンディング部へのはんだの流入が防止され、宙吊り
リードへのワイヤボンディングをより確実に容易に行う
ことができるという効果を奏する。また、請求項２に係
る発明のリードフレームは、宙吊りリードのボンディン
グ部とダイパッドとの間の表面に非めっき部を設けたの
で、ダイパッドからボンディング部へのはんだの流入が
防止され、宙吊りリードへのワイヤボンディングをより
確実に容易に行うことができるという効果を奏する。As explained above, in the lead frame of the invention according to claim 1, since the hole is provided between the bonding part of the suspended lead and the die pad, solder does not flow from the die pad to the bonding part. This has the effect that wire bonding to the suspended lead can be performed more reliably and easily. Further, in the lead frame of the invention according to claim 2, since the non-plated part is provided on the surface between the bonding part of the suspended lead and the die pad, solder is prevented from flowing from the die pad to the bonding part, and the solder is prevented from flowing into the suspended lead. This has the effect that wire bonding can be performed more reliably and easily.

【図面の簡単な説明】[Brief explanation of the drawing]

【図１】請求項１に係る発明の一実施例によるリードフ
レームの要部を示す斜視図である。FIG. 1 is a perspective view showing a main part of a lead frame according to an embodiment of the invention according to claim 1.

【図２】図１のリードフレームにワイヤボンディングを
行った状態を示す斜視図である。FIG. 2 is a perspective view showing a state in which wire bonding is performed on the lead frame of FIG. 1;

【図３】請求項２に係る発明の一実施例によるリードフ
レームの要部を示す斜視図である。FIG. 3 is a perspective view showing a main part of a lead frame according to an embodiment of the invention according to claim 2;

【図４】図３のリードフレームにワイヤボンディングを
行った状態を示す斜視図である。4 is a perspective view showing a state in which wire bonding is performed on the lead frame of FIG. 3; FIG.

【図５】請求項１及び請求項２に係る発明の他の実施例
を示す斜視図である。FIG. 5 is a perspective view showing another embodiment of the invention according to claims 1 and 2.

【図６】従来の半導体装置の一例を示す斜視図である。FIG. 6 is a perspective view showing an example of a conventional semiconductor device.

【図７】図６のリードフレームの要部を示す斜視図であ
る。7 is a perspective view showing essential parts of the lead frame shown in FIG. 6. FIG.

【符号の説明】[Explanation of symbols]

１　　　　ダイパッド ２　　　　宙吊りリード ２ａ　　ボンディング部 ４　　　　半導体素子 ５　　　　ボンディングワイヤ １１　　　　穴部 １２　　　　非めっき部 1 Die pad 2 Suspended lead 2a Bonding part 4 Semiconductor device 5 Bonding wire 11 Hole 12 Non-plated area

Claims (2)

【特許請求の範囲】[Claims] 【請求項１】　　半導体素子が搭載されるダイパッドと
、このダイパッドに接続され、ボンディングワイヤがボ
ンディングされる宙吊りリードとを備えているリードフ
レームにおいて、前記宙吊りリードのボンディング部と
前記ダイパッドとの間に、前記ダイパッドから前記ボン
ディング部へのはんだの流入を防止する穴部が設けられ
ていることを特徴とするリードフレーム。1. A lead frame comprising a die pad on which a semiconductor element is mounted and a suspended lead connected to the die pad and to which a bonding wire is bonded, wherein a bonding portion of the suspended lead and the die pad are provided. . A lead frame, characterized in that a hole is provided to prevent solder from flowing from the die pad to the bonding part. 【請求項２】　　半導体素子が搭載されるダイパッドと
、このダイパッドに接続され、ボンディングワイヤがボ
ンディングされる宙吊りリードとを備え、表面にめっき
が施されているリードフレームにおいて、前記宙吊りリ
ードのボンディング部と前記ダイパッドとの間の表面に
、前記ダイパッドから前記ボンディング部へのはんだの
流入を防止する非めっき部が設けられていることを特徴
とするリードフレーム。2. A lead frame comprising a die pad on which a semiconductor element is mounted, and a suspended lead connected to the die pad and to which a bonding wire is bonded, the surface of which is plated, the bonding portion of the suspended lead being plated. and the die pad, a non-plated portion is provided on the surface between the die pad and the die pad to prevent solder from flowing into the bonding portion.
JP3038904A 1991-02-12 1991-02-12 Lead frame Pending JPH04258157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3038904A JPH04258157A (en) 1991-02-12 1991-02-12 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3038904A JPH04258157A (en) 1991-02-12 1991-02-12 Lead frame

Publications (1)

Publication Number Publication Date
JPH04258157A true JPH04258157A (en) 1992-09-14

Family

ID=12538185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3038904A Pending JPH04258157A (en) 1991-02-12 1991-02-12 Lead frame

Country Status (1)

Country Link
JP (1) JPH04258157A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5530284A (en) * 1995-03-06 1996-06-25 Motorola, Inc. Semiconductor leadframe structure compatible with differing bond wire materials
EP2822031A3 (en) * 2013-06-25 2015-06-10 Renesas Electronics Corporation Semiconductor device and method for manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5530284A (en) * 1995-03-06 1996-06-25 Motorola, Inc. Semiconductor leadframe structure compatible with differing bond wire materials
EP2822031A3 (en) * 2013-06-25 2015-06-10 Renesas Electronics Corporation Semiconductor device and method for manufacturing the same
US9754865B2 (en) 2013-06-25 2017-09-05 Renesas Electronics Corporation Semiconductor device and method for manufacturing the same

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