JPH04249311A - Method of forming fine pattern of limit resolution or less of photolithography - Google Patents

Method of forming fine pattern of limit resolution or less of photolithography

Info

Publication number
JPH04249311A
JPH04249311A JP3227998A JP22799891A JPH04249311A JP H04249311 A JPH04249311 A JP H04249311A JP 3227998 A JP3227998 A JP 3227998A JP 22799891 A JP22799891 A JP 22799891A JP H04249311 A JPH04249311 A JP H04249311A
Authority
JP
Japan
Prior art keywords
etching
photoresist film
resolution
photoresist
fine pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3227998A
Other languages
Japanese (ja)
Inventor
Woo-Sung Han
宇聲 韓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JPH04249311A publication Critical patent/JPH04249311A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70466—Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3088—Process specially adapted to improve the resolution of the mask

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Drying Of Semiconductors (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

PURPOSE: To form a pattern finer than the limit resolution using an existing photolithography technology by making a trench in the vicinity of the surface of a photoresist at an exposed part, filling the trench with an anti-etching material and then etching the photoresist using the anti-etching material as a mask. CONSTITUTION: A substance 10 to be etched is coated with a photoresist 11 which is then exposed through a mask 15 on which a pattern is formed at a line width and an interval finer than the limit resolution of the photoresist 11. It is then developed and a shallow trench 13 is made in the vicinity of the surface of the photoresist 11 only at the exposed part. Subsequently, the trench 13 is filled with an anti-etching material 12 exhibiting high resistance against oxygen ion reactive etching before the photoresist 11 is subjected to oxygen ion reactive etching using the anti-etching material 12 as a mask. Finally, the substance 10 is etched using a pattern of the photoresist 11 formed by the etching step as an etching mask.

Description

【発明の詳細な説明】[Detailed description of the invention]

【０００１】0001

【産業上の利用分野】本発明は、光リソグラフィーの限
界解像度以下の微細パターン形成方法に係り、特に、光
リソグラフィーにおいて限界解像度の未完成されたパタ
ーンをフォトレジストの乾式エッチングを通じて完成さ
れたパターンを得ることにより限界解像度以下の微細パ
ターンを形成する方法に関する。[Field of Industrial Application] The present invention relates to a method for forming fine patterns with a resolution below the limit resolution of photolithography, and more particularly, to convert unfinished patterns of the limit resolution in photolithography into completed patterns through dry etching of photoresist. The present invention relates to a method for forming fine patterns with a resolution below the critical resolution.

【０００２】0002

【従来の技術】最近０．５μｍデザインルールを有する
１６Ｍｂ　　ＤＲＡＭの試製品性能評価が完了され量産
体制を急いでいる。共に次世代製品である６４ＭｂＤＲ
ＡＭ及び２５６Ｍｂ　　ＤＲＡＭの研究が活発に進みつ
つある。６４Ｍｂ　　ＤＲＡＭにおいては、０．４〜０
．３μｍデザインルールが要求され、２５６ＭｂＤＲＡ
Ｍにおいては０．２μｍデザインルールが要求されてい
る。したがって、次世代ＤＲＡＭの開発はハーフミクロ
ン以下の微細パターンを形成するための高解像度光リソ
グラフィー技術の開発によると考えられる。０．５μｍ
ディバイスプロセスにおける光リソグラフィー技術はｇ
−ライン（４３６ｎｍ）でｉ−ライン（３５６ｎｍ）の
短波長化が進行中であり、ｇ−ライン及びｉ−ライン共
用の高解像度レジストと、化学増幅型レジスト等が紹介
されている。また、高コントラストを得るために単層レ
ジスト技術において多層レジスト技術が導入されている
。しかし、０．５μｍディバイス工程の光リソグラフィ
ー技術は光の回折現象により０．４μｍ以下の線幅及び
間隔を有する微細パターンを形成できなかった。したが
って、最近は０．４〜０．３μｍディバイスである６４
Ｍｂ　　ＤＲＡＭを作るために２４８ｎｍのＫｒＦエキ
シマレーザ装置または１９３ｎｍのＡｒＦエキシマレー
ザ装置などが紹介されており、電子ビームまたはｘ線を
使用してハーフミクロン以下の微細パターン形成技術に
対する研究が活発に成されている。しかし、ハーフミク
ロン以下の微細パターン形成技術は０．５μｍ装備の代
わり高価な新規の装備を導入設置しなければならなかっ
た。2. Description of the Related Art Recently, evaluation of the performance of a prototype 16 Mb DRAM having a 0.5 μm design rule has been completed, and mass production is now underway. Both are next-generation products, 64MbDR.
Research on AM and 256 Mb DRAM is actively progressing. For 64Mb DRAM, 0.4 to 0
．． 3μm design rule required, 256Mb DRA
M requires a 0.2 μm design rule. Therefore, the development of next-generation DRAMs is thought to depend on the development of high-resolution optical lithography technology for forming fine patterns of half a micron or less. 0.5μm
Optical lithography technology in device process is g
- line (436 nm) and i-line (356 nm) are being shortened in wavelength, and high-resolution resists for both g-line and i-line, chemically amplified resists, etc. are being introduced. Furthermore, in order to obtain high contrast, multilayer resist technology has been introduced in place of single layer resist technology. However, the optical lithography technology for the 0.5 μm device process cannot form fine patterns with line widths and intervals of 0.4 μm or less due to light diffraction. Therefore, recently 0.4-0.3 μm devices64
A 248 nm KrF excimer laser device or a 193 nm ArF excimer laser device has been introduced for manufacturing Mb DRAM, and research is actively being conducted on technology for forming fine patterns of half a micron or less using electron beams or x-rays. ing. However, the technology for forming fine patterns of half a micron or less requires the introduction and installation of expensive new equipment instead of 0.5 μm equipment.

【０００３】0003

【発明が解決しようとする課題】したがって、本発明の
目的は前述した技術の問題点を解決するために既存の０
．５μｍの光リソグラフィー技術をそのまま用いながら
限界解像度以下の０．３５μｍの微細パターンが形成で
きる光リソグラフィーの限界解像度以下の微細パターン
形成方法を提供することである。本発明の他の目的は、
０．５μｍ光リソグラフィー装備をそのまま用いながら
、限界解像度以下の０．３５μｍ微細パターンが得られ
て経済的な光リソグラフィー限界解像度以下の微細パタ
ーン形成方法を提供することである。本発明のさらに他
の目的は、一世代の光リソグラフィー装備で次世代の微
細パターンを形成し得る光リソグラフィー限界解像度以
下の微細パターン形成方法を提供することである。SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to solve the problems of the above-mentioned technology.
．． It is an object of the present invention to provide a method for forming a fine pattern below the limit resolution of optical lithography, which can form a fine pattern of 0.35 μm, which is below the limit resolution, while using a 5 μm photolithography technique as is. Another object of the invention is to
It is an object of the present invention to provide an economical method for forming a fine pattern with a resolution below the limit resolution of optical lithography by which a fine pattern of 0.35 μm with a resolution below the limit resolution can be obtained while using 0.5 μm optical lithography equipment as is. Still another object of the present invention is to provide a method for forming fine patterns with a resolution below the optical lithography limit, which can form next-generation fine patterns using first-generation optical lithography equipment.

【０００４】0004

【課題を解決するための手段】上記目的を達するための
本発明は、被蝕刻物質上にフォトレジスト膜を被覆する
工程と、前記フォトレジスト膜の限界解像度以下の線幅
及び間隔を有するパターンの形成されたマスクを通じて
前記フォトレジスト膜を露光し、露光されたフォトレジ
スト膜を現像して露光された部分のフォトレジスト膜の
表面近傍にのみ薄く凹溝を形成する工程と、前記形成さ
れた凹溝を酸素イオン反応性エッチングに対して耐性の
強い蝕刻阻止物で埋め立てる工程と、前記凹溝に埋め立
てられた蝕刻阻止物を蝕刻マスクとして用いて前記フォ
トレジスト膜を酸素イオン反応性エッチング方法で蝕刻
する工程と、前記蝕刻工程により形成されフォトレジス
ト膜よりなったパターンを蝕刻マスクとして用いて前記
被蝕刻物質を蝕刻する工程を具備することを特徴とする
。[Means for Solving the Problems] To achieve the above object, the present invention includes a step of coating a photoresist film on a material to be etched, and forming a pattern having a line width and an interval less than the limit resolution of the photoresist film. a step of exposing the photoresist film to light through the formed mask, developing the exposed photoresist film to form a thin groove only in the vicinity of the surface of the photoresist film in the exposed portion; filling the groove with an etching stopper that is highly resistant to oxygen ion reactive etching, and etching the photoresist film by an oxygen ion reactive etching method using the etching stopper filled in the groove as an etching mask. and a step of etching the material to be etched using a pattern formed by the etching process and made of a photoresist film as an etching mask.

【０００５】[0005]

【作用】このように構成した本発明にあっては、既存の
光リソグラフィー装備をそのまま用いながらも限界解像
度以下の次世代微細パターンを形成できるので、非常に
経済的であり限界解像度を克服できる長所を有する。[Operation] The present invention configured as described above has the advantage of being extremely economical and capable of overcoming the critical resolution, since it is possible to form next-generation fine patterns below the critical resolution while using existing optical lithography equipment as is. has.

【０００６】[0006]

【実施例】以下、添付した図面を参照して本発明を詳細
に説明する。図１は、マスクパターンサイズ対実際フォ
トレジストのパターンサイズとの線幅線形図を示したグ
ラフである。図１に示したように、従来のフォトレジス
ト工程において、マスクのパターンサイズが１．０〜０
．６μｍまではフォトレジストパターンが割合に忠実に
転写されているが、０．５〜０．４μｍにおいてはフォ
トレジストパターンのマスクのパターンがマスクのパタ
ーンサイズよりも大きくなり、０．４μｍ以下ではパタ
ーンが形成されないことが分かる。図２Ａ〜図２Ｄは、
マスクに形成されたパターンの線幅Ｌ及び間隔Ｓをそれ
ぞれ０．５μｍ、０．４５μｍ、０．４μｍ及び０．３
５μｍにした時、実際に得られるフォトレジストパター
ンの形状を示したＳＥＭ写真である。図２Ｄで０．３５
μｍの場合はパターンが完成されないことが分かる。本
発明において、かかる限界解像度以下でパターンの完成
されない場合、未完成パターンのフォトレジスト以外の
有・無機物質を塗布しエッチバック工程を通じて平坦化
した後、残された有・無機物質を蝕刻マスクとして用い
て下層のフォトレジストを乾式エッチングすることによ
り、未完成のパターンを完全なパターンに形成させるも
のである。すなわち、本発明は、既存の光リソグラフィ
ー設備及び工程上の限界による線幅線形性（ＣＤ　　Ｌ
ｉｎｅａｒｉｔｙ）が成立されない限界解像度以下の完
全なパターンをエッチバック工程とフォトレジストの乾
式蝕刻方法により完全に形成することにより限界解像度
以下の微細パターンを形成することが可能になる。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 is a graph showing a line width linear diagram of mask pattern size versus actual photoresist pattern size. As shown in Figure 1, in the conventional photoresist process, the mask pattern size is 1.0 to 0.
．． The photoresist pattern is transferred faithfully up to 6 μm, but at 0.5 to 0.4 μm, the photoresist pattern mask pattern becomes larger than the mask pattern size, and below 0.4 μm, the pattern is It can be seen that it is not formed. FIGS. 2A to 2D are
The line width L and interval S of the pattern formed on the mask are 0.5 μm, 0.45 μm, 0.4 μm, and 0.3 μm, respectively.
This is a SEM photograph showing the shape of a photoresist pattern actually obtained when the thickness is set to 5 μm. 0.35 in Figure 2D
It can be seen that the pattern is not completed in the case of μm. In the present invention, if the pattern is not completed below the resolution limit, an organic/inorganic material other than the photoresist of the unfinished pattern is applied and planarized through an etch-back process, and the remaining organic/inorganic material is used as an etching mask. The unfinished pattern is formed into a complete pattern by dry etching the underlying photoresist using the photoresist. That is, the present invention improves linewidth linearity (CD L) due to existing optical lithography equipment and process limitations.
By completely forming a complete pattern with a resolution below the critical resolution in which the inarity (inarity) is not established using an etch-back process and a photoresist dry etching method, it becomes possible to form a fine pattern with a resolution below the critical resolution.

【０００７】図３Ａ〜図３Ｇを参照して本発明を詳細に
説明する。図３Ａを参照すれば、被蝕刻物質、たとえば
半導体基板１０上にフォトレジスト膜１１を所定の厚さ
で被覆する。ここでフォトレジスト膜１１は、高解像度
フォトレジストでベース樹脂であるノボラック系樹脂に
感光材であるナフトキノン（ｎａｐｈｔｈ−ｏｑｕｉｎ
ｏｎｅ）化合物を有するｇ−ライン（４３６ｎｍ）用フ
ォトレジスト、たとえばＴＳＭＲ−Ｖ３（東京応化）、
ＰＦＲ　　ＧＸ１００（日本合成ゴム）、ＦＨ−６３０
０（富士Ｈｕｎｔ）、ＭＣＰＲ３０００（三菱化学）等
と、ｉ−ライン（３６５ｎｍ）用フォトレジスト、たと
えばＴＳＭＲ−３５６ｉ、ＴＳＭＲ−ｉ１１００（東京
応化）、ＰＦＲ　　ＩＸ１００（日本合成ゴム）等が用
いられる。また、化学増幅（Ｃｈｅｍｉｃａｌ　　Ａｐ
ｌｉｆｉｃａｔｉｏｎ）型レジストを使うこともできる
。図３Ｂを参照すれば、前記フォトレジスト膜１１の限
界解像度以下の線幅Ｌ及び間隔Ｓを有するパターンの形
成されたマスク１５を通じて前記フォトレジスト膜１１
を露光させる。露光時には、フォトレジストの種類によ
りｇ−ライン用ステッパ、ｉライン用ステッパ、広帯域
（２５０ｎｍ〜４６０ｎｍ）ステッパ、電子ビーム露光
器、ｘ線露光器またはエキシマレーザステッパ等が使え
る。 ここで限界解像度は、現行ｇ−ラインステッパ（ＮＡ＝
０．４５）においては０．４５μｍ、ｉラインステッパ
（ＮＡ＝０．４５）においては０．４０μｍ、エキシマ
レーザステッパ（ＮＡ＝０．４５）においては０．３５
μｍであることが知られている。したがってｇ−ライン
ステッパ（ＮＡ＝０．４５）を使用する場合、Ｌ＆Ｓは
０．３μｍ、エキシマレーザステッパ（ＮＡ＝０．４５
）においては０．２０μｍまでできる。すなわち、本発
明においては、未完成パターンであってもフォトレジス
ト膜の表面近傍に所望のＬ＆Ｓのサイズを有する未完成
パターンが得られれば良い。The present invention will be described in detail with reference to FIGS. 3A to 3G. Referring to FIG. 3A, a photoresist layer 11 is coated on a material to be etched, such as a semiconductor substrate 10, to a predetermined thickness. Here, the photoresist film 11 is a high-resolution photoresist consisting of novolak resin as a base resin and naphthoquinone (naphth-oquinone) as a photosensitive material.
one) compound for g-line (436 nm), such as TSMR-V3 (Tokyo Ohka),
PFR GX100 (Japanese Synthetic Rubber), FH-630
0 (Fuji Hunt), MCPR3000 (Mitsubishi Chemical), and i-line (365 nm) photoresists such as TSMR-356i, TSMR-i1100 (Tokyo Ohka), PFR IX100 (Japan Synthetic Rubber), etc. are used. In addition, chemical amplification (Chemical Ap
It is also possible to use a type resist. Referring to FIG. 3B, the photoresist film 11 is formed through a mask 15 having a pattern having a line width L and a spacing S smaller than the resolution limit of the photoresist film 11.
expose to light. At the time of exposure, a G-line stepper, an i-line stepper, a broadband (250 nm to 460 nm) stepper, an electron beam exposure device, an X-ray exposure device, an excimer laser stepper, etc. can be used depending on the type of photoresist. Here, the limiting resolution is the current g-line stepper (NA=
0.45 μm for i-line stepper (NA=0.45), 0.40 μm for excimer laser stepper (NA=0.45), and 0.35 μm for excimer laser stepper (NA=0.45).
It is known that it is μm. Therefore, when using a g-line stepper (NA=0.45), L&S is 0.3 μm, and an excimer laser stepper (NA=0.45)
) can be up to 0.20 μm. That is, in the present invention, even if it is an unfinished pattern, it is sufficient to obtain an unfinished pattern having a desired L&S size near the surface of the photoresist film.

【０００８】図３Ｃを参照すれば、露光されたフォトレ
ジスト膜１１を現像して、フォトレジスト膜１１の表面
近傍にＬ＆Ｓサイズを有する凹溝１３を有する未完成パ
ターン１４を得る。図３Ｄを参照すれば、凹溝１３の形
成されたフォトレジスト膜１１上に蝕刻阻止物質層１２
をその表面がおよそ平坦に所定厚さで被覆する。ここで
蝕刻阻止物質層１２はフォトレジスト膜１１と乾式蝕刻
率が異なる物質であれば可能である。たとえば、フォト
レジスト膜１１を酸素イオン反応性エッチング方法で蝕
刻する場合は酸素イオン反応性エッチングに対して耐性
の強い物質、たとえばＳＯＧ膜、ＴＥＯＳ膜、またはＰ
Ｅ−Ｏｘｉｄｅ膜等が使える。ここで、ＳＯＧ膜を使う
場合、ＳＯＧ膜を塗布する前にフォトレジスト膜を所定
温度で適正時間の間ベークして硬化させるのが好適であ
る。蝕刻阻止物質層の厚さはＳＯＧ膜の場合、およそ３
０００オングストローム以上であれば良く、ＴＥＯＳ膜
及びＰＥ−Ｏｘｉｄｅ膜の場合はおよそ１０００オング
ストローム以上であれば良い。Referring to FIG. 3C, the exposed photoresist film 11 is developed to obtain an unfinished pattern 14 having grooves 13 of L&S size near the surface of the photoresist film 11. Referring to FIG. 3D, an etching inhibiting material layer 12 is formed on the photoresist film 11 in which the groove 13 is formed.
The surface is coated with a predetermined thickness so that the surface is approximately flat. Here, the etching stopper layer 12 may be made of a material having a dry etching rate different from that of the photoresist film 11. For example, when etching the photoresist film 11 using an oxygen ion reactive etching method, a material that is highly resistant to oxygen ion reactive etching, such as an SOG film, a TEOS film, or a P
E-Oxide film etc. can be used. Here, when using an SOG film, it is preferable to harden the photoresist film by baking it at a predetermined temperature for an appropriate time before applying the SOG film. The thickness of the etch-stopping material layer is approximately 3 mm in the case of SOG film.
The thickness may be at least 1,000 angstroms, and in the case of TEOS films and PE-Oxide films, it may be approximately 1,000 angstroms or more.

【０００９】図３Ｅを参照すれば、被覆された蝕刻阻止
物質層１１を使った蝕刻阻止物質層に対して蝕刻選択比
の優秀なイオン反応性エッチング方法で蝕刻して凹溝１
３を除いたフォトレジスト膜１１上の蝕刻阻止物質層を
完全に除去して凹溝１３内にのみ蝕刻阻止物質層が埋め
立てられるように形成する。図３Ｆを参照すれば、前記
凹溝１３内に埋め立てられた蝕刻阻止物質層１２を蝕刻
マスクとして酸素イオン反応性エッチング方法でフォト
レジスト膜１１を乾式蝕刻して所望の限界解像度以下の
微細パターンを得る。図３Ｇを参照すれば、前記得られ
た微細パターンを蝕刻マスクで用いて被蝕刻物質たとえ
ば半導体基板を蝕刻することにより所望の最終微細パタ
ーンを形成する。Referring to FIG. 3E, the groove 1 is formed by etching the coated etch stop material layer 11 using an ion reactive etching method with excellent etch selectivity.
The etching inhibiting material layer on the photoresist film 11 except for photoresist film 3 is completely removed so that only the groove 13 is filled with the etching inhibiting material layer. Referring to FIG. 3F, the photoresist film 11 is dry-etched using an oxygen ion reactive etching method using the etching-blocking material layer 12 filled in the groove 13 as an etching mask to form a fine pattern with a desired resolution limit. obtain. Referring to FIG. 3G, a desired final fine pattern is formed by etching a material to be etched, such as a semiconductor substrate, using the obtained fine pattern with an etching mask.

【００１０】次に、実験例を通じて本発明をより詳細に
説明する。半導体基板１１上にＴＳＭＲ−ｉ１１００（
東京応化社製品）のフォトレジスト膜を被覆する。ここ
で、ＴＳＭＲ−ｉ１１００の限界解像度はおよそ０．５
μｍ程である。線幅Ｌ及び間隔Ｓが０．３μｍであるパ
ターンの形成されたマスクを用いてＮＡが０．４５であ
るｉ−ライン（３６５ｎｍ）ステッパ（ｓｔｅｐｐｅｒ
）でフォトレジスト膜を露光し、露光されたフォトレジ
スト膜を現像した結果０．３５μｍの幅を有する凹溝が
フォトレジスト膜の表面付近に形成された。前記凹溝が
形成されたフォトレジスト膜をホットプレートオーブン
で２００℃で６０秒間ベークして硬化させる。次に、フ
ォトレジスト膜上に５０００オングストロームのＳＯＧ
膜を塗布し、塗布されたＳＯＧ膜を１８０℃で６０秒間
ベークして硬化させる。テトラフルオライド（ｔｅｔｒ
ａｆｌｏｉｄｅ；ＣＦ４　）を主成分とするイオン反応
性エッチング方法でＳＯＧ膜を全面蝕刻して凹溝以外の
フォトレジスト膜上のＳＯＧ膜を完全に除去する。前記
凹溝に埋め立てられたＳＯＧ膜を蝕刻マスクとして用い
て酸素イオン反応性エッチング方法でフォトレジスト膜
を蝕刻すれば、０．３５μｍの線幅及び間隔を有する限
界解像度以下の微細パターンが得られる。Next, the present invention will be explained in more detail through experimental examples. TSMR-i1100 (
Coat with a photoresist film (product of Tokyo Ohkasha Co., Ltd.). Here, the limit resolution of TSMR-i1100 is approximately 0.5
It is about μm. An i-line (365 nm) stepper with an NA of 0.45 was fabricated using a patterned mask with a line width L and a spacing S of 0.3 μm.
), and as a result of developing the exposed photoresist film, a groove having a width of 0.35 μm was formed near the surface of the photoresist film. The photoresist film having the grooves formed thereon is baked in a hot plate oven at 200° C. for 60 seconds to harden it. Next, 5000 angstroms of SOG was placed on the photoresist film.
The film is applied and the applied SOG film is cured by baking at 180° C. for 60 seconds. Tetrafluoride (tetr
The entire surface of the SOG film is etched using an ion-reactive etching method mainly containing afloid (CF4) to completely remove the SOG film on the photoresist film except for the grooves. If the photoresist film is etched using an oxygen ion reactive etching method using the SOG film filled in the groove as an etching mask, a fine pattern below the critical resolution having a line width and interval of 0.35 μm can be obtained.

【００１１】本発明は、上記した実施例に限られず、当
業者による多くの変更が本発明の技術的思想内において
可能であるのはもちろんである。The present invention is not limited to the embodiments described above, and it goes without saying that many modifications can be made by those skilled in the art within the technical spirit of the present invention.

【００１２】0012

【発明の効果】以上述べてきたように、本発明の微細パ
ターン形成方法は、現在光リソグラフィー設備及び工程
により得られる限界解像度の微細パターンよりも微細な
パターンを新規の説明及び工程の変更なしに得られるの
で極めて経済的である。たとえば、１６Ｍｂ　　ＤＲＡ
Ｍで要求される０．５μｍの微細パターン技術及び装備
をそのまま用いて６４Ｍｂ　　ＤＲＡＭで要求される０
．３５μｍ微細パターンを形成でき、０．３５μｍエキ
シマレーザーステッパ装置を用いて２５６Ｍｂ　　ＤＲ
ＡＭで要求される０．２μｍの微細パターンが得られる
。Effects of the Invention As described above, the method for forming fine patterns of the present invention enables the formation of finer patterns than the limit resolution fine patterns obtained by current optical lithography equipment and processes without any new explanation or process changes. It is extremely economical. For example, 16Mb DRA
0.5μm fine pattern technology and equipment required for 64Mb DRAM.
．． A 35μm fine pattern can be formed, and a 256Mb DR can be formed using a 0.35μm excimer laser stepper device.
A fine pattern of 0.2 μm required for AM can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

【図１】図１は、マスクパターンサイズ対フォトレジス
トパターンサイズのＣＤ線形図を示したグラフである。FIG. 1 is a graph showing a CD linear diagram of mask pattern size versus photoresist pattern size.

【図２】図２Ａ〜Ｄは、ｉ−ライン（ＮＡ＝０．４５）
を用いたとき、それぞれ０．５μｍ、０．４５μｍ、０
．４０μｍ及び０．３５μｍの線幅（Ｌ）及び間隔（Ｓ
）に対して得られたフォトレジストパターンのＳＥＭ写
真である。[Figure 2] Figures 2A-D are i-line (NA = 0.45)
When using 0.5 μm, 0.45 μm, 0
．． Line width (L) and spacing (S) of 40 μm and 0.35 μm
) is an SEM photograph of a photoresist pattern obtained for (a).

【図３】図３Ａ〜Ｇは、本発明による光リソグラフィー
の限界解像度以下の微細パターンを形成する工程順序を
示した図である。3A to 3G are diagrams illustrating a process sequence for forming a fine pattern below the limit resolution of optical lithography according to the present invention.

【符号の説明】[Explanation of symbols]

１０…被蝕刻物質 １１…フォトレジスト膜 １２…蝕刻阻止物質層 １３…凹溝 １４…未完成パターン １５…マスク 10...Substance to be eroded 11...Photoresist film 12... Etch-blocking material layer 13...concave groove 14...Unfinished pattern 15...Mask

Claims (10)

【特許請求の範囲】[Claims] 【請求項１】被蝕刻物質上にフォトレジスト膜を被覆す
る工程と、前記フォトレジスト膜の限界解像度以下の線
幅及び間隔を有するパターンの形成されたマスクを通じ
て前記フォトレジスト膜を露光し、露光されたフォトレ
ジスト膜を現像して露光された部分のフォトレジスト膜
の表面近傍にのみ薄く凹溝を形成する工程と、前記形成
された凹溝を酸素イオン反応性エッチングに対して耐性
の強い蝕刻阻止物で埋め立てる工程と、前記凹溝に埋め
立てられた蝕刻阻止物を蝕刻マスクとして用いて前記フ
ォトレジスト膜を酸素イオン反応性エッチング方法で蝕
刻する工程と、前記蝕刻工程により形成されフォトレジ
スト膜よりなったパターンを蝕刻マスクとして用いて前
記被蝕刻物質を蝕刻する工程を具備することを特徴とす
る光リソグラフィーの限界解像度以下の微細パターン形
成方法。1. A step of coating a photoresist film on a material to be etched, and exposing the photoresist film to light through a mask formed with a pattern having a line width and an interval less than the critical resolution of the photoresist film, and exposing the photoresist film to light. A process of developing the photoresist film to form a thin groove only in the vicinity of the surface of the photoresist film in the exposed area, and etching the formed groove with high resistance to oxygen ion reactive etching. a step of filling with a blocker, a step of etching the photoresist film by an oxygen ion reactive etching method using the etching stopper filled in the groove as an etching mask, and a step of etching the photoresist film formed by the etching step. A method for forming a fine pattern with a resolution below the limit resolution of optical lithography, comprising the step of etching the material to be etched using the resulting pattern as an etching mask. 【請求項２】前記フォトレジスト膜はサブミクロン以下
の限界解像度を有する高解像度フォトレジストであるこ
とを特徴とする請求項１記載の光リソグラフィーの限界
解像度以下の微細パターン形成方法。2. The method for forming a fine pattern below the limit resolution of photolithography according to claim 1, wherein the photoresist film is a high resolution photoresist having a limit resolution below submicrons. 【請求項３】前記フォトレジスト膜はノボラック系樹脂
を用いたことを特徴とする請求項１記載の光リソグラフ
ィーの限界解像度以下の微細パターン形成方法。3. The method for forming a fine pattern below the limit resolution of optical lithography according to claim 1, wherein the photoresist film uses a novolac resin. 【請求項４】前記フォトレジスト膜はｇ−ライン（４３
６ｎｍ）、ｉ−ライン（３６５μｍ）または２５０μｍ
〜４６０μｍの広帯域紫外線のうちいずれか１つにより
露光することを特徴とする請求項１記載の光リソグラフ
ィーの限界解像度以下の微細パターン形成方法。4. The photoresist film has a g-line (43
6nm), i-line (365μm) or 250μm
2. The method of forming a fine pattern with a resolution below the limit resolution of photolithography according to claim 1, wherein the exposure is carried out using any one of broadband ultraviolet light having a wavelength of 460 [mu]m. 【請求項５】前記フォトレジスト膜は化学増幅型レジス
トであることを特徴とする請求項１記載の光リソグラフ
ィーの限界解像度以下の微細パターン形成方法。5. The method of forming a fine pattern below the limit resolution of optical lithography according to claim 1, wherein the photoresist film is a chemically amplified resist. 【請求項６】前記フォトレジスト膜は電子ビーム、ｘ−
ｒａｙ、またはエキシマレーザーのうちいずれか１つに
より露光することを特徴とする請求項１記載の光リソグ
ラフィーの限界解像度以下の微細パターン形成方法。6. The photoresist film is subjected to electron beam, x-
2. The method for forming a fine pattern with a resolution below the limit resolution of optical lithography according to claim 1, wherein the exposure is carried out using one of a ray and an excimer laser. 【請求項７】前記蝕刻阻止物質はＳＯＧ　膜、ＴＥＯＳ
膜またはＰＥ−Ｏｘｉｄｅのうちいずれか１つであるこ
とを特徴とする請求項１記載の光リソグラフィーの限界
解像度以下の微細パターン形成方法。7. The etching inhibiting material is SOG film, TEOS film, etc.
2. The method of forming a fine pattern below the limit resolution of optical lithography according to claim 1, wherein the method is one of a film or PE-Oxide. 【請求項８】前記凹溝を蝕刻阻止物質で埋め立てる工程
は前記凹溝の形成されたフォトレジスト膜上に蝕刻阻止
物質をその表面がおよそ平坦に所定厚さで被覆した後、
エッチバック工程で被覆された蝕刻阻止物質を全面蝕刻
して前記凹溝以外のフォトレジスト膜上の蝕刻阻止物質
を完全に除去することを特徴とする請求項１記載の光リ
ソグラフィーの限界解像度以下の微細パターン形成方法
。8. The step of filling the groove with an etching inhibiting material includes coating the photoresist film in which the groove is formed with an etching inhibiting material to a predetermined thickness so that the surface thereof is approximately flat;
2. A method according to claim 1, wherein the etching inhibiting material coated on the photoresist film is completely removed by etching the entire surface of the coated etching inhibiting material in the etch-back process to completely remove the etching inhibiting material on the photoresist film other than the grooves. Fine pattern formation method. 【請求項９】被蝕刻物質上にフォトレジスト膜を被覆す
る工程と、前記フォトレジスト膜の限界解像度以下の線
幅及び間隔を有するパターンの形成されたマスクを通じ
て前記フォトレジスト膜を露光し、露光されたフォトレ
ジスト膜を現像して露光された部分のフォトレジスト膜
の表面近傍にのみ薄く凹溝を形成する工程と、前記凹溝
の形成されたフォトレジスト膜上に第１乾式エッチング
に対して耐性の強い蝕刻阻止物質をその表面がおよそ平
坦に所定厚さで被覆する工程と、前記被覆された蝕刻阻
止物質を第２乾式エッチングにより全面蝕刻して前記凹
溝以外のフォトレジスト膜上の蝕刻阻止物質を完全に除
去する工程と、前記凹溝に埋め立てられた蝕刻阻止物質
を蝕刻マスクとして用いて前記フォトレジスト膜を酸素
イオン反応性エッチング方法で蝕刻する工程と、前記蝕
刻工程により形成されフォトレジスト膜よりなったパタ
ーンを蝕刻マスクとして用いて前記被蝕刻物質を蝕刻す
る工程を具備することを特徴とする光リソグラフィーの
限界解像度以下の微細パターン形成方法。9. A step of coating a photoresist film on a material to be etched, and exposing the photoresist film to light through a mask having a pattern having a line width and an interval less than a limit resolution of the photoresist film, and exposing the photoresist film to light. A step of developing the photoresist film to form a thin groove only in the vicinity of the surface of the photoresist film in the exposed portion, and a first dry etching step on the photoresist film with the groove formed thereon. A step of coating a highly resistant etching inhibiting material to a predetermined thickness so that the surface is approximately flat, and etching the entire surface of the coated etching inhibiting material by a second dry etching process to etch the photoresist film other than the grooves. a step of completely removing the blocking material; a step of etching the photoresist film by an oxygen ion reactive etching method using the etching blocking material filled in the groove as an etching mask; and a step of etching the photoresist film formed by the etching step. 1. A method for forming a fine pattern below the resolution limit of optical lithography, comprising the step of etching the material to be etched using a pattern made of a resist film as an etching mask. 【請求項１０】前記蝕刻阻止物質は、３０００オングス
トローム以上のＳＯＧ膜であることを特徴とする請求項
９記載の光リソグラフィーの限界解像度以下の微細パタ
ーン形成方法。10. The method of forming a fine pattern below the limit resolution of optical lithography according to claim 9, wherein the etching inhibiting material is an SOG film having a thickness of 3000 angstroms or more.
JP3227998A 1991-01-30 1991-09-09 Method of forming fine pattern of limit resolution or less of photolithography Pending JPH04249311A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1578 1991-01-30
KR1019910001578A KR920015482A (en) 1991-01-30 1991-01-30 Micropattern forming method below the limit resolution of optical lithography

Publications (1)

Publication Number Publication Date
JPH04249311A true JPH04249311A (en) 1992-09-04

Family

ID=19310487

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (6)

Country Link
JP (1) JPH04249311A (en)
KR (1) KR920015482A (en)
DE (1) DE4126635A1 (en)
FR (1) FR2672138A1 (en)
GB (1) GB2252449A (en)
IT (1) IT1251004B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012059780A (en) * 2010-09-06 2012-03-22 Sumitomo Electric Ind Ltd Method of etching inorganic compound film, and method of manufacturing semiconductor optical element

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4236609A1 (en) * 1992-10-29 1994-05-05 Siemens Ag Method for forming a structure in the surface of a substrate - with an auxiliary structure laterally bounding an initial masking structure, followed by selective removal of masking structure using the auxiliary structure as an etching mask
JP2803999B2 (en) * 1993-11-10 1998-09-24 現代電子産業株式会社 Method for manufacturing fine pattern of semiconductor device
KR100229611B1 (en) * 1996-06-12 1999-11-15 구자홍 Manufacturing method of liquid crystal display device
JP2000156377A (en) 1998-11-19 2000-06-06 Murata Mfg Co Ltd Resist pattern, its forming method and forming method of wiring pattern

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4634645A (en) * 1984-04-13 1987-01-06 Nippon Telegraph And Telephone Corporation Method of forming resist micropattern
JPS63114214A (en) * 1986-09-11 1988-05-19 フェアチャイルド　セミコンダクタ　コーポレーション Plasma etching employing double-layer mask
US4878993A (en) * 1988-12-22 1989-11-07 North American Philips Corporation Method of etching thin indium tin oxide films

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012059780A (en) * 2010-09-06 2012-03-22 Sumitomo Electric Ind Ltd Method of etching inorganic compound film, and method of manufacturing semiconductor optical element

Also Published As

Publication number Publication date
IT1251004B (en) 1995-04-28
DE4126635A1 (en) 1992-08-13
ITMI912235A0 (en) 1991-08-09
GB9117267D0 (en) 1991-09-25
KR920015482A (en) 1992-08-27
ITMI912235A1 (en) 1993-02-09
GB2252449A (en) 1992-08-05
FR2672138A1 (en) 1992-07-31

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