JPH042145U - - Google Patents
Info
- Publication number
- JPH042145U JPH042145U JP4106390U JP4106390U JPH042145U JP H042145 U JPH042145 U JP H042145U JP 4106390 U JP4106390 U JP 4106390U JP 4106390 U JP4106390 U JP 4106390U JP H042145 U JPH042145 U JP H042145U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- input terminal
- storage means
- signal level
- binarized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Dc Digital Transmission (AREA)
Description
第1図乃至第3図は本考案の一実施例を示すも
ので、第1図は全体の回路図、第2図の各出力信
号のタイミングチヤート、第3図は入力と出力と
の関係を示す真理値図である。そして、第4図及
び第5図は従来例を示す夫々第1図及び第2図相
当図である。
図中、15……フリツプフロツプ回路(記憶手
段)、17……デジタル信号処理装置、22……
出力手段である。
Figures 1 to 3 show one embodiment of the present invention. Figure 1 is an overall circuit diagram, Figure 2 is a timing chart of each output signal, and Figure 3 shows the relationship between input and output. FIG. 4 and 5 are views corresponding to FIG. 1 and FIG. 2, respectively, showing a conventional example. In the figure, 15... flip-flop circuit (storage means), 17... digital signal processing device, 22...
It is an output means.
Claims (1)
るノイズを除去して出力する二値化信号出力装置
であつて、前記信号入力端子の信号レベルを一定
の基準周期毎に更新記憶する記憶手段と、この記
憶手段の記憶動作後から所定時間経過したタイミ
ングで記憶手段の記憶信号レベルと前記入力端子
の信号レベルとが一致したときのみ信号入力端子
の信号レベルに応じた信号を出力する出力手段と
を備えたことを特徴とする二値化信号出力装置。 A binarized signal output device that removes noise contained in a binarized signal applied to a signal input terminal and outputs the same, comprising a storage means for updating and storing the signal level of the signal input terminal at every fixed reference period. , output means that outputs a signal corresponding to the signal level of the signal input terminal only when the stored signal level of the storage means and the signal level of the input terminal match at a timing when a predetermined period of time has elapsed after the storage operation of the storage means; A binarized signal output device comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990041063U JPH0749879Y2 (en) | 1990-04-17 | 1990-04-17 | Binary signal output device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990041063U JPH0749879Y2 (en) | 1990-04-17 | 1990-04-17 | Binary signal output device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH042145U true JPH042145U (en) | 1992-01-09 |
JPH0749879Y2 JPH0749879Y2 (en) | 1995-11-13 |
Family
ID=31551405
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990041063U Expired - Lifetime JPH0749879Y2 (en) | 1990-04-17 | 1990-04-17 | Binary signal output device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0749879Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5058935U (en) * | 1973-10-01 | 1975-05-31 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50146254A (en) * | 1974-05-14 | 1975-11-22 |
-
1990
- 1990-04-17 JP JP1990041063U patent/JPH0749879Y2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50146254A (en) * | 1974-05-14 | 1975-11-22 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5058935U (en) * | 1973-10-01 | 1975-05-31 |
Also Published As
Publication number | Publication date |
---|---|
JPH0749879Y2 (en) | 1995-11-13 |
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