JPH04207046A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH04207046A JPH04207046A JP2340353A JP34035390A JPH04207046A JP H04207046 A JPH04207046 A JP H04207046A JP 2340353 A JP2340353 A JP 2340353A JP 34035390 A JP34035390 A JP 34035390A JP H04207046 A JPH04207046 A JP H04207046A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- sealing resin
- semiconductor element
- resin layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 90
- 229920005989 resin Polymers 0.000 claims abstract description 93
- 239000011347 resin Substances 0.000 claims abstract description 93
- 238000007789 sealing Methods 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 abstract description 30
- 239000004020 conductor Substances 0.000 abstract description 7
- 238000004519 manufacturing process Methods 0.000 description 27
- 238000005530 etching Methods 0.000 description 16
- 239000004033 plastic Substances 0.000 description 9
- 229920003023 plastic Polymers 0.000 description 9
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 238000001721 transfer moulding Methods 0.000 description 6
- 239000004593 Epoxy Substances 0.000 description 5
- PEEHTFAAVSWFBL-UHFFFAOYSA-N Maleimide Chemical compound O=C1NC(=O)C=C1 PEEHTFAAVSWFBL-UHFFFAOYSA-N 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 5
- 239000003822 epoxy resin Substances 0.000 description 5
- 239000000049 pigment Substances 0.000 description 5
- 229920000647 polyepoxide Polymers 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000012778 molding material Substances 0.000 description 4
- 238000000465 moulding Methods 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 4
- 229920001296 polysiloxane Polymers 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- ZMXDDKWLCZADIW-UHFFFAOYSA-N N,N-Dimethylformamide Chemical compound CN(C)C=O ZMXDDKWLCZADIW-UHFFFAOYSA-N 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 230000002950 deficient Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 229920002050 silicone resin Polymers 0.000 description 3
- 239000012808 vapor phase Substances 0.000 description 3
- 244000062175 Fittonia argyroneura Species 0.000 description 2
- 229920000106 Liquid crystal polymer Polymers 0.000 description 2
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000004696 Poly ether ether ketone Substances 0.000 description 2
- 239000004695 Polyether sulfone Substances 0.000 description 2
- 239000004734 Polyphenylene sulfide Substances 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical class C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 2
- 238000012536 packaging technology Methods 0.000 description 2
- 239000005011 phenolic resin Substances 0.000 description 2
- 229920006393 polyether sulfone Polymers 0.000 description 2
- 229920002530 polyetherether ketone Polymers 0.000 description 2
- -1 polyethylene terephthalate Polymers 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
- 238000004382 potting Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 229920005992 thermoplastic resin Polymers 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 239000004641 Diallyl-phthalate Substances 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000004721 Polyphenylene oxide Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- UCKMPCXJQFINFW-UHFFFAOYSA-N Sulphide Chemical compound [S-2] UCKMPCXJQFINFW-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000032683 aging Effects 0.000 description 1
- QUDWYFHPNIMBFC-UHFFFAOYSA-N bis(prop-2-enyl) benzene-1,2-dicarboxylate Chemical compound C=CCOC(=O)C1=CC=CC=C1C(=O)OCC=C QUDWYFHPNIMBFC-UHFFFAOYSA-N 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000000748 compression moulding Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 239000001033 copper pigment Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 229920006351 engineering plastic Polymers 0.000 description 1
- 229920006334 epoxy coating Polymers 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 229920002492 poly(sulfone) Polymers 0.000 description 1
- 229920001707 polybutylene terephthalate Polymers 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 239000005020 polyethylene terephthalate Substances 0.000 description 1
- 229920001470 polyketone Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 229920002803 thermoplastic polyurethane Polymers 0.000 description 1
- 238000004506 ultrasonic cleaning Methods 0.000 description 1
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 description 1
- 229920006337 unsaturated polyester resin Polymers 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
（産業上の利用分野）
本発明は、樹脂封止型半導体装置全般に関する。より詳
しくは、高密度実装が可能な超薄型パッケージに関する
。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates generally to resin-sealed semiconductor devices. More specifically, the present invention relates to an ultra-thin package that allows high-density packaging.
（従来の技術）
現在、半導体装置における素子の封止技術は、プラスチ
ックパッケージ技術と呼ばれるものが主流となっている
。このプラスチックパッケージ技術とは、半導体チップ
上に形成されたボンディングパット部と、外部リード端
子（リードフレーム）とをワイヤによって接続（ワイヤ
ボンディング）した後、素子部分を樹脂封止したもので
ある。該技術は、封止時の耐湿信頼性が良好であり、ま
た使用される材料が安価であるため好ましい。(Prior Art) Currently, the mainstream technology for encapsulating elements in semiconductor devices is called plastic packaging technology. This plastic packaging technology involves connecting bonding pads formed on a semiconductor chip and external lead terminals (lead frames) with wires (wire bonding), and then sealing the element portion with resin. This technique is preferable because it has good moisture resistance reliability during sealing and the materials used are inexpensive.
第５図に、該技術によって半導体素子が封止された典型
的なプラスチックパッケージの断面を示す。同図におい
て、５２は半導体チップ、５４は外部端子のリードフレ
ーム、５５はこれらを封止する封止樹脂である。半導体
チップ５２の表面にはポンディングパッド５３が設けら
れており、該部とリードフレーム５４とがボンディング
ワイヤ５６によって接続されている。そして、以上のよ
うに構成された半導体素子５１か、封止樹脂５５によっ
て被出される形で封止されている。該封止樹脂５５は、
−船釣には、エポキシ樹脂等をトランスファーモールド
法によって成形されている。FIG. 5 shows a cross section of a typical plastic package in which a semiconductor device is encapsulated using this technique. In the figure, 52 is a semiconductor chip, 54 is a lead frame for external terminals, and 55 is a sealing resin for sealing these. A bonding pad 53 is provided on the surface of the semiconductor chip 52, and the bonding pad 53 is connected to a lead frame 54 by a bonding wire 56. The semiconductor element 51 configured as described above is sealed with a sealing resin 55 in an exposed manner. The sealing resin 55 is
- For boat fishing, epoxy resin or the like is molded using the transfer molding method.
この他、液状樹脂を用いてポツティング法により成形す
る方法も実用化されている。In addition, a method of molding by a potting method using liquid resin has also been put into practical use.
以上のように形成されたプラスチックパッケージハ、更
に、ベーパーフェーズリフロー、赤外線リフロー、ハン
ダ浸漬等の高温処理工程によって基板上に実装される。The plastic package formed as described above is further mounted on a substrate through a high temperature treatment process such as vapor phase reflow, infrared reflow, and solder immersion.
一方、上記プラスチックパッケージは、半導体装置の高
密度実装化に伴って、小型化、薄型化が進められている
。しかし、前記第５図のような構造をとるプラスチック
パッケージでは、複雑な電極構造、およびリードフレー
ム構造等が障害となり、小型化、薄型化には限界がある
。このような問題を解決するため、現在種々のパッケー
ジが提案および実用化されている。On the other hand, the above-mentioned plastic packages are becoming smaller and thinner as semiconductor devices become more densely packaged. However, with the plastic package having the structure shown in FIG. 5, the complicated electrode structure, lead frame structure, etc. pose obstacles, and there are limits to miniaturization and thinning. In order to solve these problems, various packages are currently being proposed and put into practical use.
例えば、薄型Ｓ ＯＰ （Ｓｍａｌｌ ０ｕｔｌｉｎｅ
Ｐａｃｋａｇｅ ）としてＴ Ｓ ＯＰ （Ｔｈｉｎ
Ｓｍａｌｌ ０ｕｔｌｉｎｅ Ｐａｃｋａｇｅ）、Ｖ
Ｓ ＯＰ （Ｖｅｒｙ Ｓｍａｌｌ ０ｕｔｌｉｎｅ
Ｐａｃｋａｇｅ） 、等の薄型バッケニジが実用化さ
れている。また、ＴＡＢ （Ｔａｐｅ Ａｕｔｏｍａｔ
ｅｄ Ｂｏｎｄｉｎｇ）と呼ばれる実装技術も実用化さ
れ、最近急速に普及している。このＴＡＢ技術とは、ポ
リイミドフィルム上に外部リードとして銅電極を形成さ
せ、これにチップを直接、連続的に実装し、封止樹脂を
成形した上で基板上に平面付けするものである。この技
術では、チップ上のボンディングパットとリードフレー
ムとをワイヤボンディングする必要かなく、また基板に
実装する際にリードフレームとして非常に薄い銅箔を使
用するため、厚みが１關以下の超小型パッケージを達成
している。この他、ペアチップをリードフレームを使用
せずに直接基板に実装し、基板上で樹脂封止を行うＣＯ
Ｂ （ｃｈｉｐ ０ｎＢｏａｒｄ）、ＣＯＧ （Ｃｈｉ
ｐ Ｏｎ Ｇｌａｓｓ ） 、ＣＯＦ （Ｃｈｉｐ ０
ｎＦｌｅｘｉｂｌｅ Ｂｏａｒｄ）の各実装技術が実用
化されており、これによってもチップを封止するパッケ
ージの小型化、薄型化が達成されている。For example, a thin SOP (Small 0utline)
Package) as T SOP (Thin
Small 0utline Package), V
S OP (Very Small 0utline
Thin buckets such as ``Package'' and the like have been put into practical use. In addition, TAB (Tape Auto
A mounting technology called ed bonding has also been put into practical use and has recently become rapidly popular. This TAB technology involves forming copper electrodes as external leads on a polyimide film, directly and continuously mounting chips on the polyimide film, molding a sealing resin, and then flattening the copper electrodes onto a substrate. This technology eliminates the need for wire bonding between the bonding pads on the chip and the lead frame, and uses very thin copper foil as the lead frame when mounting on the board, resulting in an ultra-small package with a thickness of less than 1 inch. has been achieved. In addition to this, CO
B (chip 0nBoard), COG (Chi
p On Glass ), COF (Chip 0
nFlexible Board) mounting techniques have been put into practical use, and this has also led to smaller and thinner packages for sealing chips.
しかしながら、前記ＴＡＢ技術では、使用される材料と
して高価なポリイミドフィルムを使用するためコストが
高いという欠点がある。またテープ上で実装し樹脂封止
を行うため、樹脂の硬化工程のエージング（バーンイン
テスト）が困難である。一方、ＣＯＢ、、ＣＯＧ、ＣＯ
Ｆの各実装技術では、素子が基板上でリードフレームを
使用せず直接実装されているため、実装後に素子の不良
が発生した際、不良素子のみを選択的に交換することが
できないという欠点がある。However, the TAB technique has the disadvantage of high cost because it uses an expensive polyimide film as a material. Furthermore, since the device is mounted on tape and sealed with resin, aging (burn-in test) during the resin curing process is difficult. On the other hand, COB, , COG, CO
In each of the F mounting technologies, the elements are directly mounted on the board without using a lead frame, so when a defective element occurs after mounting, it is not possible to selectively replace only the defective element. be.
また、前記各実装技術において、樹脂封止技術としては
、主に液状樹脂を使用したポツティング成形が用いられ
る。しかし、前記液状樹脂は、−船釣に封止樹脂として
の耐湿信頼性が、前記トランスファーモールド成形で使
用されるエポキシ樹脂等に比べ不充分である。即ち、パ
ッケージを基板に実装する際の前記ベーパーフェーズリ
フロー等の高温処理において、封止樹脂が、剥離を伴う
クラックを生じ、これが外部に達する場合がある。Furthermore, in each of the mounting techniques described above, potting molding using liquid resin is mainly used as the resin sealing technique. However, the liquid resin has insufficient moisture resistance reliability as a sealing resin for boat fishing compared to the epoxy resin used in the transfer molding. That is, in high-temperature processing such as the vapor phase reflow when mounting a package on a substrate, the sealing resin may develop cracks accompanied by peeling, which may reach the outside.
（発明が解決しようとする課題）
本発明は、上記問題点に鑑みてなされたもので、その課
題とするところは、上記従来の欠点を解消し、半導体装
置の高密度実装、小型化、薄型化に対応し、且つ気密性
、耐湿信頼性等の半導体装置として好適な性能が付与さ
れた、樹脂封止型半導体装置を提供することである。さ
らに詳しくは、本発明の課題は、半導体素子がボンディ
ングワイヤーおよび複雑な形状のリードフレーム等を使
用せずに、基板上に実装できる半導体装置として好適な
性能を有する樹脂封止型半導体装置を提供することであ
る。(Problems to be Solved by the Invention) The present invention has been made in view of the above-mentioned problems, and its object is to solve the above-mentioned conventional drawbacks, achieve high-density packaging, miniaturization, and thinning of semiconductor devices. It is an object of the present invention to provide a resin-sealed semiconductor device that is compatible with the current technology and has suitable performance as a semiconductor device such as airtightness and moisture resistance reliability. More specifically, it is an object of the present invention to provide a resin-sealed semiconductor device having suitable performance as a semiconductor device in which semiconductor elements can be mounted on a substrate without using bonding wires, lead frames with complicated shapes, etc. It is to be.
（課題を解決するための手段）
本発明の樹脂封止型半導体装置は、半導体チップ上に複
数個のボンディングパット部が設けられた構造を有する
半導体素子と、該半導体素子の表面を封止した封止樹脂
層とを具備し、該封止樹脂層に外部から前記各ボンディ
ングパット部まで達する貫通穴が穿設され、該貫通穴内
に前記半導体素子を基板に実装するための電極が設けら
れていることを特徴とする。(Means for Solving the Problems) A resin-sealed semiconductor device of the present invention includes a semiconductor element having a structure in which a plurality of bonding pad portions are provided on a semiconductor chip, and a surface of the semiconductor element that is sealed. a sealing resin layer, a through hole is formed in the sealing resin layer reaching each of the bonding pads from the outside, and an electrode for mounting the semiconductor element on a substrate is provided in the through hole. It is characterized by the presence of
（作用）
上記のように構成された本発明の樹脂封止型半導体装置
によると、前記ボンディングパット部まで達する貫通穴
内に電極が設けられており、その外部側の端部において
基板に実装させることが可能となる。従って、従来の半
導体素子を基板に実装する際に必要であった、ボンディ
ングワイヤおよびリードフレーム等が不必要となるため
、半導体素子上のボンディングパット部から基板接続部
までの距離が非常に短縮される。この結果、小型で且つ
薄型のパッケージの形成が可能となり、高密度実装型の
半導体装置の更なる小型化および薄型化が達成される。(Function) According to the resin-sealed semiconductor device of the present invention configured as described above, an electrode is provided in the through hole reaching the bonding pad portion, and the electrode is mounted on the substrate at the outer end thereof. becomes possible. This eliminates the need for bonding wires, lead frames, etc. that were required when conventionally mounting semiconductor elements on a board, and the distance from the bonding pad on the semiconductor element to the board connection part is greatly shortened. Ru. As a result, it is possible to form a small and thin package, and further miniaturization and thinning of a high-density packaging type semiconductor device can be achieved.
また、上記ボンディングワイヤおよびリードフレームが
不必要であるという点では、以下の作用をも奏する。即
ち、リードフレームを使用した場合の複雑な構造を有す
る多ピン化指向のリードフレーム間における、接触およ
び変形といった問題が解消される。Further, in that the bonding wire and lead frame are unnecessary, the following effects are also achieved. That is, when lead frames are used, problems such as contact and deformation between lead frames that have a complicated structure and are oriented toward increasing the number of pins can be solved.
この他、封止樹脂の粘度の影響であるボンディングワイ
ヤの変形接触を考慮する必要がないため、封止樹脂とし
て幅広い種類の樹脂が使用可能となる。従って、封止樹
脂として、各種の素子表面との接着性に非常に優れた樹
脂等を使用することにより、パッケージを基板に実装す
る際の高温処理による、封止樹脂の剥離に伴うクラック
を低減させることが可能である。こうして、半導体装置
の耐湿信頼性が保障され、性能の向上が達成される。In addition, since there is no need to consider deformed contact of the bonding wire due to the viscosity of the sealing resin, a wide variety of resins can be used as the sealing resin. Therefore, by using a resin with excellent adhesion to various element surfaces as the encapsulating resin, cracks caused by peeling of the encapsulating resin due to high temperature treatment when mounting the package on the board can be reduced. It is possible to do so. In this way, the moisture resistance reliability of the semiconductor device is guaranteed and performance is improved.
（実施、例）
以下、本発明の樹脂封止型半導体装置の実施例を、図面
を参照して説明する。尚、この実施例は、本発明の理解
を容易にする目的で記載されるものであり、本発明を限
定するものではない。(Example) Examples of the resin-sealed semiconductor device of the present invention will be described below with reference to the drawings. Note that this example is described for the purpose of facilitating understanding of the present invention, and is not intended to limit the present invention.
まず、第１図を参照して、本発明の第一実施例による樹
脂封止型半導体装置の断面構造を説明する。First, with reference to FIG. 1, a cross-sectional structure of a resin-sealed semiconductor device according to a first embodiment of the present invention will be described.
同図において、１は半導体素子である。該半導体素子１
は、半導体チップ２上に複数個のポンディングパッド３
が設けられた構造となっている。In the figure, 1 is a semiconductor element. The semiconductor element 1
is a plurality of bonding pads 3 on a semiconductor chip 2.
The structure is equipped with
該半導体素子１の表面には、封止樹脂層４が形成されて
いる。該封止樹脂層４における前記ポンディングパッド
３の上部には、外部に貫通する貫通穴５が形成されてお
り、その内部には導電性材料が充填され、外部電極６を
形成している。この外部電極６は、同図のように貫通穴
５から若干露出する形で形成されることが好ましい。A sealing resin layer 4 is formed on the surface of the semiconductor element 1. A through hole 5 penetrating to the outside is formed above the bonding pad 3 in the sealing resin layer 4, and the inside thereof is filled with a conductive material to form an external electrode 6. It is preferable that the external electrode 6 is formed in a manner that it is slightly exposed from the through hole 5 as shown in the figure.
以上のように構成された本発明の第一実施例による樹脂
封止型半導体装置は、外部電極６の端部において基板に
実装され得る。The resin-sealed semiconductor device according to the first embodiment of the present invention configured as described above can be mounted on a substrate at the end of the external electrode 6.
同図に示す如く、本発明の第一実施例による樹脂封止型
半導体装置では、半導体素子１におけるポンディングパ
ッド３と、基板実装用の外部電極６が直結している。こ
の様に、本発明の樹脂封止型半導体装置は、前記第５図
に示したボンディングワイヤおよびリードフレーム等を
使用した従来のプラスチックパッケージに比べ、半導体
素子から外部電極に至る構造が非常に簡易である。従っ
て、本発明の樹脂封止型半導体装置は、小型化および薄
型化に対応が可能となる。As shown in the figure, in the resin-sealed semiconductor device according to the first embodiment of the present invention, a bonding pad 3 on a semiconductor element 1 and an external electrode 6 for mounting on a substrate are directly connected. As described above, the resin-sealed semiconductor device of the present invention has a much simpler structure from the semiconductor element to the external electrodes than the conventional plastic package using bonding wires, lead frames, etc. shown in FIG. It is. Therefore, the resin-sealed semiconductor device of the present invention can be made smaller and thinner.
以下に、上記実施例の樹脂封止型半導体装置における構
成要素について、更に詳細に説明するまず、前距封止樹
脂層４に使用される封止樹脂としては、特に制限されな
いが、熱可塑性樹脂または熱硬化性樹脂が使用され得る
。このうち、耐熱性、耐湿信頼性、絶縁性、素子との接
着性等に優れたものが好ましい。更に、耐湿信頼性の点
で、イオン性不純物含量が低減された、低分子量成分を
含まない高純度の前記樹脂が特に好ましい。また、該封
止樹脂には、前記貫通穴５が穿設されるためエツチング
性に優れた材料が好ましく、更にエツチング性に影響を
及ぼさない範囲で微細な各種充填剤を添加することも可
能である。Below, the constituent elements of the resin-sealed semiconductor device of the above embodiment will be explained in more detail. First, the sealing resin used for the front sealing resin layer 4 is not particularly limited, but may be a thermoplastic resin. Or thermosetting resins may be used. Among these, those having excellent heat resistance, moisture resistance reliability, insulation properties, adhesion to elements, etc. are preferred. Furthermore, from the viewpoint of moisture resistance reliability, the resin is particularly preferable to have a reduced content of ionic impurities and a high purity containing no low molecular weight components. In addition, since the through hole 5 is formed in the sealing resin, a material with excellent etching properties is preferable, and it is also possible to add various fine fillers to the extent that the etching properties are not affected. be.
前記熱可塑性樹脂としては、例えば、ポリスルホン、ポ
リエーテルスルホン、ポリフェニレンスルフィド（ＰＰ
Ｓ）系樹脂、ポリヒドロキシフエ＝ Ｌ／ ンエ−ｆ
ル（Ｐ Ｐ Ｏ）系樹脂、ポリエチレンテレフタレート
系樹脂（またはその液晶ポリマー）、ポリブチレンテレ
フタレート系樹脂（またはその液晶ポリマー）、ポリエ
ーテルエーテルケトン（ＰＥＥＫ）系樹脂、ポリケトン
スルフィド（ＰＫＳ）系樹脂、フッ素樹脂（ＰＦＡ）等
のエンジニアリングプラスチック樹脂が使用され得る。Examples of the thermoplastic resin include polysulfone, polyethersulfone, and polyphenylene sulfide (PP).
S) Resin, polyhydroxyphene = L/N-f
(PPO) based resin, polyethylene terephthalate based resin (or its liquid crystal polymer), polybutylene terephthalate based resin (or its liquid crystal polymer), polyether ether ketone (PEEK) based resin, polyketone sulfide (PKS) based resin, Engineering plastic resins such as fluororesin (PFA) may be used.
前記熱硬化性樹脂としては、例えば、エポキシ系樹脂、
フェノール系樹脂、マレイミド系樹脂、シリコーン系樹
脂、ウレタン系樹脂、ジアリルフタレート樹脂、不飽和
ポリエステル樹脂か使用され得る。Examples of the thermosetting resin include epoxy resin,
Phenolic resins, maleimide resins, silicone resins, urethane resins, diallyl phthalate resins, and unsaturated polyester resins can be used.
この他、ＵＶ照射に対して感光性を有するアクリル変性
エポキシ樹脂等を使用することもてきる。In addition, acrylic-modified epoxy resins and the like that are sensitive to UV irradiation can also be used.
このように、本発明の樹脂封止型半導体装置には、その
性能を考慮して、多種に亘る封止樹脂が使用され得る。As described above, a wide variety of sealing resins can be used in the resin-sealed semiconductor device of the present invention, taking into account its performance.
前記封止樹脂層４の厚みは、２關以下であることが好ま
しい。これは、該樹脂厚が２ｍｍを超えると、貫通穴５
を穿設するエツチングプロセスが困難になるためである
。更に、該樹脂厚は、封止樹脂の素材による耐湿信頼性
、上記エツチング速度および精度に応じて適宜選択され
得る。The thickness of the sealing resin layer 4 is preferably 2 mm or less. If the thickness of the resin exceeds 2 mm, the through hole 5
This is because the etching process for drilling holes becomes difficult. Further, the resin thickness can be appropriately selected depending on the moisture resistance reliability of the material of the sealing resin and the etching speed and accuracy.
また、前記貫通穴５に充填される導電性材料としては、
例えば、低融点金属、導電性樹脂等が使用され得る。特
に前記導電性樹脂としては、ベース樹脂、例χば、フェ
ノール樹脂、ケイ素樹脂、アクリル樹脂、エポキシ樹脂
、マレイミド樹脂に、導電性顔料、例えば、銀糸、銀−
銅複合系、銅系、ニッケル系等の顔料を分散させたもの
が使用され得る。これらのうち、導電性、吸湿性、接着
性、耐湿信頼性の点から、高純度化されたエポキシ樹脂
、ケイ素樹脂、マレイミド樹脂に銀系顔料を分散させた
、低粘度で且つ、無溶媒型の導電性樹脂が好ましい。Further, as the conductive material filled in the through hole 5,
For example, low melting point metals, conductive resins, etc. may be used. In particular, the conductive resin may include a base resin, such as a phenol resin, a silicone resin, an acrylic resin, an epoxy resin, or a maleimide resin, and a conductive pigment, such as a silver thread or a silver thread.
Dispersed pigments such as copper composite pigments, copper pigments, and nickel pigments may be used. Among these, from the viewpoint of conductivity, hygroscopicity, adhesion, and moisture resistance reliability, low-viscosity and solvent-free products are made by dispersing silver pigments in highly purified epoxy resins, silicone resins, and maleimide resins. Conductive resins are preferred.
次に、第２図（ａ）〜（ｄ）を参照して、前記本発明の
第一実施例による樹脂封止型半導体装置の製造工程につ
いて説明する。同図における符号は、夫々第１図での符
号と同様のものを示す。Next, the manufacturing process of the resin-sealed semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS. 2(a) to 2(d). The reference numerals in this figure are the same as those in FIG. 1, respectively.
まず、第一工程として、同図（ａ）に示す如く、半導体
チップ２の表面の所定位置に複数個のポンディングパッ
ド３を設け、半導体素子１を形成する。First, as a first step, as shown in FIG. 2A, a plurality of bonding pads 3 are provided at predetermined positions on the surface of a semiconductor chip 2 to form a semiconductor element 1.
次いで、第二工程として、同図（ｂ）に示す如く、半導
体素子１における複数個のポンディングパッド３が設け
られた側の表面を樹脂封止し、封止樹脂層４を形成する
。Next, as a second step, as shown in FIG. 2B, the surface of the semiconductor element 1 on the side where the plurality of bonding pads 3 are provided is sealed with a resin to form a sealing resin layer 4.
続いて、第三工程として、同図（ｃ）に示す如く、封止
樹脂層４に外部から各ボンディングパット３まで達する
貫通穴５を穿設する。Subsequently, as a third step, as shown in FIG. 3(c), through holes 5 are formed in the sealing resin layer 4 so as to reach each bonding pad 3 from the outside.
更に、第四工程として、同図（ｄ）に示す如く、前記貫
通穴５内に、導電性材料を注入し、基板実装用の外部電
極６を形成する。Furthermore, as a fourth step, as shown in FIG. 3(d), a conductive material is injected into the through hole 5 to form an external electrode 6 for mounting on the board.
前記第二工程の樹脂封止は、低圧トランスファーモール
ド法、インジェクション成形、圧縮成形法、注型法、コ
ーティング法、フィルム状態での圧着法等の種々の方法
によって行うことができる。The resin sealing in the second step can be performed by various methods such as low-pressure transfer molding, injection molding, compression molding, casting, coating, and pressure bonding in a film state.
このうち、封止後の封止樹脂層４の表面をできるだけ平
滑にする方法が、以後のエツチング性の観点からも好ま
しい。封止樹脂層４の表面の平滑性を考慮して、半導体
素子のウェハ状態に対して、スピンナーを用いてコーテ
ィングする方法も可能である。また、該樹脂封止は、少
なくとも前記半導体素子１の表面に関して、全面に亘っ
て行われることが好ましい。Among these methods, the method of making the surface of the sealing resin layer 4 as smooth as possible after sealing is preferred from the viewpoint of subsequent etching properties. In consideration of the smoothness of the surface of the sealing resin layer 4, it is also possible to coat the semiconductor element in a wafer state using a spinner. Further, it is preferable that the resin sealing is performed over at least the entire surface of the semiconductor element 1.
前記第三工程における貫通穴５の穿設は、通常フォトレ
ジ支トを使用したＰ Ｅ Ｐ （ｐｈｏｔｏ ｅｎｇｒ
ａｖ−１ｎｇ ｐｒｏｃｅｓｓ ）により封止樹脂層４
をパターニングし、更にドライエツチング法およびウェ
ットエツチング法等により封止樹脂層４をエツチングす
ることによって行われる。即ち、封止樹脂層４の各ボン
ディングパット３に対応する部分をエツチング操作によ
って除去し、前記貫通穴５を穿設する。上記第三工程の
具体的な操作としては、まず、封止樹脂層４の表面にフ
ォトレジスト膜を設け、該フォトレジスト膜に、半導体
素子上のポンディングパッド３の位置に対応したパター
ンを有するマスクを介して、露光および現像してレジス
トパターンを形成する。更に、該レジストパターンを耐
エツチングマスクとして、下地の封止樹脂層４を、溶解
エツチング、分解エツチング等により選択エツチングす
る。こうして、封止樹脂層４の前記ポンディングパッド
３に対応する箇所を除去し、所望の貫通穴５が形成され
る。Drilling of the through hole 5 in the third step is usually done by P E P (photo engraving) using a photoresist support.
av-1ng process) to form a sealing resin layer 4.
This is done by patterning the sealing resin layer 4, and then etching the sealing resin layer 4 using a dry etching method, a wet etching method, or the like. That is, the portions of the sealing resin layer 4 corresponding to the respective bonding pads 3 are removed by an etching operation, and the through holes 5 are formed. As a specific operation of the third step, first, a photoresist film is provided on the surface of the sealing resin layer 4, and the photoresist film has a pattern corresponding to the position of the bonding pad 3 on the semiconductor element. A resist pattern is formed by exposure and development through a mask. Furthermore, using the resist pattern as an etching-resistant mask, the underlying sealing resin layer 4 is selectively etched by dissolution etching, decomposition etching, or the like. In this way, the portions of the sealing resin layer 4 corresponding to the bonding pads 3 are removed, and desired through holes 5 are formed.
前記第四工程において、導電性材料を貫通穴５に注入す
る方法としては、デイスペンサーによって、貫通穴５内
に導電性材料を注入し、次いてアフターキュアする方法
が好ましい。このとき、導電性材料は、貫通穴５の外端
部において、バッヶ−ジ外部に若干量露出するまで注入
されることが特に好ましい。In the fourth step, the method of injecting the conductive material into the through hole 5 is preferably a method of injecting the conductive material into the through hole 5 using a dispenser and then performing after-curing. At this time, it is particularly preferable that the conductive material is injected at the outer end of the through hole 5 until a small amount is exposed outside the badge.
また、第３図（ａ）〜（ｄ）は、本発明の第二実施例と
なる樹脂封止型半導体装置の製造工程を示したものであ
る。尚、同図における符号は、夫々第１図での符号と同
様のものを表す。Moreover, FIGS. 3(a) to 3(d) show the manufacturing process of a resin-sealed semiconductor device according to a second embodiment of the present invention. Note that the reference numerals in this figure represent the same ones as those in FIG. 1, respectively.
この製造工程は、前記第１図で説明した第一から第四工
程と大略は同じであり、同図（ａ）〜（ｄ）は夫々の工
程に対応する。This manufacturing process is roughly the same as the first to fourth steps explained in FIG. 1, and FIGS. 10A to 10D correspond to the respective steps.
但しこの第二実施例は、第３図（ｂ）に示す如く、第二
工程において、樹脂封止か半導体素子１のカット側面お
よび素子表面に亘って行われている点で、前記第一実施
例とは異なっている。従って、この第二実施例の樹脂封
止型半導体装置は、第一実施例の樹脂封止型半導体装置
に比べて、耐湿信頼性等の性能がより向上されている。However, as shown in FIG. 3(b), this second embodiment is different from the first embodiment in that the resin sealing is performed over the cut side surface of the semiconductor element 1 and the element surface in the second step. This is different from the example. Therefore, the resin-sealed semiconductor device of the second embodiment has improved performance such as moisture resistance and reliability compared to the resin-sealed semiconductor device of the first embodiment.
次に、上記実施例に準じた本発明の樹脂封止型半導体装
置の製造例および比較例を説明する。Next, a manufacturing example and a comparative example of a resin-sealed semiconductor device of the present invention based on the above embodiment will be described.
製造例１
複数個のポンディングパッドを有する径６インチのウェ
ハ状態のテスト用半導体素子に、エポキシ系コーティン
グ樹脂をスピンナーを使用して回転数１１０００ｒｐ、
で１分間塗布し、封止樹脂厚４００μｍとして、第２図
（ｂ）の状態を形成した。形成した樹脂層を１５０℃で
１時間硬化させた後、樹脂層表面に耐酸性レジストを塗
布し、９０℃で２０分間ベークした。次に、該レジスト
層をＰＥＰ法によって、前記ポンディングパッド形状お
よび位置に対応するバターニングを行った。続いて、こ
のレジストパターンをエツチングマスクとして、該封止
樹脂層に発煙硝酸によるエツチング（ジャストエツチン
グ時間３０秒）を行ってポンディングパッドに達する貫
通穴を形成した。次に、アセトンにより、前記レジスト
パターンを除去した後、アセトン超音波洗浄を３回行い
、水洗および再度アセトン洗浄を行い、これを乾燥して
第２図ＣＣ）の状態を形成した。次に、形成された貫通
大全てに、エポキシ系導電性樹脂をデイスペンサーによ
って注入し、１５０℃において１時間ヘークした後、ウ
ェハから切出して第２図（ｄ）と同一形状の樹脂封止型
半導体装置を作成した。Manufacturing Example 1 A test semiconductor device in the form of a 6-inch diameter wafer having multiple bonding pads was coated with epoxy coating resin using a spinner at a rotation speed of 11,000 rpm.
The sealing resin was coated for 1 minute, and the thickness of the sealing resin was 400 μm, forming the state shown in FIG. 2(b). After the formed resin layer was cured at 150°C for 1 hour, an acid-resistant resist was applied to the surface of the resin layer and baked at 90°C for 20 minutes. Next, the resist layer was patterned using the PEP method to correspond to the shape and position of the bonding pad. Subsequently, using this resist pattern as an etching mask, the sealing resin layer was etched with fuming nitric acid (just etching time: 30 seconds) to form a through hole reaching the bonding pad. Next, after removing the resist pattern with acetone, ultrasonic cleaning with acetone was performed three times, followed by washing with water and cleaning with acetone again, and this was dried to form the state shown in FIG. 2 (CC). Next, epoxy-based conductive resin was injected into all of the formed through holes using a dispenser, and after baking at 150°C for 1 hour, the wafer was cut out and molded into a resin-sealed mold with the same shape as shown in Figure 2(d). Created a semiconductor device.
製造例２
製造例１と同様の操作に従い、同様の半導体素子にマレ
イミド系コーティング樹脂を樹脂厚２００μｍ ｌ：塗
布し、次に１８０℃で１時間硬化後、レジスト塗布から
エツチング（ジャストエツチング時間５０秒）まで行っ
た。以後は、製造例１と同様の操作を行い、第２図（ｄ
）と同一形状の樹脂封止型半導体装置を作成した。Production Example 2 Following the same procedure as Production Example 1, a maleimide coating resin was applied to the same semiconductor element to a resin thickness of 200 μm, and then cured at 180°C for 1 hour, followed by resist application and etching (just etching time: 50 seconds). ). From then on, the same operations as in Production Example 1 were performed, and the process as shown in Fig. 2 (d
) A resin-sealed semiconductor device with the same shape was created.
製造例３
製造例１と同様の操作に従い、同様の半導体素子にＰＥ
Ｓ （ポリエーテルスルホン）系コーティング樹脂を樹
脂厚４００μｍに塗布し、次に １５０℃で１時間およ
び２００℃で１時間処理して溶媒を除去した。次いで、
樹脂層表面にシリコーン系レジストを塗布し、１００℃
で１０分間ベークした。該レジスト層をＰＥＰ法によっ
て、前記ポンディングパッド形状および位置に対応する
バターニングヲ行った。続いて、このレジストパターン
をエツチングマスクとして、該封止樹脂層にジメチルホ
ルムアミドによるエツチング（ジャストエツチング時間
４０秒）を行ってポンディングパッドに達する貫通穴を
形成した。以後は、製造例１と同様の操作を行い、第２
図（ｄ）と同一形状の樹脂封止型半導体装置を作成した
。Production Example 3 Following the same operations as Production Example 1, PE was applied to the same semiconductor element.
S (polyethersulfone) based coating resin was applied to a resin thickness of 400 μm, and then treated at 150° C. for 1 hour and at 200° C. for 1 hour to remove the solvent. Then,
Apply silicone resist to the surface of the resin layer and heat at 100°C.
Bake for 10 minutes. The resist layer was patterned using the PEP method to correspond to the shape and position of the bonding pad. Subsequently, using this resist pattern as an etching mask, the sealing resin layer was etched with dimethylformamide (just etching time: 40 seconds) to form a through hole reaching the bonding pad. After that, the same operation as in Production Example 1 was performed, and the second
A resin-sealed semiconductor device having the same shape as that shown in Figure (d) was created.
製造例４
製造例１と同様の半導体素子に、Ｂステージ化されたエ
ポキシ系フィルムシート（厚さ４００μｍ）を１５０℃
で１時間圧着し、次いで１５０℃で１時間硬化させた。Production Example 4 A B-staged epoxy film sheet (thickness: 400 μm) was placed on the same semiconductor device as Production Example 1 at 150°C.
It was pressed for 1 hour at 150° C. and then cured at 150° C. for 1 hour.
以後は、製造例１と同様の操作を行い、第２図（ｄ）と
同一形状の樹脂封止型半導体装置を作成した。Thereafter, the same operations as in Manufacturing Example 1 were performed to produce a resin-sealed semiconductor device having the same shape as that shown in FIG. 2(d).
製造例５
製造例１と同様の半導体素子を、第４図（ａ）に示す如
くシリコーン系シート７に固定し、該素子のカット側面
および表面をトランスファーモールド法によりエポキシ
系成形材料で封止して、同図（ｂ）の状態を形成した。Production Example 5 A semiconductor element similar to Production Example 1 was fixed to a silicone sheet 7 as shown in FIG. 4(a), and the cut side surface and surface of the element were sealed with an epoxy molding material by transfer molding. As a result, the state shown in FIG. 3(b) was formed.
封止樹脂厚は１０００μｍとした。更に、１８０℃で１
時間硬化後、以後型 ゛造例１と同様の操作を行い、
第３図（ｄ）と同一形状の樹脂封止型半導体装置を作成
した。The thickness of the sealing resin was 1000 μm. Furthermore, 1 at 180℃
After curing for a while, perform the same operation as in mold manufacturing example 1.
A resin-sealed semiconductor device having the same shape as that shown in FIG. 3(d) was produced.
尚、第４図（ａ）および（ｂ）において、各符号は、前
記実施例１と同様のものを表す。In addition, in FIGS. 4(a) and 4(b), each symbol represents the same thing as in the first embodiment.
製造例６
製造例５と同様に、半導体素子を、第４図（ａ）に示す
如くシリコーン系シート７に固定し、該素子のカット側
面および表面をトランスファーモールド法によりマレイ
ミド系成形材料で封止して、同図（ｂ）の状態を形成し
た。封止樹脂厚は８００μｍとした。更に、１８０℃で
１時間硬化後、以後製造例ユと同様の操作を行い、該封
止樹脂層に貫通穴を形成し、第３図（ｃ）の状態を形成
した。更に、形成された貫通大全てに、粉末状共晶ハン
ダ（粒径１０μｍ）を注入し、１８５℃において溶融さ
せ、第３図（ｄ）と同一形状の樹脂封止型半導体装置を
作成した。Production Example 6 Similarly to Production Example 5, a semiconductor element was fixed to a silicone sheet 7 as shown in FIG. 4(a), and the cut side and surface of the element was sealed with a maleimide molding material by transfer molding. As a result, the state shown in FIG. 3(b) was formed. The thickness of the sealing resin was 800 μm. Further, after curing at 180° C. for 1 hour, the same operation as in Production Example Y was performed to form a through hole in the sealing resin layer to form the state shown in FIG. 3(c). Further, powdered eutectic solder (particle size: 10 μm) was injected into all of the formed through holes and melted at 185° C. to produce a resin-sealed semiconductor device having the same shape as that shown in FIG. 3(d).
比較例１
製造例１と同様の半導体素子を使用し、トランスファー
モールド法により、１８４ ｐｉｎ Ｑ Ｆ Ｐ（Ｑｕ
ａｄ Ｆｌａｔ Ｐａｃｋａｇｅ ）を樹脂封止し、従
来技術のプラスチックパッケージを作成した。封止樹脂
としてエポキシ系成形材料を使用し、また封止樹脂成形
後、１８０℃で８時間アフターキュアを行った。Comparative Example 1 Using the same semiconductor element as Manufacturing Example 1, 184 pin Q F P (Qu
ad Flat Package) was sealed with resin to create a conventional plastic package. An epoxy molding material was used as the sealing resin, and after the sealing resin was molded, after-curing was performed at 180° C. for 8 hours.
比較例２
製造例１と同様の半導体素子を使用し、前記ＴＡＢ法に
より素子を搭載して、トランスファーモールド法により
、パッケージを作成した。封止樹脂として、エポキシ系
成形材料を使用し、また封止樹脂成形後、１８０℃で８
時間アフターキュアを行った。Comparative Example 2 Using the same semiconductor element as in Manufacturing Example 1, the element was mounted by the TAB method, and a package was created by the transfer molding method. An epoxy molding material is used as the sealing resin, and after molding the sealing resin, it is heated at 180℃ for 8
I did an hour after cure.
以上のように作成された製造例１〜６および比較例１〜
２の各樹脂封止型半導体装置について、次のような評価
を行った。Production Examples 1 to 6 and Comparative Examples 1 to 6 created as above
The following evaluations were performed for each resin-sealed semiconductor device of No. 2.
■ｖｐｓ処理後の外観
上記各試料について、温度８５℃、相対湿度８５％で吸
湿処理し、次いで２１５℃で１分間のｖＰＳ（ベーパー
フェイズリフロー）処理を２回行い、外部に対するクラ
ック発生等のＶＰＳ処理直後のパッケージ外観を観察し
た。■Appearance after VPS treatment Each of the above samples was subjected to moisture absorption treatment at a temperature of 85°C and relative humidity of 85%, and then vPS (vapor phase reflow) treatment was performed twice at 215°C for 1 minute to prevent cracks from forming against the outside. The appearance of the package was observed immediately after treatment.
■耐湿信頼性テスト
上記ＶＰＳ処理後の各試料について、温度１２８℃、２
６５気圧のプレッシャークツカー内における耐湿信頼性
テストを行い、不良品の発生数を調べた。■Moisture resistance reliability test For each sample after the above VPS treatment, the temperature was 128℃, 2
A moisture resistance reliability test was conducted in a pressure cooker at 65 atmospheres, and the number of defective products was investigated.
以上の各評価、および各樹脂封止型半導体装置のパッケ
ージサイズを後掲の第１表に示す。The above evaluations and the package size of each resin-sealed semiconductor device are shown in Table 1 below.
第１表に示した結果から明らがなように、製造例１〜６
の本発明による樹脂封止型半導体装置は、比較例１〜２
に比べ、パッケージサイズの小型化、薄型化が達成され
ている。更に、ＶＰｓ処理後の外部クラックの発生もな
く、耐湿信頼性の点においても半導体装置として非常に
優れた性能を有する。As is clear from the results shown in Table 1, Production Examples 1 to 6
The resin-sealed semiconductor devices according to the present invention are as follows: Comparative Examples 1 to 2
Compared to the previous model, the package size has been reduced and the thickness has been reduced. Further, there is no occurrence of external cracks after the VPs treatment, and the semiconductor device has extremely excellent performance in terms of moisture resistance and reliability.
以上詳述したように、本発明の樹脂封止型半導体装置は
、半導体装置の高密度実装、小型化、薄型化に対応し、
且つ気密性、耐湿信頼性等の半導体装置として好適な性
能を提供する上で顕著な効果を奏するものである。As detailed above, the resin-sealed semiconductor device of the present invention is compatible with high-density packaging, miniaturization, and thinning of semiconductor devices.
Moreover, it has a remarkable effect in providing suitable performance as a semiconductor device such as airtightness and moisture resistance reliability.
第１図は、本発明の第一実施例による樹脂封止型半導体
装置の断面構造を示す図、
第２図（ａ）〜（ｄ）は、本発明の第一実施例による樹
脂封止型半導体装置の製造工程を示す図、第３図（ａ）
〜（ｄ）は、本発明の第二実施例による樹脂封止型半導
体装置の製造工程を示す図、第４図（ａ）〜（ｂ）は、
本発明の製造例５および６の製造状態を示す図、
第５図は、従来技術におけるプラスチックパッケージの
構造を示す断面図である。
１・・・半導体素子、２・・・半導体チップ、３・・・
ポンディングパッド、４・・・封止樹脂層、５・・・貫
通穴、６・・・外部電極、７・・・シリコーン系シート
、５１・・・半導体素子、５２・・・半導体チップ、５
３・・・ボンデインクパッド、５４・・・リードフレー
ム、５５・・・封止樹脂、５６・・・ボンディングワイ
ヤ、。
出願人代理人 弁理士 鈴 江 武 彦第１図
第２図（ａ）
第２図（ｂ）
第２図（Ｃ）
第２図（ｄ）
第３図（ａ）
第３図（ｃ）
第３図（ｄ）
第４図（ｂ）FIG. 1 is a diagram showing a cross-sectional structure of a resin-sealed semiconductor device according to a first embodiment of the present invention, and FIGS. 2(a) to (d) are diagrams showing a resin-sealed semiconductor device according to a first embodiment of the present invention. A diagram showing the manufacturing process of a semiconductor device, FIG. 3(a)
-(d) are diagrams showing the manufacturing process of a resin-sealed semiconductor device according to a second embodiment of the present invention, and FIGS. 4(a)-(b) are
FIG. 5 is a cross-sectional view showing the structure of a plastic package in the prior art. 1... Semiconductor element, 2... Semiconductor chip, 3...
Ponding pad, 4... Sealing resin layer, 5... Through hole, 6... External electrode, 7... Silicone sheet, 51... Semiconductor element, 52... Semiconductor chip, 5
3... Bond ink pad, 54... Lead frame, 55... Sealing resin, 56... Bonding wire. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 2 (a) Figure 2 (b) Figure 2 (C) Figure 2 (d) Figure 3 (a) Figure 3 (c) Figure 3 (d) Figure 4 (b)
Claims (1)
が設けられた構造を有する半導体素子と、該半導体素子
の表面を封止した封止樹脂層とを具備し、該封止樹脂層
に外部から前記各ボンディングパット部まで達する貫通
穴が穿設され、該貫通穴内に前記半導体素子を基板に実
装するための電極が設けられていることを特徴とする樹
脂封止型半導体装置。(1) A semiconductor element having a structure in which a plurality of bonding pad portions are provided on a semiconductor chip, and a sealing resin layer that seals the surface of the semiconductor element, and the sealing resin layer can be accessed from the outside. A resin-sealed semiconductor device, characterized in that a through hole is formed that reaches each of the bonding pads, and an electrode for mounting the semiconductor element on a substrate is provided in the through hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2340353A JPH04207046A (en) | 1990-11-30 | 1990-11-30 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2340353A JPH04207046A (en) | 1990-11-30 | 1990-11-30 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04207046A true JPH04207046A (en) | 1992-07-29 |
Family
ID=18336126
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2340353A Pending JPH04207046A (en) | 1990-11-30 | 1990-11-30 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04207046A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5554887A (en) * | 1993-06-01 | 1996-09-10 | Mitsubishi Denki Kabushiki Kaisha | Plastic molded semiconductor package |
| US5656863A (en) * | 1993-02-18 | 1997-08-12 | Mitsubishi Denki Kabushiki Kaisha | Resin seal semiconductor package |
-
1990
- 1990-11-30 JP JP2340353A patent/JPH04207046A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5656863A (en) * | 1993-02-18 | 1997-08-12 | Mitsubishi Denki Kabushiki Kaisha | Resin seal semiconductor package |
| US5753973A (en) * | 1993-02-18 | 1998-05-19 | Mitsubishi Denki Kabushiki Kaisha | Resin seal semiconductor package |
| US5920770A (en) * | 1993-02-18 | 1999-07-06 | Mitsubishi Denki Kabushiki Kaisha | Resin seal semiconductor package and manufacturing method of the same |
| US6191493B1 (en) | 1993-02-18 | 2001-02-20 | Mitsubishi Denki Kabushiki Kaisha | Resin seal semiconductor package and manufacturing method of the same |
| US5554887A (en) * | 1993-06-01 | 1996-09-10 | Mitsubishi Denki Kabushiki Kaisha | Plastic molded semiconductor package |
| US5710062A (en) * | 1993-06-01 | 1998-01-20 | Mitsubishi Denki Kabushiki Kaisha | Plastic molded semiconductor package and method of manufacturing the same |
| US5834340A (en) * | 1993-06-01 | 1998-11-10 | Mitsubishi Denki Kabushiki Kaisha | Plastic molded semiconductor package and method of manufacturing the same |
| US6046071A (en) * | 1993-06-01 | 2000-04-04 | Mitsubishi Denki Kabushiki Kaisha | Plastic molded semiconductor package and method of manufacturing the same |
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