JPH0415987A - Through hole circuit board and manufacture thereof - Google Patents
Through hole circuit board and manufacture thereofInfo
- Publication number
- JPH0415987A JPH0415987A JP2118636A JP11863690A JPH0415987A JP H0415987 A JPH0415987 A JP H0415987A JP 2118636 A JP2118636 A JP 2118636A JP 11863690 A JP11863690 A JP 11863690A JP H0415987 A JPH0415987 A JP H0415987A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- hole
- metal
- circuit board
- grains
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 229910000679 solder Inorganic materials 0.000 claims abstract description 136
- 239000002923 metal particle Substances 0.000 claims abstract description 28
- 238000002844 melting Methods 0.000 claims abstract description 22
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 20
- 239000000956 alloy Substances 0.000 claims abstract description 20
- 230000008018 melting Effects 0.000 claims abstract description 18
- 239000002245 particle Substances 0.000 claims abstract description 17
- 229910052751 metal Inorganic materials 0.000 claims description 48
- 239000002184 metal Substances 0.000 claims description 48
- 230000004907 flux Effects 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 31
- 229910052802 copper Inorganic materials 0.000 claims description 17
- 239000010949 copper Substances 0.000 claims description 17
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 14
- 238000005476 soldering Methods 0.000 claims description 9
- 239000006104 solid solution Substances 0.000 claims description 3
- 238000005553 drilling Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 abstract description 13
- 239000000203 mixture Substances 0.000 abstract description 11
- 239000004020 conductor Substances 0.000 abstract description 7
- 239000000126 substance Substances 0.000 abstract description 6
- 239000013528 metallic particle Substances 0.000 abstract 7
- 230000008520 organization Effects 0.000 abstract 2
- 239000000470 constituent Substances 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 239000007790 solid phase Substances 0.000 abstract 1
- 230000008961 swelling Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 58
- 238000010438 heat treatment Methods 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 7
- 229910052709 silver Inorganic materials 0.000 description 7
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- 239000010931 gold Substances 0.000 description 6
- 239000011135 tin Substances 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 239000011133 lead Substances 0.000 description 5
- 239000011347 resin Substances 0.000 description 5
- 229920005989 resin Polymers 0.000 description 5
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 description 4
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 239000007787 solid Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 description 4
- 230000004913 activation Effects 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 230000005496 eutectics Effects 0.000 description 3
- 239000002529 flux (metallurgy) Substances 0.000 description 3
- 229910052742 iron Inorganic materials 0.000 description 3
- 238000002156 mixing Methods 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 239000010944 silver (metal) Substances 0.000 description 3
- SCYULBFZEHDVBN-UHFFFAOYSA-N 1,1-Dichloroethane Chemical compound CC(Cl)Cl SCYULBFZEHDVBN-UHFFFAOYSA-N 0.000 description 2
- RTZKZFJDLAIYFH-UHFFFAOYSA-N Diethyl ether Chemical compound CCOCC RTZKZFJDLAIYFH-UHFFFAOYSA-N 0.000 description 2
- -1 amine compounds Chemical class 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 238000004506 ultrasonic cleaning Methods 0.000 description 2
- BOSAWIQFTJIYIS-UHFFFAOYSA-N 1,1,1-trichloro-2,2,2-trifluoroethane Chemical compound FC(F)(F)C(Cl)(Cl)Cl BOSAWIQFTJIYIS-UHFFFAOYSA-N 0.000 description 1
- UOCLXMDMGBRAIB-UHFFFAOYSA-N 1,1,1-trichloroethane Chemical compound CC(Cl)(Cl)Cl UOCLXMDMGBRAIB-UHFFFAOYSA-N 0.000 description 1
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 229910000978 Pb alloy Inorganic materials 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000012190 activator Substances 0.000 description 1
- 239000011149 active material Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- KYKAJFCTULSVSH-UHFFFAOYSA-N chloro(fluoro)methane Chemical compound F[C]Cl KYKAJFCTULSVSH-UHFFFAOYSA-N 0.000 description 1
- 239000012459 cleaning agent Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- YPHMISFOHDHNIV-FSZOTQKASA-N cycloheximide Chemical compound C1[C@@H](C)C[C@H](C)C(=O)[C@@H]1[C@H](O)CC1CC(=O)NC(=O)C1 YPHMISFOHDHNIV-FSZOTQKASA-N 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005429 filling process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000004093 laser heating Methods 0.000 description 1
- 239000000025 natural resin Substances 0.000 description 1
- 150000007524 organic acids Chemical class 0.000 description 1
- 238000005204 segregation Methods 0.000 description 1
- 239000004071 soot Substances 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 238000013020 steam cleaning Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 239000004034 viscosity adjusting agent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、低コストで生産性・信頼性の高いスルーホー
ル回路基板、およびその製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a through-hole circuit board that is low cost, highly productive and reliable, and a method for manufacturing the same.
従来、スルーホール回路基板は主にサブトラクティブ法
により作成されていた。つまり、両面銅引積層板にスル
ーホール用の穴あけを行い、次に化学めっきのための活
性化処理および化学めっき処理を行い、次いで電気めっ
きにより必要な膜厚分をつけ、その後にスルーホール部
および回路導体部のところをレジストでマスキングし、
不要部をエツチング除去する方法である。この方法によ
り、高信頼性のスルーホール回路を形成することができ
るが、特に化学めっき工程において、その処理工程数お
よび使用薬液が多いために処理時間が長く、また材料費
が高価になるため、生産性および経済性に問題があった
。Conventionally, through-hole circuit boards have been mainly produced by the subtractive method. In other words, holes for through-holes are drilled in a double-sided copper laminate, then activation treatment and chemical plating treatment are performed for chemical plating, then electroplating is applied to the required film thickness, and then the through-hole area is And mask the circuit conductor part with resist,
This is a method to remove unnecessary parts by etching. Although this method makes it possible to form highly reliable through-hole circuits, it requires a long processing time and high material costs, especially in the chemical plating process due to the large number of processing steps and the large number of chemicals used. There were problems with productivity and economy.
より生産性を向上したスルーホール回路の製造方法とし
て、導電性接着剤を用いる方法がある。As a method for manufacturing through-hole circuits with improved productivity, there is a method using a conductive adhesive.
これはスルーホール用の穴あけを行った後、その穴にス
ルーホール印刷法あるいはデイスペンサを用いた方法な
どにより導電性接着剤を流し込み、加熱硬化させて両面
導体の導通をとる方法である。This method involves drilling holes for through holes, then pouring a conductive adhesive into the holes using a through hole printing method or a method using a dispenser, and curing the adhesive by heating to establish continuity between the double-sided conductors.
この方法は生産性には優れるものの、経済性・信頼性に
多少の問題があり、また導電性接着剤の比抵抗が銅に比
べて１〜２桁高いこと、および導電性接着剤と銅との界
面で接触抵抗が生ずることにより、形成されたスルーホ
ール抵抗は上述のサブトラクティブ法によるものよりか
なり高くなる。Although this method has excellent productivity, there are some problems in economic efficiency and reliability, and the specific resistance of the conductive adhesive is one to two orders of magnitude higher than that of copper, and the Due to the contact resistance at the interface, the formed through-hole resistance is considerably higher than that obtained by the subtractive method described above.
なお、上述と同じ方法で、経済性・信頼性の点から導電
性接着剤の代わりにはんだペーストを用いる方法も考え
られる。第２図は、従来のはんだペーストを使用したス
ルーホール接続回路基板（１）でしばしば起る接続不良
を例示する断面図である。Note that, in the same manner as described above, a method of using solder paste instead of the conductive adhesive from the viewpoint of economy and reliability may also be considered. FIG. 2 is a cross-sectional view illustrating connection failures that often occur in through-hole connection circuit boards (1) using conventional solder paste.
第２図において、（１）はスルーホール回路基板で絶縁
層（２）と、導電層（回路） （３＋）、（ａ□）から
なっている。（５）はスルーホール、（６）はリフロー
されたはんだ、はんだリフロー時にフラックスが活性す
ることにより発生したガス空洞（４）である。このよう
に従来のはんだペーストを用いる方法ではガスの発生や
、はんだ特有の表面張力の高さのために導電層（３１）
、 （３□）を結ぶはんだのブリッジが起こらず、表裏
両回路間の導通形成方法は信頼性にあるものであった。In FIG. 2, (1) is a through-hole circuit board consisting of an insulating layer (2) and conductive layers (circuits) (3+) and (a□). (5) is a through hole, (6) is reflowed solder, and gas cavity (4) is generated by activation of flux during solder reflow. In this way, in the conventional method using solder paste, the conductive layer (31)
, (3□) did not cause solder bridging, and the method of forming continuity between the front and back circuits was reliable.
そこで本発明者らは特願昭６３−３０１５８６号公報に
おいて予め異種の金属粒を混合したはんだペーストを用
いることによりこの種の問題が解決することを見い出し
、低コストで接合強度が高く接触抵抗も低いスルーホー
ル回路基板を実現した。Therefore, the inventors of the present invention discovered in Japanese Patent Application No. 63-301586 that this type of problem could be solved by using a solder paste in which different types of metal particles were mixed in advance. Achieved a low through-hole circuit board.
そこで本発明の目的は、公知のはんだ組成物を用いた場
合に比べてリフロー性を更に高め、接合部のりフロー操
作による断線などの接続不良の発生が高度に抑制された
スルーホール回路基板およびその製造方法を提供するこ
とである。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a through-hole circuit board and its through-hole circuit board, which has higher reflow properties than those using known solder compositions, and which highly suppresses the occurrence of connection failures such as disconnections due to solder flow operations at joints. An object of the present invention is to provide a manufacturing method.
はんだ組成物によるスルーホール接続した回路基板の基
板上の回路と他の回路又は別体回路基板上の電極とはん
だ組成物を用いて抵抗接続する場合が多い。このような
場合、回路基板のスルーホール接続部のはんだは再リフ
ロー状態下に置かれることになる。従来のはんだ組成物
によるスルーホール接続部は、再リフローを経た後にし
ばしば接続不良が起るので、再リフローに対する安定性
が不足する場合があった。In many cases, through-hole connections are made using a solder composition to connect a circuit on a circuit board to another circuit or to an electrode on a separate circuit board using a solder composition. In such cases, the solder in the through-hole connections of the circuit board will be placed under reflow conditions. Through-hole connections made with conventional solder compositions often lack stability against reflow because poor connections often occur after reflow.
本発明は、絶縁層を挟んでその両面にそれぞれ導電層が
積層された部分を有する積層体を用いたスルーホール回
路基板において、前記絶縁層の両面に積層された導電層
が、複数の金属粒を含むはんだでスルーホール接続され
、前記金属粒が前記はんだの固相線温度よりも高い融点
を有し、かつはんだづけ温度にて前記はんだ中へ実質的
に固溶しない金属からなり、銅又は銅基合金を表面に露
出することのない粒子からなり、かつ下式で表わされる
体積含有率で２％〜２０％の割合で含まれてなるスルー
ホール回路基板
である。The present invention provides a through-hole circuit board using a laminate having conductive layers laminated on both sides of an insulating layer, in which the conductive layer laminated on both sides of the insulating layer includes a plurality of metal grains. The metal grains are made of a metal having a melting point higher than the solidus temperature of the solder and are not substantially solid-dissolved in the solder at the soldering temperature, and are made of copper or copper. This is a through-hole circuit board made of particles that do not expose the base alloy on the surface and containing the base alloy at a volume content of 2% to 20% expressed by the following formula.
本発明のスルーホール回路基板は、絶縁層を挟んでその
両面にそれぞれ導電層が積層された部分を有する積層体
を用いたスルーホール回路基板の製造方法において、少
なくとも
ｉ）前記積層体にスルーホールをあける工程ｉｉ）前記
スルーホールに、はんだ粒、金属粒とフラックスとを含
み、前記金属粒が前記はんだの固相線温度よりも高い融
点を有し、かつ、はんだ付け温度において前記はんだ中
に実質的に固溶することのない金属からなり、銅又は銅
基合金を表面に露出することのない粒子からなり、かつ
下式で表わされる体積含有率で５％〜２０％の割合で含
まれてなるはんだペーストを充填する工程ｉｉ）前記は
んだペーストを前記はんだ粒の固相線温度以上、かつ前
記金属粒の融点未満の温度でリフローする工程を含む方
法によって製造される。The through-hole circuit board of the present invention provides a method for manufacturing a through-hole circuit board using a laminate having conductive layers laminated on both sides with an insulating layer in between, at least i) through-holes in the laminate; ii) The through hole contains solder grains, metal grains, and flux, the metal grains have a melting point higher than the solidus temperature of the solder, and the solder contains solder particles at the soldering temperature. It consists of a metal that does not substantially form a solid solution, it consists of particles that do not expose copper or a copper-based alloy on the surface, and it is contained in a volume content of 5% to 20% expressed by the following formula. ii) reflowing the solder paste at a temperature higher than the solidus temperature of the solder grains and lower than the melting point of the metal grains.
本発明のスルーホール回路基板は、スルーホール内で粒
子径１５０μｍ以下の高融点金属粒がはんだ相中に特定
容積比で分散している金属粒／はんだ固体層により絶縁
体面を挟む２つの導体を橋かけ抵抗接続構造のものであ
り、その諸態様は、第１図（Ａ） 、 （Ｂ）に示され
ている。第１図において、スルーホール回路基板（１）
は三層体よりなるもので絶縁層（２）を挟む回路の導体
層（３１）、（３２）からなり、適宜の位置にスルーホ
ール（５）が設けられている。スルーホール内の橋かけ
接続構造は、再リフローした後も金属粒／はんだ固体層
（８）で示される固体はんだの連続相（６）中に金属粒
（７）が後述の体積含有率（％）が２〜２０％容積で分
散して存在し、リフロー条件下で実質的にその構造変化
することがない。接続構造の体積含有率は接続構造の断
面内における金属粒の占有面積を拡大観測手法により３
０ケ所算出しそれらを積分することにより求められる。The through-hole circuit board of the present invention has two conductors sandwiching an insulator surface between metal particles/solder solid layer in which high-melting point metal particles with a particle diameter of 150 μm or less are dispersed in a solder phase at a specific volume ratio in the through-hole. It has a bridging resistance connection structure, and its various aspects are shown in FIGS. 1(A) and 1(B). In Figure 1, a through-hole circuit board (1)
is a three-layer structure consisting of circuit conductor layers (31) and (32) sandwiching an insulating layer (2), and through holes (5) are provided at appropriate positions. The bridging connection structure in the through hole is such that even after reflow, the metal grains (7) remain in the solid solder continuous phase (6) represented by the metal grains/solder solid layer (8) at a volume content (%) as described below. ) is present in a dispersed manner in a volume of 2 to 20%, and its structure does not substantially change under reflow conditions. The volume content of the connected structure was determined by observing the area occupied by the metal grains within the cross section of the connected structure.
It is obtained by calculating zero points and integrating them.
第１図（Ａ）はこの橋かけ接続構造がスルーホール壁面
（５Ａ）の一部に形成されている例、同図（Ｂ）は壁面
（５Ａ）全周にわたって形成された例である。FIG. 1(A) shows an example in which this bridging connection structure is formed on a part of the through-hole wall surface (5A), and FIG. 1(B) shows an example in which it is formed over the entire circumference of the wall surface (5A).
基板（１）の積層構造は、また他の導電層、絶縁層を付
加積層体であることもできる。The laminated structure of the substrate (1) can also be a laminated body with additional conductive layers and insulating layers.
絶縁層（２）の厚みは通常２鵬以下、さらには５００μ
ｍ以下、さらには１００μｍ以下が好ましい。The thickness of the insulating layer (2) is usually 2 μm or less, and even 500 μm.
m or less, more preferably 100 μm or less.
スルーホール５の径は、積層体１の厚みとの兼ね合いが
あり、その径は積層体の厚みの１／３以上、更には１／
２以上、更に２／３とするのが好ましい。The diameter of the through hole 5 has to be balanced with the thickness of the laminate 1, and the diameter should be 1/3 or more of the thickness of the laminate, or even 1/3 of the thickness of the laminate.
It is preferably 2 or more, more preferably 2/3.
回路の導電層（３）、 （４）の材質としては、銅、銀
。The conductive layers (3) and (4) of the circuit are made of copper or silver.
金、白金、鉛、錫、鉄、ニッケル、インジウム。Gold, platinum, lead, tin, iron, nickel, indium.
アルミニウム、ステンレスが導電層として使用できる。Aluminum and stainless steel can be used as the conductive layer.
−船釣には銅、銀、金が好ましく、経済性の点からは特
に銅が好ましい。- Copper, silver, and gold are preferable for boat fishing, and copper is particularly preferable from the economic point of view.
本発明でいうはんだとは回路基板の導電金属及び金属粒
と合金組織を形成可能な金属を含む合金を意味する。The solder in the present invention means an alloy containing a metal capable of forming an alloy structure with a conductive metal and metal grains of a circuit board.
はんだの材質としては、導電層及び金属粒と合金組織を
形成が可能であればコモンソルダー、プランバーツルタ
ー、チンスミスツルターといわれるもののうち任意のも
ので良く共晶系、非共晶系いずれも使用できる。例えば
導電層が銅の場合、すすを含む合金、特に５ｎ−Ｐｂ合
金が接合力も高く好ましい。また電極が銀の場合にはＳ
ｎ−Ｐｂ−Ａｇ合金も使用可能である。The material of the solder may be any one of common solder, plumber solder, and chinsmith solder, as long as it can form an alloy structure with the conductive layer and metal grains, and either eutectic or non-eutectic type. can also be used. For example, when the conductive layer is made of copper, an alloy containing soot, particularly a 5n-Pb alloy, is preferable because of its high bonding strength. Also, if the electrode is silver, S
n-Pb-Ag alloys can also be used.
金属粒（７）は、はんだの固相線温度よりも高い融点を
持つことが必要である。その温度ははんだの融点よりも
好ましくは３５℃以上、更に好ましくは５０℃以上であ
る。また、再リフローに対する安定性のためには、その
再リフロー温度より金属粒（７）の融点を高く設定する
のが好ましい。The metal particles (7) need to have a melting point higher than the solidus temperature of the solder. The temperature is preferably 35°C or higher than the melting point of the solder, and more preferably 50°C or higher. Furthermore, for stability against reflow, it is preferable to set the melting point of the metal particles (7) higher than the reflow temperature.
金属粒の材料として用いられる金属は、はんだとの濡れ
性が良く合金組織を形成可能なものであればどのような
材料であってもよいが、更に金属粒の構成材質の表面が
酸化等の化学的変化に対して安定性に優れたものが好ま
しい。はんだ粒にＳｕ／Ｐｂ ＝６３／３７合金を用い
、金属粒として裸の単体のＣｕやＣｕ基合金を使用する
と、酸化しやすいことやはんだペーストの保管状態によ
ってはフラックス中のアミン化合物等と反応しやすい理
由によりはんだと濡れ性が悪くなりリフロー時にはんだ
と合体する金属粒量が減少する。金属粒の素材ははんだ
付け温度ではんだ中への実質的に固溶しない材質を用い
ることが好ましい。Ａｇ、 Ａｕ、 Ｐｔ、 Ｎｉ。The metal used as the material for the metal grains may be any material as long as it has good wettability with solder and can form an alloy structure. Those with excellent stability against chemical changes are preferred. If a Su/Pb = 63/37 alloy is used as the solder grains, and bare Cu or Cu-based alloys are used as the metal grains, they may easily oxidize or react with amine compounds in the flux depending on the storage conditions of the solder paste. Due to the ease of soldering, wettability with solder deteriorates, and the amount of metal particles that coalesce with solder during reflow is reduced. It is preferable to use a material for the metal grains that does not substantially form a solid solution in the solder at the soldering temperature. Ag, Au, Pt, Ni.
Ｆｅ、 ＡＩ、 Ｃｄ、 ＺｎＯ及び上記１種以上の金
属を含む合金などは好ましく使用できる。また、Ｓｎあ
るいは上記のうちいずれかを含む金属で表面を覆った金
属粒、ガラス粒、セラミック粒、樹脂粒を使用しても良
いし、２種以上の材質の金属粒を同時に使用しても良い
。以上のうちでは、Ａｇ、 Ａｕ、 Ｐｔ。Fe, AI, Cd, ZnO, and alloys containing one or more of the above metals can be preferably used. Additionally, metal grains, glass grains, ceramic grains, and resin grains whose surfaces are covered with Sn or any of the metals listed above may be used, or metal grains made of two or more materials may be used at the same time. good. Among the above, Ag, Au, and Pt.
Ｎｉ及びＡｕ基合金、Ａｇ基合金、Ｎｉ基合金、及びＳ
ｎあるいは上記金属で表面を覆った金属粒などが好まし
く、更にはＡｕ、 Ａｇ、 Ｎｉの単独または表面をＡ
ｕ。Ni and Au-based alloys, Ag-based alloys, Ni-based alloys, and S
Preferred are metal grains whose surfaces are covered with n or the above-mentioned metals, and more preferably Au, Ag, or Ni alone or whose surfaces are covered with A
u.
Ａｇ、 Ｎｉ、 Ｓｎのうちのいずれかの金属あるいは
合金で覆った銅粒の使用が好ましい。It is preferred to use copper grains coated with one of Ag, Ni, and Sn metals or alloys.
金属粒の粒径は１〜１５０μｍ、好ましくは１〜７５μ
ｍ１更に好ましくは１〜５０μｍ程度である。形状は球
形よりも不定形の方がはんだとの界面面積が大きくとれ
リフロー性に好ましい結果を与える。はんだ粒及び金属
粒の粒径はＪＩＳＺ８８０１号記載の網ふるいで規定さ
れている目開きに対応する。なお、ふるいの粗度を示す
メツシュ数はＪＩＳＺ８８０１号で規定されているふる
いの目開きと金属線径により算出した。The particle size of the metal particles is 1 to 150 μm, preferably 1 to 75 μm.
m1 is more preferably about 1 to 50 μm. An amorphous shape provides a larger interface area with the solder than a spherical shape, giving better reflow properties. The particle diameters of the solder grains and metal grains correspond to the opening defined by the mesh sieve described in JIS Z8801. Note that the mesh number indicating the roughness of the sieve was calculated based on the opening of the sieve and the metal wire diameter specified in JIS Z8801.
スルーホール接続層中の金属粒は、はんだに対して体積
比（％）〔金属粒体積〕／（金属粒体積＋はんだ粒体積
）〕で２〜２０ｖｏ １％が必要である。The metal grains in the through-hole connection layer need to have a volume ratio (%) [metal grain volume]/(metal grain volume + solder grain volume)] of 2 to 20vo 1% with respect to the solder.
ここで、金属粒の体積は、金属粒（はんだ粒）の使用重
量を金属（はんだ）の密度で除すことにより算出される
。Here, the volume of the metal particles is calculated by dividing the used weight of the metal particles (solder particles) by the density of the metal (solder).
金属粒径が多すぎると金属粒間にはんだが充満できず接
続抵抗の上昇や信頼性低下となり、少なすぎると接続の
歩留まりが劣り、また本発明のスルーホール回路基板を
はんだリフロー法により別の基板等に接続する際に、そ
のリフロー熱によるはんだの再溶融により、スルーホー
ル接続が断線する場合もある。If the metal particle size is too large, the solder cannot fill between the metal particles, resulting in an increase in connection resistance and a decrease in reliability.If the metal particle size is too small, the connection yield will be poor. When connecting to a board or the like, the through-hole connection may be disconnected due to remelting of the solder due to the reflow heat.
２ｖｏ １％未満の場合、金属粒による流動性抑制効果
が少なくはんだブリッジ不良になり易（，２０ｖｏ１％
を超えると流動性抑制効果が強く効きすぎるため最初の
りフロー工程で、はんだペースト中の未活性フラックス
が接合部に残留し再リフロー工程でブローホールが発生
し断線し易くなる。If it is less than 2vo 1%, the effect of suppressing fluidity due to metal particles is small and solder bridging defects are likely to occur (20vo 1%).
If the solder paste is exceeded, the fluidity suppressing effect becomes too strong, and in the first reflow process, unactivated flux in the solder paste remains in the joint, making it easy to cause blowholes and disconnections in the second reflow process.
本発明のスルーホール接続は、はんだ粒、高融点金属粒
及びフラックスの３主体成分を混合したはんだペースト
組成物を調製しスクリーン印刷法あるいはデスペンサを
用いて回路基板のスルーホールに付着、あるいは塗布し
た後、塗布したはんだペーストを回路基板をはんだの溶
融点以上の温度下におくことによって、はんだ塗布層を
リフローさせスルーホール内に抵抗接続が形成され製造
される。The through-hole connection of the present invention is made by preparing a solder paste composition that is a mixture of three main components: solder particles, high-melting point metal particles, and flux, and attaching or applying it to the through-holes of a circuit board using a screen printing method or a dispenser. Thereafter, the applied solder paste is placed on the circuit board at a temperature higher than the melting point of the solder, thereby reflowing the solder coating layer and forming a resistive connection in the through hole.
ここに、はんだペーストは、前述の高融点金属粒を粒径
１５０μｍ以下のはんだ粒に対して容積比２ｖｏ １％
以上好ましくは５〜２０ｖｏ１％の割合で用い、これに
フラックスを混合して調製される。Here, in the solder paste, the above-mentioned high melting point metal particles are mixed at a volume ratio of 2vo 1% to solder particles with a particle size of 150 μm or less.
The above is preferably used at a ratio of 5 to 20 vol%, and is prepared by mixing flux thereto.
フラックス量は、リフローしたはんだ粒間およびはんだ
粒−金属粒間の一体化混合のために、はんだ粒の５重量
％以上、好ましくは７重量％以上、さらには１０重量％
以上が好ましい。なお、フラックス量は金属粒量の割合
が増すに従って、印刷・塗布性を妨げない範囲で調整さ
れる。The amount of flux is 5% by weight or more, preferably 7% by weight or more, and even 10% by weight of the solder grains for integral mixing between reflowed solder grains and between solder grains and metal grains.
The above is preferable. The amount of flux is adjusted as the proportion of metal particles increases within a range that does not impede printing and coating properties.
はんだ粒６Ａの粒径は、はんだペーストの印刷。The particle size of solder grain 6A is printed with solder paste.
塗布性を考慮すると、７５μｍ以下が好ましい。Considering applicability, the thickness is preferably 75 μm or less.
また、粘度偏析を避けるためには、均一の粒径のものを
使用した方が好ましい。Furthermore, in order to avoid viscosity segregation, it is preferable to use particles of uniform particle size.
フラックスとしては、樹脂系フラックス、特に活性化樹
脂フラックスが好ましい。これはロジン系天然樹脂また
はその変性樹脂を主成分とし、これに活性材・有機溶剤
・粘度調整剤・その他の添加剤が添加されたものである
。一般に、変性樹脂には重合ロジン、フェノール樹脂変
性ロジンなど、活性剤には無機系および有機系フラック
ス、その中でも特にアミン塩酸塩や有機酸系のフラック
ス、有機溶剤にはカルピトール系、エーテル系のものが
用いられる。金属粒の種類によっては無機系フラックス
の使用も可能である。スルーホールに塗布したはんだペ
ーストをリフローさせる。As the flux, a resin-based flux, particularly an activated resin flux, is preferable. The main component is rosin-based natural resin or its modified resin, to which are added active materials, organic solvents, viscosity modifiers, and other additives. In general, modified resins include polymerized rosin and phenol resin-modified rosin, activators include inorganic and organic fluxes, especially amine hydrochloride and organic acid fluxes, and organic solvents include calpitol and ether-based fluxes. is used. Inorganic flux may also be used depending on the type of metal particles. Reflow the solder paste applied to the through hole.
本発明のスルーホール回路基板のスルーホール接続の形
成過程を絶縁層を挟んで導電層を積層した３層積層回路
基板を例に第３図により説明する。The process of forming through-hole connections in the through-hole circuit board of the present invention will be explained with reference to FIG. 3, taking as an example a three-layer laminated circuit board in which conductive layers are laminated with an insulating layer in between.
（１）はんだペースト充填工程
第３図（Ａ）に示すようにスルーホール穴（５）内には
んだペーストがスルーホール壁の絶縁層（２）を挟む導
電層（３）、 （４）を橋かけ接続して充填されている
。(1) Solder paste filling process As shown in Figure 3 (A), solder paste fills the through-hole hole (5) and bridges the conductive layers (3) and (4) sandwiching the insulating layer (2) on the through-hole wall. It is connected and filled.
はんだペーストの充填層００）ははんだ粒（６Ａ）、高
融点金属粒（７）がフラックスの連続相内に分散されて
いる。The filled layer 00) of solder paste has solder particles (6A) and high melting point metal particles (7) dispersed in a continuous phase of flux.
（２） リフロー工程
はんだ粒（６Ａ）は溶融して合体し、連続相を形成、溶
融していない金属粒（７）を分散させ、スルーホール部
の表面にははんだペースト中のフラックスから生成され
た残留物（９）が残る。リフローしたはんだは冷却凝固
して第３図（Ｂ）に示すように、導電層（３）と（４）
との間を電気的に導通させるはんだ（６）、金属粒（７
）よりなるスルーホール大向に抵抗接続層が形成される
。(2) Reflow process The solder grains (6A) melt and coalesce to form a continuous phase, and the unmelted metal grains (7) are dispersed, and the surface of the through-hole part is filled with flux generated from the solder paste. A residue (9) remains. The reflowed solder is cooled and solidified to form conductive layers (3) and (4) as shown in Figure 3(B).
solder (6), metal grains (7) that provide electrical continuity between
) A resistive connection layer is formed in the through hole Omukai.
フラックス残留物を除去してスルーホール接続回路基板
かえられる（第３図（Ｃ）参照）。The flux residue is removed and the through-hole connection circuit board is replaced (see FIG. 3(C)).
また、はんだブリッジによる導通は、リフロー工程の初
期のある期間内で少なくとも一部が溶融したはんだが残
りの金属粒同上を合体させることにより起こり、いった
ん導電層間のはんだブリ・ソジが起これば、その後完全
にはんだを溶融させた状態にしても、また、その後に冷
却凝固させても、はんだブリッジは保たれる。Furthermore, conduction due to solder bridges occurs when at least a portion of the melted solder coalesces with the remaining metal grains during a certain period at the beginning of the reflow process, and once solder bridging occurs between the conductive layers, The solder bridge is maintained even if the solder is then completely melted and then cooled and solidified.
リフローの温度は、はんだの融点よりも５℃以上高い温
度とする。さらには接合強度の点から、２０℃以上高い
温度とするのが好ましい。上限温度は基板の耐熱性によ
って定められる。あまり高すぎると、フラックスが炭化
して活性作用がなくなるので、注意が必要である。数秒
以上あればよい。The reflow temperature is 5° C. or more higher than the melting point of the solder. Furthermore, from the viewpoint of bonding strength, it is preferable to set the temperature to be 20° C. or more higher. The upper limit temperature is determined by the heat resistance of the substrate. If the temperature is too high, the flux will carbonize and lose its activation effect, so care must be taken. A few seconds or more is sufficient.
加熱方法としては、熱風加熱、赤外線加熱、ペーパーフ
ェーズソルダリング、レーザー加熱、ホットプレート、
抵抗加熱、はんだごて加熱などがあるが、より高い導通
の再現性を得るためには、はんだが溶融し始めてから、
リフローのピーク温度に達するまでの昇温速度は遅い方
が好ましく、熱風加熱や赤外線加熱が特に好ましい。Heating methods include hot air heating, infrared heating, paper phase soldering, laser heating, hot plate,
There are resistance heating, soldering iron heating, etc., but in order to obtain higher continuity reproducibility, it is necessary to heat the solder after it begins to melt.
The rate of temperature increase until reaching the peak reflow temperature is preferably slow, and hot air heating or infrared heating is particularly preferable.
塗布ペーストのりフローに先立って予備加熱を適用する
ことができる。Preheating can be applied prior to application paste paste flow.
予備加熱は、リフロー時の急激な温度上昇による基板へ
の熱応力を緩和するためと同時に、フラックス中の揮発
成分を完全に放散させてリフロー時のガス発生を抑える
効果があり、かかる予備加熱を行うことが好ましい。予
備加熱の条件は基板の材質や構造などによって異なるが
、はんだの融点よりも低い温度、より好ましくははんだ
の融点よりも２０℃〜６０℃低い温度とする。例えば、
Ｓｎ：Ｐｂ ＝６３：３７の組成のはんだ（共晶はんだ
）場合には、温度１２０６Ｃ〜１６０℃で予備加熱する
ことが好ましい。これにより高すぎると、フラックスが
硬化し、はんだ付着性が悪くなり、逆に低すぎると、フ
ラックスの揮発成分の放散が不充分でガスの滞留を起こ
し、はんだ不慣れの原因となる。加熱時間も基板の熱容
量、はんだペーストの量、フラックスの量や種類、加熱
方式などにより異なるが、基板の表面および内部が規定
の温度に達してから１〜３分間程開栓間にわたって予備
加熱することが好ましい。Preheating is used to alleviate thermal stress on the substrate due to the rapid temperature rise during reflow, and at the same time has the effect of completely dissipating volatile components in the flux and suppressing gas generation during reflow. It is preferable to do so. The preheating conditions vary depending on the material and structure of the substrate, but the temperature is lower than the melting point of the solder, preferably 20° C. to 60° C. lower than the melting point of the solder. for example,
In the case of a solder having a composition of Sn:Pb = 63:37 (eutectic solder), it is preferable to preheat at a temperature of 1206C to 160C. If it is too high, the flux will harden and the solder adhesion will be poor; if it is too low, the volatile components of the flux will not be sufficiently dissipated and gas will remain, causing inexperience with soldering. The heating time also varies depending on the heat capacity of the board, the amount of solder paste, the amount and type of flux, the heating method, etc., but after the surface and inside of the board reach the specified temperature, preheating is performed for about 1 to 3 minutes before opening the plug. preferable.
リフローの後、冷却により形成された金属粒／はんだ固
体層のスルーホール接続体の近傍に付着したフラックス
残留物除去のために、必要に応じて洗浄を行う。洗浄剤
として、トリクロロトリフルオロエタンに代表されるフ
ロン系溶剤や１−１−１トリクロルエタンなどの塩素系
溶剤を用いてシャワー洗浄・超音波洗浄や蒸気洗浄など
を行えばよい。After the reflow, cleaning is performed as necessary to remove flux residue adhering to the vicinity of the through-hole connection of the metal particles/solder solid layer formed by cooling. Shower cleaning, ultrasonic cleaning, steam cleaning, etc. may be performed using a chlorofluorocarbon solvent such as trichlorotrifluoroethane or a chlorine solvent such as 1-1-1 trichloroethane as a cleaning agent.
なお、はんだペーストの塗布に先立って、例えばソルダ
ーレジストのようにはんだ耐熱をもち、かつ、はんだと
の濡れ性が悪い材料を導電層表面のスルーホール用穴周
辺部に塗布あるいは貼付することにより、リフロー時の
はんだを導電層表面に流れ出さないようにすることは好
ましいことである。これにより、スルーホール部ランド
に回路パターンが接近している場合にはランドと回路パ
ターンとのブリッジ発生が抑えられ、また、リフロー時
のフラックスの突沸によるはんだの導電層表面への流出
を防止しスルーホール接続不良の発生を抑えることがで
きる。Before applying the solder paste, for example, by applying or pasting a material such as a solder resist that is resistant to solder heat and has poor wettability with solder to the area around the through hole on the surface of the conductive layer. It is preferable to prevent solder from flowing out onto the surface of the conductive layer during reflow. This prevents bridging between the land and circuit pattern when the circuit pattern is close to the through-hole land, and also prevents solder from flowing onto the surface of the conductive layer due to flux bumping during reflow. It is possible to suppress the occurrence of through-hole connection defects.
次に本発明のスルーホール回路基板の具体例を示すが、
本発明はかかる実施例にのみ限定されるものではない。Next, specific examples of the through-hole circuit board of the present invention will be shown.
The present invention is not limited only to such embodiments.
寒塵皿土
第１図に示す絶縁層の両側にプリント回路を有する回路
基板を用意した。絶縁層回路の（導電層）厚みはそれぞ
れ１５０μｍ、５０μｍであった。A circuit board having printed circuits on both sides of an insulating layer as shown in FIG. 1 was prepared. The (conductive layer) thickness of the insulating layer circuit was 150 μm and 50 μm, respectively.
回路基板の両表面にソルダーレジスト（アサヒ化研製、
ＬＩＶＦ−２Ｇ型）を各１０μｍずつ塗布し、聞により
硬化させた。この時の積層体の厚みは３７０μｍであっ
た。その後スルーホール形成位置にドリルを用いて直径
０．４５ｕ＋ｍの貫通穴をあけた。Solder resist (manufactured by Asahi Kaken,
LIVF-2G type) was coated to a thickness of 10 μm each and cured over time. The thickness of the laminate at this time was 370 μm. Thereafter, a through hole with a diameter of 0.45 u+m was made at the through hole forming position using a drill.
次にメタルマスク（０，１ｍｍｔ）を用いたスクリーン
印刷法にて、スルーホールに下記組成によりなるはんだ
ペースト■を穴壁に露出している２層の導電層上にまた
がりしかも穴にほぼすり切りになるように第３図（Ａ）
の如く充填した。Next, using a screen printing method using a metal mask (0.1 mm thick), apply solder paste ■ having the composition below to the through hole, spanning over the two conductive layers exposed on the hole wall, and almost cutting it into the hole. Figure 3 (A)
It was filled as follows.
はんだペースト■の組織
はんだ粒材質 Ｓｎ／ Ｐｂ ＝ ６３／３７はんだ
粒径 ３００メツシユ
はんだ粒形状 不定形
金属粒材質 銀
金属粒径 ３５０メツシユ
金属粒形状 不定形
フラックス 弱活性ロジン
混合比 （体積比）
（はんだ粒）：（金属粒）＝（フラックス）＝ ９０
： １０ ：１０５金属粒混合量 １０ｖｏ １％
その後、１２０°Ｃの熱風オーブン中で１０分間予備加
熱した後、２１５℃熱風オーブン中で３分間リフローさ
せ、ついでｌ−１−１）リクロルエタンで超音波洗浄し
て表面のフラックス残留物を除去して第３図（Ｃ）の如
きスルーホール回路基板を得た。得られたスルーホール
穴数は２００穴であった。リフローしたはんだはほぼ１
００％の収率で第３図（Ｃ）に示すように２導電層間に
またがるようにブリッジされており、接合強度も通常の
はんだと比べて何ら遜色はなかった。また、２３０℃×
３０ｓｅｃの条件で再リフローしたところ初期導通のあ
ったスルーホール部は全ての断線発生はみられなかった
。Structure of solder paste ■ Solder grain material Sn/Pb = 63/37 Solder grain size 300 mesh solder grain shape Irregular metal grain material Silver metal grain size 350 mesh metal grain shape Irregular flux Weakly active rosin mixing ratio (volume ratio) Solder grains): (metal grains) = (flux) = 90
: 10 :105 Mixed amount of metal particles 10vo 1% Then, after preheating in a hot air oven at 120°C for 10 minutes, reflowing in a hot air oven at 215°C for 3 minutes, and then ultrasonicating with l-1-1) dichlorethane. By cleaning and removing flux residue on the surface, a through-hole circuit board as shown in FIG. 3(C) was obtained. The number of through holes obtained was 200 holes. The reflowed solder is almost 1
As shown in FIG. 3(C), a bridge was formed across the two conductive layers with a yield of 0.00%, and the bonding strength was no inferior to that of ordinary solder. Also, 230℃×
When reflow was performed for 30 seconds, no disconnection was observed in the through-hole section where there was initial continuity.
実施例２
導電層が４枚積層され各導電層間に絶縁層を挾んだ４層
の回路基板を用意した。回路基板の各導電層、各絶縁層
の厚みは１５０μｍ、５０μｍであった。その後実施例
１と同様にソルダーレジストを塗布硬化し、穴径０．７
ｍｍのスルーホールを２００穴形成した。この時の厚み
は７７０μｍであった。Example 2 A four-layer circuit board was prepared in which four conductive layers were laminated and an insulating layer was sandwiched between each conductive layer. The thicknesses of each conductive layer and each insulating layer of the circuit board were 150 μm and 50 μm. Thereafter, a solder resist was applied and hardened in the same manner as in Example 1, and the hole diameter was 0.7.
200 mm-sized through holes were formed. The thickness at this time was 770 μm.
次に実施例１と同様の方法・条件にて実施例１で使用し
たはんだペースト■を穴壁に露出している４層の導電層
上にまたがり、かつ、スルーホールにほぼすりきりにな
るように塗布し充填した。Next, using the same method and conditions as in Example 1, apply the solder paste ■ used in Example 1 so that it spans the four conductive layers exposed on the hole wall and almost completely covers the through hole. Coated and filled.
その後、１２０℃の熱風オーブン中で１０分間予備加熱
した後、２１５°Ｃの熱風オーブン中で３分間リフロー
させ、ついで１−１−１ ）リクロルエタンで超音波
洗浄して表面のフラックス残留物を除去して第４図の如
きスルーホール回路基板を得た。Then, after preheating in a hot air oven at 120°C for 10 minutes, reflowing in a hot air oven at 215°C for 3 minutes, and then 1-1-1) Ultrasonic cleaning with dichloroethane to remove flux residue on the surface. A through-hole circuit board as shown in FIG. 4 was thus obtained.
得られた接合部は、リフローしたはんだがほぼ１００％
の収率で第４図のように４つの導電層間にまたがるよう
にブリッジされており、接合強度も通常のはんだと比べ
て何ら遜色はなかった。なお、２３０℃Ｘ ３０ｓｅｃ
の条件で再リフローしたところ初期導通のあったスルー
ホール部は全て断線の発生はみられなかった。The resulting joint is almost 100% reflowed solder.
As shown in FIG. 4, the solder was bridged across four conductive layers with a yield of 100%, and the bonding strength was no inferior to that of ordinary solder. In addition, 230℃×30sec
When reflowed under these conditions, no disconnection was observed in any of the through-hole areas where there was initial continuity.
比較例１
実施例２で使用したはんだペースト■の代わりにＳｎ／
Ｐｂ＝ ６３／３７合金のはんだペースト（千住金属工
業■製、商品名； ５ＰＴ−５５−６３）を用いる以外
は、実施例２と同様にしてスルーホール回路基板を得た
。Comparative Example 1 Sn/
A through-hole circuit board was obtained in the same manner as in Example 2, except that a Pb=63/37 alloy solder paste (manufactured by Senju Metal Industry ■, trade name: 5PT-55-63) was used.
得られたスルーホール回路基板において、２つまたは４
つの導電層間にまたがるようにブリッジされ導通のある
ものの収率は、実施例１の形態では４０％以下、実施例
２の形態では１０％以下であった。In the resulting through-hole circuit board, 2 or 4
The yield of conductive materials bridged across two conductive layers was 40% or less in the form of Example 1, and 10% or less in the form of Example 2.
実施例３
実施例Ｉ及び２で用いたのと同じ回路基板にスルーホー
ル接続回路基板を製作した。Example 3 A through-hole connection circuit board was fabricated on the same circuit board used in Examples I and 2.
下記第１表に示すはんだペースト■〜［相］を用いる以
外は、実施例１及び２と全く同様にしてスルーホール回
路基板を形成した。得られたスルーホール穴数は２００
穴であった。なお、各々のペーストのはんだ粒、金属粒
の粒径及び形状、またフラックスの材質ははんだペース
ト■と同様であった。なお、ペースト■、■、■、■、
及び■の金属粒の表面のメツキは無電解メツキによるも
のである。Through-hole circuit boards were formed in exactly the same manner as in Examples 1 and 2, except that the solder pastes ① to [phase] shown in Table 1 below were used. The number of through holes obtained is 200.
It was a hole. The diameter and shape of the solder grains and metal grains of each paste, as well as the material of the flux, were the same as those of solder paste ①. In addition, paste ■, ■, ■, ■,
The plating on the surface of the metal grains in (1) and (2) is by electroless plating.
いずれのスルーホール回路基板においても、リフローし
たはんだはほぼ１００％の収率で２つまたは４つの導電
層間にまたがるようにブリッジされており、接合強度も
通常のはんだと比べて何ら遜色はなかった。また２３０
°ＣＸ ３０ｓｅｃの条件で再リフローしたところ初期
導通のあったスルーホール部は全て断線の発生はなく、
その後の信頼性も良好であった。In both through-hole circuit boards, the reflowed solder bridged two or four conductive layers with almost 100% yield, and the bonding strength was comparable to that of regular solder. . 230 again
After reflowing under the conditions of °CX 30 seconds, there was no disconnection in any of the through holes where there was initial continuity.
Subsequent reliability was also good.
以下余白
〔発明の効果〕
本発明のスルーホール回路基板は、そのスルーホール接
続に高融点金属粒を特定の条件で含むはんだペースト組
成物を使用するので、リフロー工程でのりフロー組成物
の表面張力が単独はんだのそれよりも小さく、リフロー
時に発生するガスやはんだ自体の表面張力による盛り上
がりの高さによる橋かけ接合不良を生ずることがないの
で、導電層間を確実に電気的に接合して両導電層間の電
気的導通をとることができる。しかもまた、導電層とは
んだとの接合強度が高く、またスルーホール部の比抵抗
を著しく低くすることができる。Blank space below [Effects of the Invention] Since the through-hole circuit board of the present invention uses a solder paste composition containing high-melting point metal particles under specific conditions for through-hole connection, the surface tension of the solder paste composition during the reflow process is smaller than that of single solder, and there is no risk of bridging bond failure due to the height of the bulge caused by the gas generated during reflow or the surface tension of the solder itself, so it is possible to reliably electrically bond between conductive layers and to conduct both conductive layers. Electrical continuity between layers can be established. Furthermore, the bonding strength between the conductive layer and the solder is high, and the resistivity of the through-hole portion can be significantly lowered.
本発明のスルーホール回路基板は、スルーホール接続が
高融点金属粒を特定の条件で分散したはんだ層により形
成されるので、再リフロー下でも抵抗接続層の表面張力
が単独はんだよりも小さく、橋かけ接合が破壊されるこ
とがない。In the through-hole circuit board of the present invention, the through-hole connections are formed by a solder layer in which high-melting point metal particles are dispersed under specific conditions, so even under reflow, the surface tension of the resistance connection layer is lower than that of a single solder, and the bridge The overlay joint will not be destroyed.
第１図は本発明スルーホール回路基板の種々の実施態様
を示す断面図である。第２図（Ａ）〜（Ｃ）は本発明の
スルーホール接続の形成過程を示す。
第３図は、本発明の他の実施例を示す。第４図は、従来
のはんだペーストによるスルーホール回路板のスルーホ
ール接続欠鉄の例示である。
１・・・スルーホール回路基板、２・・・絶縁層、３・
・・回路の導電層、５・・・スルーホール、６・・・は
んだ相、７・・・高融点金属粒、訃・・フラックス。
特許出願人 旭化成工業株式会社
第
図
篤２図
（Ａ）
（Ｂ）
第４
図
第３図
（Ａ）
手
続
補
正
書（方式）
事件の表示
平成
Ω年特許願第１１８６３６号
！４発明の名称
スルーホール回路基板およびその製造方法補正をする者
事件との関係FIG. 1 is a sectional view showing various embodiments of the through-hole circuit board of the present invention. FIGS. 2A to 2C show the process of forming a through-hole connection according to the present invention. FIG. 3 shows another embodiment of the invention. FIG. 4 is an illustration of a through-hole connection missing iron in a through-hole circuit board using a conventional solder paste. DESCRIPTION OF SYMBOLS 1... Through-hole circuit board, 2... Insulating layer, 3...
...Circuit conductive layer, 5.Through hole, 6.Solder phase, 7.High melting point metal particles, 5.Flux. Patent Applicant Asahi Kasei Kogyo Co., Ltd. Figure Atsushi Figure 2 (A) (B) Figure 4 Figure 3 (A) Procedural Amendment (Method) Case Description Heisei Ω Patent Application No. 118636! 4. Name of the invention: Through-hole circuit board and its relation to the case of a person amending its manufacturing method
Claims (1)
された部分を有する積層体を用いたスルーホール回路基
板において、前記絶縁層の両面に積層された導電層が金
属粒を含むはんだでスルーホール接続され、前記金属粒
が前記はんだの固相線温度よりも高い融点を有し、かつ
はんだ付け温度においてはんだ中に実質的に固溶しない
金属からなり、銅又は銅基合金を表面に露出することの
ない粒子からなり、かつ下式で表わされる体積含有率で
２％〜２０％の割合で含まれてなるスルーホール回路基
板 金属粒の体積／（金属粒の体積＋はんだの体積）×１０
０（％）（２）絶縁層を挟んでその両面にそれぞれ導電
層が積層された部分を有する積層体を用いたスルーホー
ル回路基板の製造方法において、 ｉ）前記積層体にスルーホールをあける工程ｉｉ）前記
スルーホールに、はんだ粒金属粒とフラックスとを含み
前記金属粒が前記はんだの固相線温度よりも高い融点を
有し、かつ、はんだ付け温度においてはんだ中に実質的
に固溶しない金属からなり、銅又は銅基合金を表面に露
出することのない粒子からなり、かつ下式で表わされる
体積含有率で５％から２０％の割合で含まれてなるはん
だペーストを充填する工程 金属粒の体積／（金属粒の体積＋はんだの体積）×１０
０（％）ｉｉｉ）前記はんだペーストを前記はんだ粒の
固相線温度以上かつ前記金属粒の融点未満の温度でリフ
ローする工程を含むことを特徴とするスルーホール回路
基板の製造方法。(1) In a through-hole circuit board using a laminate having conductive layers laminated on both sides of an insulating layer, the conductive layers laminated on both sides of the insulating layer are solder containing metal particles. through-hole connected, the metal particles have a melting point higher than the solidus temperature of the solder, and are made of a metal that does not substantially dissolve in the solder at the soldering temperature, and have copper or a copper-based alloy on the surface. Volume of metal particles on a through-hole circuit board consisting of particles that are not exposed and contained at a volume content of 2% to 20% expressed by the following formula/(volume of metal particles + volume of solder) ×10
0 (%) (2) A method for manufacturing a through-hole circuit board using a laminate having conductive layers laminated on both sides with an insulating layer sandwiched therebetween, including: i) drilling a through hole in the laminate; ii) The through hole contains solder grains, metal grains, and flux, and the metal grains have a melting point higher than the solidus temperature of the solder, and do not substantially form a solid solution in the solder at the soldering temperature. A process metal that is filled with a solder paste that is made of metal, that is made of particles that do not expose copper or copper-based alloys on the surface, and that contains a volume content of 5% to 20% expressed by the following formula: Volume of grains/(volume of metal grains + volume of solder) x 10
0(%)iii) A method for manufacturing a through-hole circuit board, comprising the step of reflowing the solder paste at a temperature higher than the solidus temperature of the solder grains and lower than the melting point of the metal grains.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2118636A JPH0415987A (en) | 1990-05-10 | 1990-05-10 | Through hole circuit board and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2118636A JPH0415987A (en) | 1990-05-10 | 1990-05-10 | Through hole circuit board and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0415987A true JPH0415987A (en) | 1992-01-21 |
Family
ID=14741443
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2118636A Pending JPH0415987A (en) | 1990-05-10 | 1990-05-10 | Through hole circuit board and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0415987A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1109430A2 (en) * | 1999-12-14 | 2001-06-20 | Nitto Denko Corporation | Double-sided circuit board and multilayer wiring board comprising the same and process for producing double-sided circuit board |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63301586A (en) * | 1987-01-12 | 1988-12-08 | Asahi Chem Ind Co Ltd | Through-hole circuit board and manufacture thereof |
-
1990
- 1990-05-10 JP JP2118636A patent/JPH0415987A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63301586A (en) * | 1987-01-12 | 1988-12-08 | Asahi Chem Ind Co Ltd | Through-hole circuit board and manufacture thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1109430A2 (en) * | 1999-12-14 | 2001-06-20 | Nitto Denko Corporation | Double-sided circuit board and multilayer wiring board comprising the same and process for producing double-sided circuit board |
| EP1109430A3 (en) * | 1999-12-14 | 2003-09-10 | Nitto Denko Corporation | Double-sided circuit board and multilayer wiring board comprising the same and process for producing double-sided circuit board |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4923336B2 (en) | Circuit board and electronic device using the circuit board | |
| JPH08116169A (en) | Assembly and method for connecting alloy solder | |
| WO2013132942A1 (en) | Bonding method, bond structure, and manufacturing method for same | |
| JPS6317337B2 (en) | ||
| EP0751847A1 (en) | A method for joining metals by soldering | |
| JP2001274539A (en) | Electrode joining method for printed wiring board loaded with electronic device | |
| JP3660798B2 (en) | Circuit board | |
| JPH0415987A (en) | Through hole circuit board and manufacture thereof | |
| JP4512772B2 (en) | Method for manufacturing conductive ball mounting mask | |
| JPH07118498B2 (en) | Electrical junction | |
| JPS63309390A (en) | Soldering paste | |
| JPH0620088B2 (en) | Integrated circuit contact and solder bonding method | |
| JPH0417994A (en) | Solder composition | |
| JPH06302952A (en) | Manufacture of circuit board with through hole | |
| JP3721660B2 (en) | Conductive material and conductive paste | |
| JP3544439B2 (en) | Connection pins and board mounting method | |
| Thwaites | Some metallurgical studies related to the surface mounting of electronic components | |
| JP2004289113A (en) | Metal electrode and bonding method using same | |
| JP4368081B2 (en) | Circuit device with chip components mounted | |
| JPH01138788A (en) | Through-hole circuit substrate and manufacture thereof | |
| JPH01230285A (en) | Through hole circuit board | |
| JPH02125491A (en) | Electric connection and manufacture thereof | |
| WO2001076335A1 (en) | Mounting structure of electronic device and method of mounting electronic device | |
| JPS63301586A (en) | Through-hole circuit board and manufacture thereof | |
| JP2004207534A (en) | Wiring board and electronic device using it |