JPH04150026A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH04150026A JPH04150026A JP27331190A JP27331190A JPH04150026A JP H04150026 A JPH04150026 A JP H04150026A JP 27331190 A JP27331190 A JP 27331190A JP 27331190 A JP27331190 A JP 27331190A JP H04150026 A JPH04150026 A JP H04150026A
- Authority
- JP
- Japan
- Prior art keywords
- film
- gas
- processed
- semiconductor device
- resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 15
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 238000000034 method Methods 0.000 claims abstract description 25
- 230000001681 protective effect Effects 0.000 claims abstract description 20
- 238000001312 dry etching Methods 0.000 claims abstract description 14
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 claims abstract description 5
- 239000000203 mixture Substances 0.000 claims abstract description 4
- 239000007789 gas Substances 0.000 claims description 24
- 238000005530 etching Methods 0.000 claims description 18
- 229910052736 halogen Inorganic materials 0.000 claims description 10
- 150000002367 halogens Chemical class 0.000 claims description 9
- 239000005360 phosphosilicate glass Substances 0.000 claims description 6
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims description 3
- 229910001882 dioxygen Inorganic materials 0.000 claims description 3
- 238000000059 patterning Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 abstract description 5
- 239000010410 layer Substances 0.000 description 27
- 238000011109 contamination Methods 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 3
- HEDRZPFGACZZDS-UHFFFAOYSA-N Chloroform Chemical compound ClC(Cl)Cl HEDRZPFGACZZDS-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007790 scraping Methods 0.000 description 2
- VZGDMQKNWNREIO-UHFFFAOYSA-N tetrachloromethane Chemical compound ClC(Cl)(Cl)Cl VZGDMQKNWNREIO-UHFFFAOYSA-N 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- WKBOTKDWSSQWDR-UHFFFAOYSA-N Bromine atom Chemical compound [Br] WKBOTKDWSSQWDR-UHFFFAOYSA-N 0.000 description 1
- 244000228957 Ferula foetida Species 0.000 description 1
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 description 1
- 229910052794 bromium Inorganic materials 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 125000001301 ethoxy group Chemical group [H]C([H])([H])C([H])([H])O* 0.000 description 1
- -1 halogen ions Chemical class 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- ZFXYFBGIUFBOJW-UHFFFAOYSA-N theophylline Chemical compound O=C1N(C)C(=O)N(C)C2=C1NC=N2 ZFXYFBGIUFBOJW-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
【産業上の利用分野１
本発明は半導体装置の製造方法において、特に多層レジ
ストをマスクに用いたパターン形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a pattern forming method using a multilayer resist as a mask.
［従来の技術）
近年半導体製造プロセスでは、素子が高集積化するにつ
れ加工寸法が微細化している。このためリソグラフィ技
術では、噴層レジストに変わり多層レジストが用いられ
るようになってきた。多層レジストには特開昭５１−１
０７７７５に記載されている三層レジスト法、そして特
開昭５７−１７２７３５に記載されている二層レジスト
法がある。[Prior Art] In recent years, in semiconductor manufacturing processes, processing dimensions have become finer as elements become more highly integrated. For this reason, in lithography technology, multilayer resists have been used instead of jet resists. For multilayer resist, JP-A-51-1
There is a three-layer resist method described in Japanese Patent Publication No. 07775, and a two-layer resist method described in JP-A-57-172735.
第２図を用いて従来の三層レジストを用いたパターン形
成方法を説明する。（ａ）は下地基板１、加工する被加
工膜２上に下層有機膜３、その上に塗布性無機膜４．そ
してその上にレジスト層５を形成後、露光、現像により
レジスト層５にパターンを形成した図である。その後Ｃ
Ｆ、系のガスでドライエツチングにより無機膜４にパタ
ーンを転写し１次に無機膜４をマスクとして、ドライエ
ツチングにより有機膜３にパターンを転写する（ｂ）。A conventional pattern forming method using a three-layer resist will be explained with reference to FIG. (a) shows a base substrate 1, a lower organic film 3 on a film to be processed 2, and a coatable inorganic film 4 on top of it. After forming a resist layer 5 thereon, a pattern is formed on the resist layer 5 by exposure and development. Then C
The pattern is transferred to the inorganic film 4 by dry etching using F. type gas, and then the pattern is transferred to the organic film 3 by dry etching using the inorganic film 4 as a mask (b).
次に無機膜４を除去し有機膜３をマスクとして、被加工
膜２をＲＩ Ｅ （Ｒｅａｃｔｉｖｅ Ｉｏｎ Ｅｔｃ
ｈｉｎｇ）により加工している（ｃ）。Next, the inorganic film 4 is removed, and the processed film 2 is subjected to RI E (Reactive Ion Etc.) using the organic film 3 as a mask.
hing) (c).
［発明が解決しようとする課題１
上記従来技術では、無機膜４をマスクとして有機膜３を
エツチングするときに、エツチングガスとして酸素とハ
ロゲンガスの混合ガスを用いると加工寸法精度（レジス
ト層上に形成されたパターンと有機膜二ノチング後のパ
ターンとの寸法差）が向上する。また被加工膜が金属タ
ングステン（Ｗ）膜の場合、この混合ガスではＷが削れ
てしまう恐れがあるが、ハロゲンガスの添加量を比較的
少なく、例えば酸素／塩素＝３８／１２の混合比とする
と、全面についたＷ膜はほとんど削られないため、この
混合ガスをエツチングに用いることができると考えられ
ていた。[Problem to be Solved by the Invention 1] In the above-mentioned prior art, when etching the organic film 3 using the inorganic film 4 as a mask, using a mixed gas of oxygen and halogen gas as the etching gas results in poor processing dimensional accuracy (on the resist layer). The dimensional difference between the formed pattern and the pattern after notching the organic film is improved. In addition, if the film to be processed is a metallic tungsten (W) film, there is a risk that the W may be scraped with this mixed gas. As a result, the W film on the entire surface was hardly etched away, so it was thought that this mixed gas could be used for etching.
しかしエツチング特性を詳細に検討したところ、第２図
（ｄ）に示すようにオーバーエッチ時に大面積のパター
ンではＷ膜は削れないにもかかわらず、パターン寸法０
．６μｍ以下の微細なスペースパターンでＷ膜が削れて
しまうという新たな課題を発見した。このため、パター
ン形状によるＷ膜の残存状態にバラツキが生じ、次のＷ
膜のトライエツチング工程で問題となることがわかった
。また有機膜のオーバーエッチ時に削れたＷ成分は、第
２図（ｄ）に示すように有機膜パターン上部に付着し、
除去困難な側壁デポ物１０となり、汚染や欠陥発生の原
因となることも判明した。However, when we examined the etching characteristics in detail, we found that even though the W film could not be removed with a large-area pattern during over-etching, the pattern size was 0.
．． We discovered a new problem in that the W film is scraped by fine space patterns of 6 μm or less. For this reason, variations occur in the remaining state of the W film depending on the pattern shape, and the next W film
It was found that this was a problem in the film tri-etching process. In addition, the W component scraped during over-etching of the organic film adheres to the top of the organic film pattern as shown in Figure 2(d).
It has also been found that this results in side wall deposits 10 that are difficult to remove, causing contamination and defects.
本発明の目的は、上記のように無機膜パターンをマスク
としてドライエツチングにより有機膜にパターン形成す
る際に、削れによる被加工膜の膜厚バラツキや、側壁デ
ポ膜による汚染や欠陥の発生を防止し、歩留まりを向上
させることにある。The purpose of the present invention is to prevent variations in the film thickness of the processed film due to scraping and the occurrence of contamination and defects due to sidewall deposits when forming a pattern on an organic film by dry etching using an inorganic film pattern as a mask as described above. The objective is to improve yield.
【課題を解決するための手段）
上記目的は、被加工膜２の上に無機系の膜を形成し、そ
の後中間層無機膜４をトライエツチングにより除去する
時に、同時にこの無機系の膜をパターニングすることに
より達成される。[Means for solving the problem] The above purpose is to form an inorganic film on the film to be processed 2, and then pattern this inorganic film at the same time when removing the intermediate layer inorganic film 4 by tri-etching. This is achieved by
［作用］
被加工膜の上に無機膜を形成することにより、この無機
膜が有機膜ドライエツチング時の保護膜となり、被加工
膜の削れを防止できる。またこの削れた被加工膜の成分
を含む側壁デポ物は、除去するのが困難であるが、保護
膜を設けることによりこの側壁デポ物が生成することを
防ぐことができる。またこの無機膜のパターニングは、
三層レジストの中間層無機膜、または二層レジストの上
層レジストをトライエツチングにより除去する時に同時
に行なうことができるため、比較的簡便である。[Function] By forming an inorganic film on the film to be processed, this inorganic film serves as a protective film during dry etching of the organic film, thereby preventing the film to be processed from being scraped. Although it is difficult to remove side wall deposits containing components of the scraped film to be processed, the formation of side wall deposits can be prevented by providing a protective film. In addition, the patterning of this inorganic film is
This process is relatively simple because it can be performed simultaneously when removing the intermediate inorganic layer of a three-layer resist or the upper layer of a two-layer resist by tri-etching.
【実施例］ 〔実施例１〕 以下に本発明の一実施例を、第１図を用いて説明する。【Example] [Example 1] An embodiment of the present invention will be described below with reference to FIG.
本実施例は、被加工膜として金属Ｗ膜。In this example, a metal W film is used as the film to be processed.
保護膜としてＰ Ｓ Ｇ （Ｐｈｏｓｐｈｏｓｉｌｉｃ
ａｔｅ ｇｌａｓｓ） 。As a protective film, PSG (Phosphosilic
ate glass).
そして多層レジスト法として三層レジストを用いた例で
ある。This is an example in which a three-layer resist is used as a multi-layer resist method.
まず、第１図（ａ）の如く、３１基板１上に被加工膜２
としてＷ膜、その上に保護膜６としてＰＳＧ膜１１００
ｎを形成し、その上に有機膜３、中間層４として塗布形
成Ｓｉｏ２膜１１００ｎ、上層レジスト５からなる三層
レジストを形成し、上層レジストをパターニングする。First, as shown in FIG. 1(a), a film 2 to be processed is placed on a substrate 1 31.
A W film is formed as a protective film 6, and a PSG film 1100 is formed on it as a protective film 6.
A three-layer resist consisting of an organic film 3, a coated Sio2 film 1100n as an intermediate layer 4, and an upper resist 5 is formed thereon, and the upper resist is patterned.
次にＣＦ４系のガスを用いてドライエツチングにより中
間層４をパターニングし、その後中間層４パターンをマ
スクとして、ハロゲン系のガスを含む０２ガスを用いて
ドライエツチングにより有機膜３にパターンを転写する
（ｂ）。ここでは、ハロゲン系のガスとして塩素ガスを
用い、酸素ガスと塩素ガスの混合比を３８／１２とした
。ただしこの混合比に限らす４５１５〜２０／３０でも
よい。次にＣＦ４系のガスを用いてドライエツチングに
より中間層４を除去し、同時に保護膜６のＰＳＧ膜をパ
ターニングする（ｃ）。Next, the intermediate layer 4 is patterned by dry etching using a CF4-based gas, and then, using the intermediate layer 4 pattern as a mask, the pattern is transferred to the organic film 3 by dry etching using 02 gas containing a halogen-based gas. (b). Here, chlorine gas was used as the halogen gas, and the mixing ratio of oxygen gas and chlorine gas was 38/12. However, the mixing ratio is not limited to this, and may be 4515 to 20/30. Next, the intermediate layer 4 is removed by dry etching using a CF4-based gas, and at the same time the PSG film of the protective film 6 is patterned (c).
本実施例によれば、従来の保護膜を用いない場合に生じ
るハロゲンガスによるＷ膜の削れを防止することができ
、加工精度が向上した。また汚染、欠陥の発生も減少し
、この方法を使って製作した半導体装置の歩留まりが向
上した。また汚染が少ないことから、この方法を用いて
形成した半導体装置の寿命も長かった。According to this example, it was possible to prevent the W film from being scraped by halogen gas, which would otherwise occur when a conventional protective film was not used, and the processing accuracy was improved. In addition, the occurrence of contamination and defects was reduced, and the yield of semiconductor devices manufactured using this method was improved. Furthermore, since there was little contamination, the life of semiconductor devices formed using this method was also long.
なお本実施例では、中間層の除去にドライエツチングを
用いたが、トライエツチングに限らずウェットエンチン
グでもよい。例えばフッ酸と水、あるいはフッ酸とフン
化アンモニウムの混合液からなるエツチング液で除去し
てもよい。またここでは、有機膜のエツチング時に塩素
ガスを含む酸素ガスを用いたが、これに限らず臭素ガス
、塩化水素ガス、四塩化炭素ガス、クロロホルム、ジク
ロルメタンなどの他のハロゲンガスを加えてもよい。In this embodiment, dry etching was used to remove the intermediate layer, but the method is not limited to tri-etching, and wet etching may also be used. For example, it may be removed using an etching solution consisting of a mixture of hydrofluoric acid and water, or a mixture of hydrofluoric acid and ammonium fluoride. Furthermore, here, oxygen gas containing chlorine gas was used when etching the organic film, but other halogen gases such as bromine gas, hydrogen chloride gas, carbon tetrachloride gas, chloroform, and dichloromethane may also be added. .
〔実施例２〕
以下、第３図を用いて説明する。本実施例は、被加工膜
として金属膜Ａｌ、保護膜としてｐ−ＴＥ ＯＳ （ｐ
ｌａｓｍａイｅｔｒａ Ｅｔｈｏｘｙ ０ｒｔｈｏ ５
ｉｌｉｃａｔｅ） 。[Example 2] This will be explained below using FIG. 3. In this example, a metal film Al is used as the film to be processed, and p-TE OS (p
lasma etra Ethoxy 0rtho 5
ilicate).
そして多層レジスト法として二層レジストを用いた例で
ある。This is an example in which a two-layer resist is used as a multi-layer resist method.
まず、第３図（ａ）の如く、Ｓｉ基板１上に被加工膜膜
２としてＡ１膜、その上に保護膜６としてｐ−ＴＥＯ３
膜１１００ｎを形成し、その上に有機膜３、Ｓｉ含有無
機レジスト７からなる二層レジストを形成し、無機レジ
スト７をパターニングする。次にレジストパターンをマ
スクとしてハロゲン系のガスを含む０２ガスを用いて、
ドライエツチングにより有機膜３にパターンを転写する
（ｂ）。次に、ＣＦ、系のガスを用いてドライエツチン
グにより無機レジスト膜７を除去し、同時に保護膜のｐ
−ＴＥＯ３膜６をパターニングする（ｃ）。次に、ドラ
イエツチングによりＡ１膜２を加工し、０２プラズマ処
理により有機膜３を除去する（ｄ）。その上に眉間膜と
してＨＬＤ膜８を形成し、その上にフォトレジストパタ
ーン５を形成する（ｅ）。さらにレジストパターン５を
マスクとしてＨＬＤ膜８．ｐ−ＴＥＯ５膜６を連続して
加工し、Ａ１膜パターン２上に開口部を形成する（ｆ）
。次に、二層目のＡ１膜８を形成し、Ａ１膜８のパター
ニングを行なって二層目のＡＩ層９を形成する（ｇ）。First, as shown in FIG. 3(a), an A1 film is placed on a Si substrate 1 as a film to be processed 2, and a p-TEO3 film is placed on top of the A1 film as a protective film 6.
A film 1100n is formed, a two-layer resist consisting of an organic film 3 and a Si-containing inorganic resist 7 is formed thereon, and the inorganic resist 7 is patterned. Next, using the resist pattern as a mask and using 02 gas containing halogen gas,
The pattern is transferred to the organic film 3 by dry etching (b). Next, the inorganic resist film 7 is removed by dry etching using a CF-based gas, and at the same time the protective film is etched.
- Patterning the TEO3 film 6 (c). Next, the A1 film 2 is processed by dry etching, and the organic film 3 is removed by 02 plasma treatment (d). An HLD film 8 is formed thereon as a glabellar film, and a photoresist pattern 5 is formed thereon (e). Further, using the resist pattern 5 as a mask, the HLD film 8. Continuously process the p-TEO5 film 6 to form an opening on the A1 film pattern 2 (f)
. Next, a second A1 film 8 is formed, and the A1 film 8 is patterned to form a second AI layer 9 (g).
本実施例によれば、従来の保護膜を用いない場合に生じ
るＡ１膜２の削れを防止することができ、かつＡ１膜の
腐食を防ぐことが出来る。これは、ｐＴＥＯ５膜がＡｌ
上に腐食の原因となるハロゲンイオンが付着するのを防
ぐ働きをするためである。According to this embodiment, it is possible to prevent the A1 film 2 from being scraped which would occur when a conventional protective film is not used, and it is also possible to prevent corrosion of the A1 film. This is because the pTEO5 film is Al
This is because it works to prevent halogen ions, which cause corrosion, from adhering to the surface.
また削れたＡ１成分からなる側壁デボ物が生成するのも
防ぐことができる。It is also possible to prevent the formation of side wall debris made of the shaved A1 component.
また保護膜としては、プラズマＣＶＤによる５１０２や
Ｓｉ、Ｎ４膜、常圧または低圧ｃＶＤ−５ｉＯ２膜、熱
酸化膜等を用いても同様の結果が得られた。Similar results were also obtained using 5102, Si, N4 films produced by plasma CVD, normal pressure or low pressure cVD-5iO2 films, thermal oxide films, etc. as protective films.
（発明の効果）
本発明によれば、多層レジストの有機膜トライエツチン
グ時に生じる被加工膜の削れを防止できる。また被加工
膜がＡｌ膜の場合、Ａ１膜の腐食防止の効果もある。ま
たその削れによって生じる側壁デボ物の生成を防ぐこと
ができるため、除去困難な側壁デボ物による汚染や欠陥
の発生を防止することができる。またエツチング時に直
接金属膜がスパッタされることがないため、エツチング
装置チャンバ内の金属汚染を防ぐことができる。(Effects of the Invention) According to the present invention, it is possible to prevent the film to be processed from being scraped during tri-etching of an organic film of a multilayer resist. Furthermore, when the film to be processed is an Al film, there is also an effect of preventing corrosion of the A1 film. Furthermore, since the generation of side wall debris caused by the scraping can be prevented, contamination and defects caused by side wall debris that are difficult to remove can be prevented. Furthermore, since the metal film is not directly sputtered during etching, metal contamination within the etching apparatus chamber can be prevented.
このため、この方法を用いて形成した半導体装置の歩留
まり、及び信頼性が向上する。Therefore, the yield and reliability of semiconductor devices formed using this method are improved.
第１図は本発明の三層レジストを用いた実施例による加
工工程の断面図、第２図は従来の三層レジストを用いた
被加工膜の加工工程の断面図、第３図は、本発明の二層
レジストを用いて形成したＡに層工程の実施例を示す断
面図である。
符号の説明
１・・半導体基板、２ 被加工膜、３・有機膜、４・無
機膜、５・・レジスト、６・・・保護膜、７・無機レジ
スト、８・・・層間膜、９・Ａ１膜、１０・側壁デポ物FIG. 1 is a cross-sectional view of a processing step according to an embodiment using a three-layer resist of the present invention, FIG. 2 is a cross-sectional view of a processing step of a processed film using a conventional three-layer resist, and FIG. FIG. 3 is a cross-sectional view showing an example of a layer process in A formed using the two-layer resist of the invention. Explanation of the symbols 1... Semiconductor substrate, 2 Film to be processed, 3 Organic film, 4 Inorganic film, 5 Resist, 6 Protective film, 7 Inorganic resist, 8 Interlayer film, 9... A1 membrane, 10/side wall deposit
Claims (1)
りパターニングする方法において、加工する下地膜の上
に保護膜を形成する工程と、上層または中間層を除去す
ると同時にエッチングする部分の保護膜を除去する工程
を含むことを特徴とする半導体装置の製造方法。 ２、特許請求の範囲第１項記載の方法において、前記下
層有機膜をエッチングするガスが少なくともハロゲン系
のガスを含むことを特徴とする半導体装置の製造方法。 ３、特許請求の範囲第１項記載の方法において、前記下
層有機膜をエッチングするガスが少なくともハロゲン系
のガスと酸素ガスの混合物であることを特徴とする半導
体装置の製造方法。 ４、特許請求の範囲第３項記載の方法において、前記ハ
ロゲン系ガスが塩素ガスであることを特徴とする半導体
装置の製造方法。 ５、特許請求の範囲第１項記載の方法において、前記保
護膜がＰＳＧ（Ｐｈｏｓｐｈｏｓｉｌｉｃａｔｅｇｌａ
ｓｓ）膜であることを特徴とする半導体装置の製造方法
。 ６、特許請求の範囲第１項記載の方法において、前記保
護膜が多層レジストの中間層と同質の膜からなることを
特徴とする半導体装置の製造方法。 ７、特許請求の範囲第１項記載の方法において、前記保
護膜がｐ−ＴＥＯＳ（ｐｌａｓｍａ−ＴｅｔｒａＥｔｈ
ｏｘｙＯｒｔｈｏＳｉｌｉｃａｔｅ）膜であることを特
徴とする半導体装置の製造方法。 ８、特許請求の範囲第１項に示される方法を用いて製造
されることを特徴とする半導体装置。[Claims] 1. A method of patterning a lower organic film of a multilayer resist by dry etching, which includes the steps of forming a protective film on the base film to be processed, and removing the upper layer or intermediate layer and etching the portion simultaneously. A method for manufacturing a semiconductor device, comprising the step of removing a protective film. 2. A method for manufacturing a semiconductor device according to claim 1, wherein the gas for etching the lower organic film contains at least a halogen-based gas. 3. A method for manufacturing a semiconductor device according to claim 1, wherein the gas for etching the lower organic film is a mixture of at least a halogen gas and an oxygen gas. 4. A method for manufacturing a semiconductor device according to claim 3, wherein the halogen-based gas is chlorine gas. 5. The method according to claim 1, wherein the protective film is made of PSG (Phosphosilicate glass).
ss) A method for manufacturing a semiconductor device, characterized in that it is a film. 6. The method of manufacturing a semiconductor device according to claim 1, wherein the protective film is made of a film having the same quality as an intermediate layer of a multilayer resist. 7. In the method according to claim 1, the protective film is made of p-TEOS (plasma-TetraEth).
1. A method for manufacturing a semiconductor device, characterized in that the film is a oxyOrthoSilicate film. 8. A semiconductor device manufactured using the method set forth in claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27331190A JPH04150026A (en) | 1990-10-15 | 1990-10-15 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27331190A JPH04150026A (en) | 1990-10-15 | 1990-10-15 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04150026A true JPH04150026A (en) | 1992-05-22 |
Family
ID=17526109
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27331190A Pending JPH04150026A (en) | 1990-10-15 | 1990-10-15 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04150026A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5591302A (en) * | 1990-04-12 | 1997-01-07 | Sony Corporation | Process for etching copper containing metallic film and for forming copper containing metallic wiring |
| US6379871B1 (en) | 1998-06-10 | 2002-04-30 | Nec Corporation | Method for fabricating a mask for a LIGA process |
| JP2009152243A (en) * | 2007-12-18 | 2009-07-09 | Toshiba Corp | Manufacturing method for semiconductor device |
-
1990
- 1990-10-15 JP JP27331190A patent/JPH04150026A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5591302A (en) * | 1990-04-12 | 1997-01-07 | Sony Corporation | Process for etching copper containing metallic film and for forming copper containing metallic wiring |
| US6379871B1 (en) | 1998-06-10 | 2002-04-30 | Nec Corporation | Method for fabricating a mask for a LIGA process |
| JP2009152243A (en) * | 2007-12-18 | 2009-07-09 | Toshiba Corp | Manufacturing method for semiconductor device |
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