JPH04146684A - Circuit board and manufacture thereof - Google Patents
Circuit board and manufacture thereofInfo
- Publication number
- JPH04146684A JPH04146684A JP27081490A JP27081490A JPH04146684A JP H04146684 A JPH04146684 A JP H04146684A JP 27081490 A JP27081490 A JP 27081490A JP 27081490 A JP27081490 A JP 27081490A JP H04146684 A JPH04146684 A JP H04146684A
- Authority
- JP
- Japan
- Prior art keywords
- resin film
- circuit board
- wiring
- resin
- optical waveguide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000011347 resin Substances 0.000 claims abstract description 35
- 229920005989 resin Polymers 0.000 claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 18
- 230000003287 optical effect Effects 0.000 claims abstract description 16
- 239000004020 conductor Substances 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 12
- 230000001678 irradiating effect Effects 0.000 claims 1
- 238000004140 cleaning Methods 0.000 abstract description 2
- 238000000280 densification Methods 0.000 abstract 1
- 238000000059 patterning Methods 0.000 description 3
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000000859 sublimation Methods 0.000 description 1
- 230000008022 sublimation Effects 0.000 description 1
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 239000013585 weight reducing agent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
Landscapes
- Manufacturing Of Printed Wiring (AREA)
- Optical Integrated Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、微細な電気回路または光回路を有する回路基
板およびその作製方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a circuit board having a minute electrical circuit or optical circuit, and a method for manufacturing the same.
従来の技術
近年、家庭用電気製品において装置の小型軽量化の要求
が増大するにつれて、回路形成分野においても回路の小
型高密度化が要求され、さらなる回路基板のファインパ
ターン化が進んでいる。BACKGROUND OF THE INVENTION In recent years, as the demand for smaller and lighter devices in household electric appliances has increased, there has also been a demand for smaller and more dense circuits in the field of circuit formation, and circuit boards are becoming increasingly finely patterned.
従来の回路形成プロセスとしては、レジストヲ使用した
エツチング法以外に、絶縁性基板上にマスクスクリーン
を配置し、導電ペースト材料をスキージで印刷しながら
基板上にスクリーンのパターンに対応した導電パターン
を形成するスクリーン印刷法、または導電材料を基板上
にノズルを用いてパターンニングする直接描画法などに
よりファインパターンを形成する方法などがある。In addition to the etching method using resist, the conventional circuit forming process involves placing a mask screen on an insulating substrate, and printing conductive paste material with a squeegee to form a conductive pattern on the substrate that corresponds to the screen pattern. There are methods of forming a fine pattern by a screen printing method, a direct writing method in which a conductive material is patterned on a substrate using a nozzle, and the like.
発明が解決しようとする課題
しかしながら上記従来のような回路基板の作製方法では
、導電パターンのライン幅として２００μｍ程度が限界
であシ、また導体部の厚みが薄いため配線部分の電気抵
抗がファイン化にょシ増大してしまうという課題があっ
た。Problems to be Solved by the Invention However, in the conventional circuit board manufacturing method described above, the line width of the conductive pattern is limited to about 200 μm, and since the conductor part is thin, the electrical resistance of the wiring part is fine. There was a problem with the increase in size.
本発明は上記の課題を解決するものであり、１００μｍ
以下のファインパターンでかつ配線部分の電気抵抗また
は光導波路の光損失を低減することが可能な回路基板お
よびその作製方法を提供することを目的とする。The present invention solves the above problems, and
It is an object of the present invention to provide a circuit board that has the following fine pattern and can reduce the electrical resistance of the wiring portion or the optical loss of the optical waveguide, and a method for manufacturing the same.
課題を解決するための手段
本発明は上記目的を達成するために、絶縁性基板の上面
の配線部以外の部分に樹脂膜を形成し、その樹脂膜によ
り囲まれた凹部に導電材または光導波材を充填したもの
である。Means for Solving the Problems In order to achieve the above object, the present invention forms a resin film on the upper surface of an insulating substrate other than the wiring part, and injects a conductive material or an optical waveguide into the recess surrounded by the resin film. It is filled with material.
作 用
したがって本発明によれば、絶縁性基板に感光性樹脂材
料を塗布し、紫外線またはレーザ光によりパターンニン
グして凹部を形成し、その凹部に導電材または光導波材
を設けているため、ファインパターンを形成することが
でき、さらに塗布する感光性樹脂の厚さに対応した厚み
を有する配線部を得ることができるので、パターンの電
気抵抗または光損失を低減できる。Therefore, according to the present invention, a photosensitive resin material is coated on an insulating substrate and patterned with ultraviolet rays or laser light to form a recess, and a conductive material or an optical waveguide material is provided in the recess. Since a fine pattern can be formed and a wiring portion having a thickness corresponding to the thickness of the applied photosensitive resin can be obtained, the electrical resistance or optical loss of the pattern can be reduced.
実施例 以下、本発明の一実施例を図面にもとづいて説明する。Example Hereinafter, one embodiment of the present invention will be described based on the drawings.
第１図（、）〜（ｆ）は本発明の一実施例における回路
基板の作製方法を示す工程の概略断面図である。FIGS. 1(a) to 1(f) are schematic cross-sectional views of steps showing a method for manufacturing a circuit board in an embodiment of the present invention.
第１図体）において、１は絶縁性基板、２は感光性樹脂
であシ、基板１の表面に１０から１００μｍ程度の膜厚
で塗布している。基板１の材料としては、アルミナ等の
セラミック基板やそのグリーンシートまたは樹脂基板な
どが使用できる。配線パターン部の抵抗値の制御はこの
工程において感光性樹脂２の膜厚を変化させることによ
って対応でき、従来の回路基板が有する電気抵抗の１０
分の１程度にまで低減できる。In Fig. 1), 1 is an insulating substrate, and 2 is a photosensitive resin, which is coated on the surface of the substrate 1 to a thickness of about 10 to 100 μm. As a material for the substrate 1, a ceramic substrate such as alumina, a green sheet thereof, a resin substrate, etc. can be used. The resistance value of the wiring pattern portion can be controlled by changing the film thickness of the photosensitive resin 2 in this step, and the resistance value of the wiring pattern portion can be controlled by changing the film thickness of the photosensitive resin 2.
It can be reduced to about 1/2.
第１図中）はマスク３によってパターンニングを行う工
程を示す図であシ、後述する紫外線（ＵＶ光）による露
光により行った。マスク３には所望のパターンが描かれ
ておシ、感光性樹脂２の近傍に配置されている。本実施
例ではパターン幅３０μｍ程度までのファインパターン
のマスク３が使用可能である。４は水銀灯を光源とする
ＵＶ照射装置であシ、基板１の面でのＵＶ照度は１０ｏ
。1) is a diagram showing a process of patterning using a mask 3, which was carried out by exposure to ultraviolet light (UV light), which will be described later. A desired pattern is drawn on the mask 3 and placed near the photosensitive resin 2. In this embodiment, a fine pattern mask 3 having a pattern width of up to about 30 μm can be used. 4 is a UV irradiation device using a mercury lamp as a light source, and the UV illuminance on the surface of the substrate 1 is 10o.
.
ｍＷ／ｄ程度の平行光が得られるシステムになっている
。２ａはマスク３を通過したＵＶ光により感光性樹脂２
が光硬化した樹脂膜であり、洗浄によって未露光の感光
性樹脂２を除去したあと基板１上に残留するため、第１
図（０）に示すような凹部６が基板１上に形成される。The system is capable of producing parallel light of approximately mW/d. 2a is a photosensitive resin 2 that is exposed to UV light that has passed through a mask 3.
is a photocured resin film that remains on the substrate 1 after the unexposed photosensitive resin 2 is removed by cleaning.
A recess 6 as shown in Figure (0) is formed on the substrate 1.
このパターンニング工程のプロセスとして、レーザ光に
よる描画方式を用いることもできる。この場合はマスク
３を必要としないためフレキシブルな生産が可能となる
。As a process for this patterning step, a drawing method using laser light can also be used. In this case, since the mask 3 is not required, flexible production is possible.
次に第１図（ｄ）に示すように凹部５に導電材６を充填
する。その厚みは硬化した樹脂膜２ａの厚みにまで厚く
形成できるため、ファインピッチであシながら電気抵抗
の低減された配線部を作製することが可能と々る。導電
材６として銀−パラジウム等のペースト材料、めっき法
による析出金属または蒸着などにより物理的に堆積させ
た導電材料等を使用することができる。また導電材６の
代シに石英等の光学特性をもつ光導波材（有機材料また
は無機材料）を形成することで先導波路の作製も可能と
なるので、光電気回路としての作製プロセスとして応用
することもできる。Next, as shown in FIG. 1(d), the recess 5 is filled with a conductive material 6. Since the thickness can be formed to be as thick as the thickness of the cured resin film 2a, it is possible to produce a wiring portion with a reduced electrical resistance while maintaining a fine pitch. As the conductive material 6, a paste material such as silver-palladium, a metal deposited by a plating method, a conductive material physically deposited by vapor deposition, etc. can be used. Furthermore, by forming an optical waveguide material (organic or inorganic material) with optical properties such as quartz in place of the conductive material 6, it is possible to create a guiding waveguide, so it can be applied as a manufacturing process for opto-electrical circuits. You can also do that.
さらに第１図（ｅ）に示すように樹脂膜２ａを除去する
と、通常の基板同様に導電材６による配線パターンのみ
が形成された構造を有する回路基板が得られる。導電材
６として銀−パラジウム等のペースト材料を使用した場
合、ペーストの焼成工程で樹脂膜２ａを昇華させること
で除去することもできる。Further, as shown in FIG. 1(e), when the resin film 2a is removed, a circuit board having a structure in which only the wiring pattern of the conductive material 6 is formed, like a normal board, is obtained. When a paste material such as silver-palladium is used as the conductive material 6, the resin film 2a can also be removed by sublimation in the paste baking process.
また第１図（ｆ）に示すように樹脂膜２ａを残したまま
基板を多層化させ、多層回路基板をつくることもできる
。多層回路基板を作製するには、各層の基板１の平坦化
が特性に大きく影響するが、本実施例のプロセスの場合
、平坦化させた基板１を使用しているので多層化には有
利な構造と力る。Furthermore, as shown in FIG. 1(f), a multilayer circuit board can be produced by making the board multilayered while leaving the resin film 2a. In manufacturing a multilayer circuit board, flattening the substrate 1 of each layer greatly affects the characteristics, but in the case of the process of this example, since a flattened substrate 1 is used, it is advantageous for multilayering. Structure and strength.
このように上記実施例によれば、感光性樹脂２を基板１
に塗布し紫外線またはレーザ光によってパターンニング
し、未露光の感光性樹脂２を除去して凹部６を形成し、
その凹部６に導電材ｅを充填しているため、ファインパ
ターンを形成できるとともにパターンの電気抵抗を低減
することができる。In this way, according to the above embodiment, the photosensitive resin 2 is placed on the substrate 1.
and patterned with ultraviolet rays or laser light, removing the unexposed photosensitive resin 2 to form a recess 6,
Since the recess 6 is filled with the conductive material e, a fine pattern can be formed and the electrical resistance of the pattern can be reduced.
発明の効果
本発明は上記実施例より明らかなように、絶縁性基板の
上面に凹部を設け、その凹部に導電材または光導波材を
充填しているためパターン幅が１００μｍ以下でかつ配
線の電気抵抗または光導波路の光損失を下げることが可
能であるので、電気製品の小型軽量化および回路の小型
高密度化（ファインパターン化、多層化）に対応した回
路基、板を得ることができる。Effects of the Invention As is clear from the above embodiments, the present invention provides a recess on the upper surface of an insulating substrate and fills the recess with a conductive material or an optical waveguide material. Since it is possible to reduce the optical loss of the resistor or optical waveguide, it is possible to obtain circuit boards and boards that are compatible with the miniaturization and weight reduction of electrical products and the miniaturization and high density of circuits (fine patterning and multilayering).
第１図（−）〜（１）は本発明の一実施例における回路
基板の作製方法を説明す石ための概略工程断面図である
。
１・・・・・・絶縁性基板、２・・・・・・感光性樹脂
、２ａ・・・・・・樹脂膜、５・・・・・・凹部、６・
・・・・・導電材または光導波材。
代理人の氏名 弁理士 小鍜治 明 ほか２名躊電材
盪たは尤尋塘Ｕ
（ａンFIGS. 1(-) to 1(1) are schematic process cross-sectional views illustrating a method for manufacturing a circuit board in an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Photosensitive resin, 2a... Resin film, 5... Concave portion, 6...
... Conductive material or optical waveguide material. Name of agent: Patent attorney Akira Kobaji and two others
Claims (2)
形成し、その樹脂膜により囲まれた凹部に導電材または
光導波材を充填した回路基板。(1) A circuit board in which a resin film is formed on the upper surface of an insulating substrate other than the wiring parts, and a concave portion surrounded by the resin film is filled with a conductive material or an optical waveguide material.
脂を塗布し、紫外線またはレーザ光をマスクを介して照
射することによって前記感光性樹脂をパターンニングし
た後、洗浄により前記感光性樹脂の未露光部分を除去し
て凹部を形成し、その凹部に導電材または光導波材を充
填する回路基板の作製方法。(2) Apply a photosensitive resin to the upper surface of the insulating substrate other than the wiring section, pattern the photosensitive resin by irradiating it with ultraviolet rays or laser light through a mask, and then wash the photosensitive resin. A method for manufacturing a circuit board, in which an unexposed portion of a resin is removed to form a recess, and the recess is filled with a conductive material or an optical waveguide material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27081490A JPH04146684A (en) | 1990-10-08 | 1990-10-08 | Circuit board and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27081490A JPH04146684A (en) | 1990-10-08 | 1990-10-08 | Circuit board and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04146684A true JPH04146684A (en) | 1992-05-20 |
Family
ID=17491393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27081490A Pending JPH04146684A (en) | 1990-10-08 | 1990-10-08 | Circuit board and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04146684A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07221412A (en) * | 1994-01-31 | 1995-08-18 | Nec Toyama Ltd | Printed circuit board and manufacture thereof |
| JPH0983096A (en) * | 1995-06-26 | 1997-03-28 | Samsung Aerospace Ind Ltd | Circuit base board and its preparation |
| JP2009055071A (en) * | 2008-12-10 | 2009-03-12 | Panasonic Corp | Circuit board and its manufacturing method |
| JP2010054617A (en) * | 2008-08-26 | 2010-03-11 | Nippon Mektron Ltd | Photoelectric composite flexible wiring board and manufacturing method of same |
| JP2015228526A (en) * | 2015-09-14 | 2015-12-17 | パナソニックＩｐマネジメント株式会社 | Solar cell module |
| US9972728B2 (en) | 2011-09-29 | 2018-05-15 | Panasonic Intellectual Property Management Co., Ltd. | Solar cell, solar cell module, and method for manufacturing solar cell |
-
1990
- 1990-10-08 JP JP27081490A patent/JPH04146684A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07221412A (en) * | 1994-01-31 | 1995-08-18 | Nec Toyama Ltd | Printed circuit board and manufacture thereof |
| JPH0983096A (en) * | 1995-06-26 | 1997-03-28 | Samsung Aerospace Ind Ltd | Circuit base board and its preparation |
| JP2010054617A (en) * | 2008-08-26 | 2010-03-11 | Nippon Mektron Ltd | Photoelectric composite flexible wiring board and manufacturing method of same |
| JP2009055071A (en) * | 2008-12-10 | 2009-03-12 | Panasonic Corp | Circuit board and its manufacturing method |
| JP4728384B2 (en) * | 2008-12-10 | 2011-07-20 | パナソニック株式会社 | Circuit board manufacturing method |
| US9972728B2 (en) | 2011-09-29 | 2018-05-15 | Panasonic Intellectual Property Management Co., Ltd. | Solar cell, solar cell module, and method for manufacturing solar cell |
| JP2015228526A (en) * | 2015-09-14 | 2015-12-17 | パナソニックＩｐマネジメント株式会社 | Solar cell module |
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