JPH04146620A - Method of flattening semiconductor substrate - Google Patents
Method of flattening semiconductor substrateInfo
- Publication number
- JPH04146620A JPH04146620A JP26932690A JP26932690A JPH04146620A JP H04146620 A JPH04146620 A JP H04146620A JP 26932690 A JP26932690 A JP 26932690A JP 26932690 A JP26932690 A JP 26932690A JP H04146620 A JPH04146620 A JP H04146620A
- Authority
- JP
- Japan
- Prior art keywords
- gas
- semiconductor substrate
- wafer
- substrate
- mixed gas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 32
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 238000000034 method Methods 0.000 title claims abstract description 20
- 238000010438 heat treatment Methods 0.000 claims abstract description 8
- 239000007789 gas Substances 0.000 abstract description 41
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052753 mercury Inorganic materials 0.000 abstract description 3
- 239000010453 quartz Substances 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 3
- 229910001220 stainless steel Inorganic materials 0.000 abstract description 2
- 239000010935 stainless steel Substances 0.000 abstract description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 7
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- 238000000347 anisotropic wet etching Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔概 要〕
半導体基板の平坦化法に係り、特にガスを用いた乾式法
による半導体基板の平坦化法に関し、乾式法によって半
導体基板表面を平坦化することを目的とし、
ＨＦガス、Ｈ２希釈のＦ２ガス、あるいはそれらを含む
混合ガス中に半導体基板を暴露することを構成とする。[Detailed Description of the Invention] [Summary] This invention relates to a method for planarizing a semiconductor substrate, particularly a method for planarizing a semiconductor substrate by a dry method using gas, and aims to planarize the surface of a semiconductor substrate by a dry method. , the semiconductor substrate is exposed to HF gas, H2 diluted F2 gas, or a mixed gas containing these.
本発明は半導体基板の平坦化法に係り、特にガスを用い
た乾式法による半導体基板の平坦化法に関するものであ
る。The present invention relates to a method for planarizing a semiconductor substrate, and more particularly to a method for planarizing a semiconductor substrate by a dry method using gas.
従来、シリコン（Ｓｉ）等の半導体基板表面を平坦化す
る方法として、研磨材等を使用する機械的研磨法が知ら
れている。またＲＣＡ洗浄やアルカリ溶液を用いたウェ
ット（湿式）異方性エツチングもある種の平坦化法に属
する。Conventionally, a mechanical polishing method using an abrasive or the like has been known as a method for planarizing the surface of a semiconductor substrate such as silicon (Si). RCA cleaning and wet anisotropic etching using an alkaline solution also belong to certain types of planarization methods.
上記の表面研磨により半導体基板表面を平坦化する場合
原子レベルでの超微細なコントロールによる平坦化は作
業上非常に困難でしかも多大な時間を要する。また溶液
を用いたいわゆる湿式法による平坦化法では、今後、ま
すます微細化されるＬＳＩ製造において、基板表面に形
成した微細幅のトレンチ（溝）底面の平坦化が難かしく
、また平坦化後に水洗を要しコストアップを招いたり、
また平坦化されるべき結晶面の限定を要する等の問題が
あった。現在そして将来のＬＳＩ製造において、ＲＩＥ
等のエツチング後に生じる基板表面の荒れはその後のプ
ロセスに悪い影響を与えデバイス特件が直接響いてくる
。When flattening the surface of a semiconductor substrate by the above-mentioned surface polishing, flattening with ultrafine control at the atomic level is extremely difficult and takes a lot of time. In addition, with the so-called wet planarization method using a solution, it is difficult to planarize the bottom surface of a microscopic trench (groove) formed on the substrate surface in the future, in the future, when manufacturing LSIs, which will become increasingly finer. Requires washing with water, which increases costs,
Further, there are problems such as the need to limit the crystal plane to be flattened. In current and future LSI manufacturing, RIE
Roughness on the substrate surface that occurs after etching, etc., has a negative impact on subsequent processes and directly affects device characteristics.
そこで、本発明は、乾式法によって半導体基板表面を平
坦化することを目的とする。Therefore, an object of the present invention is to flatten the surface of a semiconductor substrate by a dry method.
〔３課題を解決するための手段〕
上記課題は、本発明によればＨＦガス、Ｈ２希釈のＦ２
ガス、あるいはそれらを含む混合ガス中に半導体基板を
曝露することを特徴とする半導体基板の平坦化法によっ
て解決される。[Means for solving the three problems] According to the present invention, the above problems can be solved by using HF gas, H2 diluted F2
This problem is solved by a method for planarizing a semiconductor substrate, which is characterized by exposing the semiconductor substrate to a gas or a mixed gas containing these gases.
すなわち本発明では平坦化しようとするシリコン等の半
導体基板をＨＦ （弗化水素）ガスあるいはＨＦを含有
するガス中に、あるいはＨ２希釈のＦ２（弗素）ガスあ
るいはそれらを含有するガス中に単に曝せばよい。なお
本発明では上記の如く半導体基板を上記のガス中に暴露
するだけでもよいが該ガスへの紫外線を照射するか、基
板と該ガスを加熱することが基板表面とガスとの反応の
活性化（平坦化）に好ましい。That is, in the present invention, a semiconductor substrate such as silicon to be planarized is simply exposed to HF (hydrogen fluoride) gas or a gas containing HF, or to F2 (fluorine) gas diluted with H2 or a gas containing these. Bye. In the present invention, it is sufficient to simply expose the semiconductor substrate to the gas as described above, but irradiating the gas with ultraviolet rays or heating the substrate and the gas activates the reaction between the substrate surface and the gas. (flattening).
本発明によれば半導体基板が曝されるＨＦ、Ｈ２希釈の
Ｆ２ガスまたはそれらの励起分子、原子が該半導体基板
の凸部分を選択的によりエツチングするように作用する
ために該基板表面が平坦化される。According to the present invention, HF, H2 diluted F2 gas, or their excited molecules and atoms, to which the semiconductor substrate is exposed, act to selectively etch the convex portions of the semiconductor substrate, thereby flattening the substrate surface. be done.
以下本発明の実施例を図面を参照して説明する。 Embodiments of the present invention will be described below with reference to the drawings.
第１図は本発明を実施するための装置例である。FIG. 1 is an example of an apparatus for carrying out the present invention.
装置構成は真空槽（処理槽）１、Ｆ２ガス、Ｆ２ガス、
Ａｒガス等のガス導入系２、排気系（真空ポンプ）３、
基板保持加熱機構４、紫外線照射系５から成る。The equipment configuration is 1 vacuum tank (processing tank), F2 gas, F2 gas,
Gas introduction system such as Ar gas 2, exhaust system (vacuum pump) 3,
It consists of a substrate holding and heating mechanism 4 and an ultraviolet irradiation system 5.
まず半導体基板としてＳｉ ウェハ１０をステンレスか
らなる真空槽１内の基板保持加熱機構上に配設する。特
にその加熱機構は保持機構裏面にヒータ１１として設け
られている。First, a Si wafer 10 as a semiconductor substrate is placed on a substrate holding and heating mechanism in a vacuum chamber 1 made of stainless steel. In particular, the heating mechanism is provided as a heater 11 on the back surface of the holding mechanism.
次にＦ２ガス１重量％、Ｆ２ガス５０重量％、Ａｒガス
４９重量％濃度の混合ガスを、ガス導入系２から真空槽
１内へ総流量１β／分、圧力は常圧で導入し、同時に低
圧水銀ランプ１２を用いて石英窓１３を介して上記混合
ガスとＳ１ウエハ１０を１時間紫外線照射した。Next, a mixed gas with a concentration of 1% by weight of F2 gas, 50% by weight of F2 gas, and 49% by weight of Ar gas was introduced from the gas introduction system 2 into the vacuum chamber 1 at a total flow rate of 1β/min and at normal pressure. The mixed gas and the S1 wafer 10 were irradiated with ultraviolet rays for one hour through a quartz window 13 using a low-pressure mercury lamp 12 .
その結果Ｓｉ ウェハ表面の垂直方向の粗さがＲＭ Ｓ
（Ｒｏｏｔ Ｍｅａｎ ５ｑｕａｒｅ）でＱ、３ｎｍ
から０．６ｎｍに平坦化することができた。As a result, the vertical roughness of the Si wafer surface is RMS
(Root Mean 5 square) Q, 3 nm
The thickness could be flattened from 0.6 nm to 0.6 nm.
次に第２の実施例として、ＨＦガス５重量％で他は窒素
ガス（Ｎ２）ガス希釈の混合ガスを真空槽１内へ導入し
、ヒータ１１でＳｉ ウェハ１０を約５００℃の温度に
保持し、紫外線照射を施さず、それ以外は上記実施例と
同様にして平坦化を行なった。Next, as a second example, a mixed gas of 5% by weight of HF gas and diluted nitrogen gas (N2) is introduced into the vacuum chamber 1, and the Si wafer 10 is maintained at a temperature of about 500°C by the heater 11. However, planarization was performed in the same manner as in the above example except that ultraviolet irradiation was not performed.
その結果Ｓｉ ウェハ表面の粗さがＲＭＳで０．８ｎｍ
からＯ１５ｎｍに平坦化することができた。As a result, the roughness of the Si wafer surface was 0.8 nm in RMS.
It was possible to flatten the thickness from 0 to 15 nm.
以上説明した様に本発明によれば、単に半導体基板を所
定のガス中に曝露するだけで該基板の表面を平坦化する
ことができる。本方法では従来問題であったトレンチ底
部の平坦化を可能にし、また工程短縮等のメリットも得
られる。As explained above, according to the present invention, the surface of a semiconductor substrate can be flattened simply by exposing the semiconductor substrate to a predetermined gas. This method makes it possible to flatten the bottom of the trench, which has been a problem in the past, and also has the advantage of shortening the process.
第１図は本発明を実施するための装置例の模式断面図で
ある。
１・・・真空槽、 ２・・・ガス導入系、３
・・・排気系、 ４・・・基板保持加熱機構
、５・・・紫外線照射系、 １０・・・Ｓｉ ウェハ
１１・・・ヒータ、 １２・・・水銀ランプ
、１３・・・石英窓。FIG. 1 is a schematic sectional view of an example of an apparatus for carrying out the present invention. 1... Vacuum chamber, 2... Gas introduction system, 3
... Exhaust system, 4... Substrate holding and heating mechanism, 5... Ultraviolet irradiation system, 10... Si wafer 11... Heater, 12... Mercury lamp, 13... Quartz window.
Claims (1)
らを含む混合ガス中に半導体基板を暴露することを特徴
とする半導体基板の平坦化法。 ２、前記暴露を、前記ガスへの紫外光の照射あるいは加
熱と共に行うことを特徴とする請求項１記載の方法。[Claims] 1. A method for planarizing a semiconductor substrate, which comprises exposing the semiconductor substrate to HF gas, F_2 gas diluted with H_2, or a mixed gas containing these. 2. The method according to claim 1, wherein the exposure is performed together with irradiation of the gas with ultraviolet light or heating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2269326A JP3023854B2 (en) | 1990-10-09 | 1990-10-09 | Method for planarizing silicon semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2269326A JP3023854B2 (en) | 1990-10-09 | 1990-10-09 | Method for planarizing silicon semiconductor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04146620A true JPH04146620A (en) | 1992-05-20 |
| JP3023854B2 JP3023854B2 (en) | 2000-03-21 |
Family
ID=17470800
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2269326A Expired - Lifetime JP3023854B2 (en) | 1990-10-09 | 1990-10-09 | Method for planarizing silicon semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3023854B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10233380A (en) * | 1996-12-16 | 1998-09-02 | Shin Etsu Handotai Co Ltd | Surface treatment of single silicon crystal and formation of single silicon crystalline thin film |
| KR100841669B1 (en) * | 2006-05-04 | 2008-06-27 | 실트로닉 아게 | Method for producing a polished semiconductor |
| JP2008300617A (en) * | 2007-05-31 | 2008-12-11 | Ihi Corp | Laser annealing method and laser annealing device |
| US7871677B2 (en) * | 2002-07-10 | 2011-01-18 | Yuji Takakuwa | Surface treating method for substrate |
-
1990
- 1990-10-09 JP JP2269326A patent/JP3023854B2/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10233380A (en) * | 1996-12-16 | 1998-09-02 | Shin Etsu Handotai Co Ltd | Surface treatment of single silicon crystal and formation of single silicon crystalline thin film |
| US7871677B2 (en) * | 2002-07-10 | 2011-01-18 | Yuji Takakuwa | Surface treating method for substrate |
| KR100841669B1 (en) * | 2006-05-04 | 2008-06-27 | 실트로닉 아게 | Method for producing a polished semiconductor |
| JP2008300617A (en) * | 2007-05-31 | 2008-12-11 | Ihi Corp | Laser annealing method and laser annealing device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3023854B2 (en) | 2000-03-21 |
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