JPH0395829A - Manufacture of micro cold cathode - Google Patents
Manufacture of micro cold cathodeInfo
- Publication number
- JPH0395829A JPH0395829A JP1233545A JP23354589A JPH0395829A JP H0395829 A JPH0395829 A JP H0395829A JP 1233545 A JP1233545 A JP 1233545A JP 23354589 A JP23354589 A JP 23354589A JP H0395829 A JPH0395829 A JP H0395829A
- Authority
- JP
- Japan
- Prior art keywords
- cold cathode
- cone
- film
- forming
- silicon substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 35
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 26
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 26
- 239000010703 silicon Substances 0.000 claims abstract description 26
- 238000000034 method Methods 0.000 claims abstract description 24
- 238000005530 etching Methods 0.000 claims abstract description 15
- 230000001590 oxidative effect Effects 0.000 claims abstract description 4
- 238000001259 photo etching Methods 0.000 claims abstract description 4
- 230000003647 oxidation Effects 0.000 abstract description 8
- 238000007254 oxidation reaction Methods 0.000 abstract description 8
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 229910052681 coesite Inorganic materials 0.000 description 4
- 229910052906 cristobalite Inorganic materials 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 229910052682 stishovite Inorganic materials 0.000 description 4
- 229910052905 tridymite Inorganic materials 0.000 description 4
- 230000005855 radiation Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 239000007864 aqueous solution Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000992 sputter etching Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Cold Cathode And The Manufacture (AREA)
Abstract
Description
【発明の詳細な説明】
〔｝既要〕
微小冷陰極の製造方法に関し、
真空マイクロデバイス用の微小冷陰極を高梢度で再現性
よ《、かつ、簡易に製造することを目的とし、
シリコン基板上に絶縁膜を形成する工程と、前記絶縁膜
をホトエッチングして、冷陰極コーンが形成される部分
に所要の大きさのマスクパターンを形成する工程と、前
記マスクパターンを設けた前記シリコン基板を熱酸化す
る工程と、前記熱酸化膜上にゲート電極膜を形成する工
程と、前記冷陰極コーンの上方の前記ゲート電極膜にゲ
ート孔を形成する工程と、前記ゲート孔を通して前記熱
酸化膜の一部をエッチング除去して前記冷陰極コーンを
露呈させる工程とを少なくとも含むように微小冷陰極の
製造方法を構戒する。[Detailed Description of the Invention] [Already Required] This invention relates to a method for manufacturing a microcold cathode, and aims to easily produce a microcold cathode for vacuum microdevices with a high degree of reproducibility, and which uses silicon. a step of forming an insulating film on the substrate; a step of photoetching the insulating film to form a mask pattern of a required size in a portion where a cold cathode cone is to be formed; and a step of forming the silicon on which the mask pattern is provided. a step of thermally oxidizing the substrate; a step of forming a gate electrode film on the thermal oxide film; a step of forming a gate hole in the gate electrode film above the cold cathode cone; The method for manufacturing a minute cold cathode is designed to include at least the step of etching away a portion of the film to expose the cold cathode cone.
〔産業上の利用分野） 本発明は微小冷陰極の製造方法の改良に関する。[Industrial application field] TECHNICAL FIELD The present invention relates to improvements in the manufacturing method of microcold cathodes.
微小冷陰極は極微小のマイクロ波真空管や微小な表示素
子など，いわゆる、真空マイクロデバイス用の放射電極
として欠くことのできない構戒要素である。A microcold cathode is an indispensable structural element as a radiation electrode for so-called vacuum microdevices such as microscopic microwave vacuum tubes and microscopic display elements.
真空マイクロデバイスは通常の半導体素子と異なり、微
小な真空空間を電子が移動するのを利用するので、電子
の移動度が大きく、高速・高温動作が可能で，しかも、
放射線損傷を受けにくいなどの特徴があり、今後マイク
ロ波素子，超高速演算素子，耐放射線用デハイス，耐高
温環境用デバイス，微小表示素子などへの応用が期待さ
れている。Unlike ordinary semiconductor devices, vacuum microdevices utilize the movement of electrons in a tiny vacuum space, so they have high electron mobility and are capable of high-speed, high-temperature operation.
It has characteristics such as being resistant to radiation damage, and is expected to be applied in the future to microwave devices, ultrahigh-speed arithmetic devices, radiation-resistant devices, devices for high-temperature environments, and microscopic display devices.
これらの真空マイクロデバイスの殆どは現在開発段階に
あり、とくに、その心臓部をなす微小冷陰極を高精度で
再現性よく、かつ、簡易に製造する技術の開発が求めら
れている。Most of these vacuum microdevices are currently in the development stage, and there is a particular need for the development of a technology for easily manufacturing the microcold cathode, which forms the heart of the device, with high precision and good reproducibility.
真空マイクロデバイス用の微小冷陰極の製造方法として
は幾つかの方法が提案されている。Several methods have been proposed for producing minute cold cathodes for vacuum microdevices.
たとえば、アルミナ基板上にＭｏ陰極膜とアルミナ絶縁
膜層とＭＯ陽極膜層を順次被着し、Ｍｏ陽極膜層の一部
にエッチング孔を形威したのち、そのエッチング孔を通
してアルくナ絶縁膜層を選択エッチングして空孔を形成
する。次いで、前記Ｍｏ陽極膜層のエッチング孔の上方
からＭｏを，また、斜め方向からアルミナを基板を回転
しながら蒸着またはスバッタして、前記空孔の底部にＭ
ｏの冷陰極コーンを形威している（Ｊ．ｏｆ Ａｐｐｌ
．Ｐｈｙｓ．，ｖｏｌ．３９， ｐ３５０４．１９６８
）。For example, after sequentially depositing a Mo cathode film, an alumina insulating film layer, and an MO anode film layer on an alumina substrate, and forming an etching hole in a part of the Mo anode film layer, the alumina insulating film is formed through the etching hole. The layer is selectively etched to form holes. Next, Mo is vapor-deposited or sputtered from above the etched hole of the Mo anode film layer, and alumina is vapor-deposited or sputtered from an oblique direction while rotating the substrate to form M at the bottom of the hole.
The cold cathode cone of J. of Appl.
．． Phys. , vol. 39, p3504.1968
).
あるいは、シリコン基板の等方性エッチングによりシリ
コンの冷陰極コーンを形成する方法も提案されている（
Ｍａ ｔ．Ｒｅｓ．Ｓｏｃ．Ｓ）＋ｍｐ． ， ｖｏｌ
．７６， ｐ２５． １９８７）．一例として後者につ
いて以下に主な工程を追って簡単に説明する。Alternatively, a method has been proposed in which a silicon cold cathode cone is formed by isotropic etching of a silicon substrate (
Mat. Res. Soc. S)+mp. , vol.
．． 76, p25. 1987). As an example, the latter will be briefly explained below following the main steps.
第３図は従来の微小冷陰極の製造方法の例を示す図であ
る。FIG. 3 is a diagram illustrating an example of a conventional method for manufacturing a minute cold cathode.
工程（１）：シリコン基板ｌの上に、一様な厚さのＳｉ
ｎ．膜２０を公知の熱酸化法で形成する。Step (1): On the silicon substrate l, a uniform thickness of Si is deposited.
n. The film 20 is formed by a known thermal oxidation method.
工程（２）：前記処理済み基板のＳｉｎ２膜２０を、公
知？ホトリソグラフィ法で所定の形状．寸法にエッチン
グしてＳｉｎ２膜マスクパターン２０′を形成する。Step (2): The Sin2 film 20 of the treated substrate is prepared using a known method. Predetermined shape using photolithography method. A Sin2 film mask pattern 20' is formed by etching to the desired dimensions.
工程（３）：前記処理済み基板を，たとえば、ＨＦとＨ
ＮＯ，の混合液の中でシリコンのみを等方性エッチング
を行って、前記ＳｉＯ■膜マスクパターン２０’ の下
にエミックコーン６０を形成する。Step (3): The treated substrate is, for example, HF and H
Only silicon is isotropically etched in a mixed solution of NO, to form an emic cone 60 under the SiO2 film mask pattern 20'.
工程（４）：前記処理済み基板の上方からＳｉｎｇを蒸
着あるいはスパッタして、前記エミッタコーン６０の周
囲に空間が生じるようにＳｉＯｚ膜２００を形成する。Step (4): Sing is evaporated or sputtered from above the treated substrate to form the SiOz film 200 so as to create a space around the emitter cone 60.
工程（５）：前記処理膚み基板の上方からゲート電極膜
４０，たとえば、Ｍｏ膜を公知の方法で一様に被着する
。この時、Ｓｉｎ．膜マスクパターン２０′の側面の少
なくとも一部が露出されているようにする。Step (5): A gate electrode film 40, for example, a Mo film, is uniformly deposited from above the treated skin substrate by a known method. At this time, Sin. At least a portion of the side surface of the film mask pattern 20' is exposed.
工程（６）：前記処理済み基板のＳｉＯ■膜マスクパタ
ーン２０′の全てとＳｉＯ■膜２００の一部が除去され
るように、｝ＩＦを用いて選択エッチングを行い前記エ
ミッタコーン６０を空間に露出させて、シリコン基板上
にシリコンからなる微小冷陰極を形成している。Step (6): Perform selective etching using }IF to remove the emitter cone 60 in space so that all of the SiO2 film mask pattern 20' and part of the SiO2 film 200 on the treated substrate are removed. A microcold cathode made of silicon is formed on the exposed silicon substrate.
しかし、上記の従来例，たとえば、間の垂直蒸着とアル
ミナの斜蒸着を用いる方法は工程が余りにも複雑であり
、また、シリコン基板の等方性エッチングを用いる方法
はエミッタコーン形成の再現性に乏しいなどの問題があ
り、その解決が必要となっていた。However, the above-mentioned conventional methods, for example, the method using vertical evaporation and oblique evaporation of alumina, are too complicated, and the method using isotropic etching of the silicon substrate has poor reproducibility of emitter cone formation. There were problems such as scarcity, which needed to be solved.
（課題を解決するための手段）
上記の課題は、シリコン基板１上に絶縁膜２を形成する
工程と、前記絶縁膜２をホトエッチングして、冷陰極コ
ーン６が形成される部分に所要の大きさのマスクパター
ン２″を形成する工程と、前記マスクパターン２゛を設
けた前記シリコン基板１を熱酸化する工程と、前記熱酸
化膜３上にゲート電極膜４を形成する工程と、前記冷陰
極コーン６の上方の前記ゲート電極膜４にゲート孔５を
形成する工程と、前記ゲート孔５を通して前記熱酸化膜
３の一部をエッチング除去して前記冷陰極コーン６を露
呈させる工程とを少なくとも含むように微小冷陰極の製
造方法を構威することにより解決することができる。(Means for Solving the Problem) The above problem consists of a step of forming an insulating film 2 on a silicon substrate 1, and a process of photo-etching the insulating film 2 to form the required area where the cold cathode cone 6 is to be formed. a step of thermally oxidizing the silicon substrate 1 provided with the mask pattern 2''; a step of forming a gate electrode film 4 on the thermal oxide film 3; a step of forming a gate hole 5 in the gate electrode film 4 above the cold cathode cone 6; and a step of etching away a part of the thermal oxide film 3 through the gate hole 5 to expose the cold cathode cone 6. This problem can be solved by structuring the method for manufacturing a minute cold cathode so that it includes at least the following.
（作用〕
本発明によれば、シリコン基板の上に冷陰極コーン６を
形成するのは熱酸化であり、したがって、製造工程の途
中では、冷陰極コーン６は各種の処理環境に曝されず、
最後にＳｉｎｇ熱酸化膜の選択エッチングにおいて初め
て空間に露呈されるので、冷陰極コーン６は極めて安定
に再現性よく形成することができる。しかも、殆ど半導
体ＩＣの製造においてよく知られた製造プロセスだけを
用いればよいので、製品の品質は安定しており，かつ、
安価に製造することができる。(Function) According to the present invention, the cold cathode cone 6 is formed on the silicon substrate by thermal oxidation, so that the cold cathode cone 6 is not exposed to various processing environments during the manufacturing process.
Finally, the cold cathode cone 6 is exposed to the space for the first time during the selective etching of the Sing thermal oxide film, so the cold cathode cone 6 can be formed extremely stably and with good reproducibility. Moreover, since only well-known manufacturing processes are used in the manufacture of semiconductor ICs, the quality of the product is stable, and
It can be manufactured at low cost.
（実施例）
第１図は本発明実施例の工程を示す図で、工程を追って
以下にその要点を説明する。(Example) FIG. 1 is a diagram showing the steps of an example of the present invention, and the main points thereof will be explained below step by step.
工程（ｌ）：厚さが，たとえば、２００μｍの低抵抗シ
リコン基板ｌの上に、絶縁膜２として，たとえば、厚さ
０．１ μｍのＳｉ３Ｎ４膜をＣＶＤ法で形成する。Step (l): On a low-resistance silicon substrate l having a thickness of, for example, 200 μm, a Si3N4 film having a thickness of, for example, 0.1 μm is formed as the insulating film 2 by the CVD method.
工程（２）：前記処理済み基板のｙＡ縁膜２，すなわち
、Ｓｉ３Ｎ４膜上にレジストマスクを形成したあと、た
とえばイオンエッチング法により、直径が冷陰極コーン
６の高さの２倍，たとえば、２μｍφのＳｉ３Ｎ４膜か
らなる絶縁膜マスクパターン２′を形成する。Step (2): After forming a resist mask on the yA edge film 2, that is, the Si3N4 film, of the treated substrate, the diameter is twice the height of the cold cathode cone 6, for example, 2 μmφ, by, for example, ion etching. An insulating film mask pattern 2' made of a Si3N4 film is formed.
工程（３）：前記処理済み基板を，たとえば、酸素中，
約１０００’Ｃで、マスクのない部分の酸化膜の厚さが
約１μｍになるように熱酸化膜を形成する。Step (3): The treated substrate is, for example, in oxygen,
A thermal oxide film is formed at about 1000'C so that the thickness of the oxide film in the area without the mask is about 1 μm.
この時、マスク２′の下部にも酸化が進行し、図示した
ごとき円錐状のシリコンからなるコーンが再現性よく形
成される。また、シリコンは酸化してｓ ｉＯ ｚ ｌ
Ｉ＊となり体積を増すのでマスク２“は上方を凹にして
彎曲する。At this time, oxidation also progresses under the mask 2', and a conical silicon cone as shown in the figure is formed with good reproducibility. Also, silicon oxidizes to s iO z l
Since the mask becomes I* and increases in volume, the mask 2'' is curved with the upper part concave.
工程（４）：前記処理済み基板のＳｉＪｎ膜からなる絶
縁膜マスクパターン２”を，たとえば、高温のＨｓＰＯ
４水？？Ｉ液中でエッチングして除去する。Step (4): The insulating film mask pattern 2'' made of the SiJn film of the treated substrate is heated to high temperature HsPO, for example.
4 Water? ? Remove by etching in I solution.
工程（５）：前記処理済み基板の上方からゲート電極膜
４，たとえば、厚さｌ００ｎｍのＭｏ膜を電子ビーム蒸
着法で一様に被着する。Step (5): A gate electrode film 4, for example, a Mo film with a thickness of 100 nm, is uniformly deposited from above the treated substrate by electron beam evaporation.
工程（６）：前記処理済み基板のゲート電極膜４の所定
の部分，すなわち、冷陰極コーン６が埋め込まれた部分
の上方のＭｏ膜を、レジストマスクを用いたイオンエッ
チング法でエッチングして、直径約１．５μｍφのゲー
ト孔５を形成する。Step (6): Etching a predetermined portion of the gate electrode film 4 of the processed substrate, that is, the Mo film above the portion where the cold cathode cone 6 is embedded, by an ion etching method using a resist mask, A gate hole 5 having a diameter of about 1.5 μmφ is formed.
工程（７）；前記処理済み基板のゲート孔５を通して、
熱酸化膜３を，たとえば、室温のＨＰ水溶液で選択的に
エッチング除去し、冷陰極コーン６を空間に露呈させて
、シリコン基板上に一体的に突出したシリコンからなる
微小冷陰極を形成する。Step (7); Through the gate hole 5 of the treated substrate,
The thermal oxide film 3 is selectively etched away using, for example, an HP aqueous solution at room temperature, and the cold cathode cone 6 is exposed to the space, thereby forming a minute cold cathode made of silicon that integrally protrudes on the silicon substrate.
上記の実施例方法により底面の直径が約１μｍ５高さが
約ｌμｍで先端の曲率半径が０．１ μｍ以下の微小冷
陰極が再現性よく安定に形成することができた。By the method of the above example, a minute cold cathode having a bottom diameter of about 1 μm, a height of about 1 μm, and a tip radius of curvature of 0.1 μm or less could be stably formed with good reproducibility.
第２図は本発明の他の実施例の工程を示す図である。FIG. 2 is a diagram showing the steps of another embodiment of the present invention.
なお、前記実施例材の図面で説明したものと同等の部分
については同一符号を付し、かつ、同等の部分について
の説明は省略する。Note that the same reference numerals are given to the same parts as those explained in the drawings of the example material, and the description of the same parts is omitted.
本実施例では絶縁膜２として、厚さ０．５μｍのＳｉＪ
４膜をＣＶＤ法で形成する。すなわち、前記実施例の場
合の５倍の厚さにしてある。In this example, the insulating film 2 is made of SiJ with a thickness of 0.5 μm.
4 films are formed by CVD method. That is, the thickness is five times that of the previous embodiment.
工程（３）まではＳｉＪ４膜の厚さが異なるだけで他は
同一であるが、ＳｉＪ＜膜が厚いので前記実施例の場合
ほどマスク２′の彎曲は生じない。Up to step (3), everything else is the same except for the thickness of the SiJ4 film, but since the SiJ film is thicker, the mask 2' does not curve as much as in the case of the previous embodiment.
本実施例の工程（４）では前記絶縁膜マスクパターン２
′を除去せずに、直接基板の上方からゲート電極膜４，
たとえば、厚さ１００ｎｍのＭｏ膜を電子ビーム蒸着法
で被着する。この時、Ｓｉ３Ｎ４膜は厚いので、その側
面は露出されたま＼である。In step (4) of this embodiment, the insulating film mask pattern 2
′ without removing the gate electrode film 4, directly from above the substrate.
For example, a 100 nm thick Mo film is deposited by electron beam evaporation. At this time, since the Si3N4 film is thick, its side surfaces remain exposed.
次いで、工程（５）で上記処理済み基板上の 絶縁膜マ
スクパターン２゛を，たとえば、高温の８３ＰＯ４水溶
液中でエッチングして除去する。この時、マスク２”上
のＭｏ膜は一緒に剥離して除去されてゲート孔５が形成
される。Next, in step (5), the insulating film mask pattern 2'' on the treated substrate is removed by etching, for example, in a high temperature 83PO4 aqueous solution. At this time, the Mo film on the mask 2'' is peeled off and removed to form the gate hole 5.
あとは前記最初の実施例と同様にゲート孔５を通して熱
酸化膜エッチングを行えば、冷陰極コーン６が空間に露
呈し、シリコン基板上に一体的に突出したシリコンから
なる微小冷陰極が形成される。本実施例ではゲート電極
膜４は、絶縁膜マスクパターン２″をマスクとしたリフ
トオフ形成により行うので、ｌマスクプロセスで形成で
き工程が短縮されるという特散がある。After that, the thermal oxide film is etched through the gate hole 5 in the same way as in the first embodiment, and the cold cathode cone 6 is exposed to the space, forming a minute cold cathode made of silicon that protrudes integrally on the silicon substrate. Ru. In this embodiment, the gate electrode film 4 is formed by lift-off formation using the insulating film mask pattern 2'' as a mask, so that it can be formed by an l-mask process, which shortens the process.
以上述べた実施例は一例を示したもので、本発明の趣旨
に添うものである限り、使用する素材や個々のプロセス
など適宜好ましいもの、あるいはその組み合わせを用い
ることができることは言うまでもない。The embodiments described above are merely examples, and it goes without saying that preferred materials and individual processes, or combinations thereof may be used as appropriate, as long as they comply with the spirit of the present invention.
？発明の効果］
以上説明したように、本発明によれば、シリコン基板の
上に冷陰極コーン６を形成するのは熱酸化であり、した
がって、熱酸化と冷陰極コーンとが同時形成され製造工
程が簡易である。しかも、製造工程の途中では、冷陰極
コーン６は各種の処理環境に曝されず、最後にＳｉＯ■
熱酸化膜の選択エッチングにおいて初めて空間に露呈さ
れるので、冷陰極コーン６は極めて安定に再現性よく形
成することができる。しかも、殆ど半導体ＩＣの製造に
おいて、よく知られた製造プロセスだけを用いればよい
ので、製品の品質は安定であり．かつ、安価に製造する
ことができる。? Effects of the Invention] As explained above, according to the present invention, the cold cathode cone 6 is formed on the silicon substrate by thermal oxidation. Therefore, thermal oxidation and cold cathode cone are simultaneously formed and the manufacturing process is completed. is simple. Moreover, during the manufacturing process, the cold cathode cone 6 is not exposed to various processing environments, and finally the SiO2
Since the cold cathode cone 6 is exposed to space for the first time during the selective etching of the thermal oxide film, the cold cathode cone 6 can be formed extremely stably and with good reproducibility. Moreover, in the manufacture of most semiconductor ICs, only well-known manufacturing processes need to be used, so the quality of the products is stable. Moreover, it can be manufactured at low cost.
第１図は本発明実施例の工程を示す図、第２図は本発明
の他の実施例の工程を示す図、第３図は従来の微小冷陰
極の製造方法の例を示す図である。
図において、
■はシリコン基板、
２は絶縁膜、
２゜は絶縁膜マスクパターン、
３は熱酸化膜、
４はゲート電極膜、
５はゲート孔、
６は冷陰極コーンである。
ｉ８−尤２月太かき仔″１の工禾１色示 １ はη第
１ 図
本危哨の｛ｔ２０笑児伊１の工ｆＬえ示１０舅 ）Ｌ
ＵｊＪFIG. 1 is a diagram showing the steps of an embodiment of the present invention, FIG. 2 is a diagram showing the steps of another embodiment of the present invention, and FIG. 3 is a diagram showing an example of the conventional manufacturing method of a minute cold cathode. . In the figure, 2 is a silicon substrate, 2 is an insulating film, 2° is an insulating film mask pattern, 3 is a thermal oxide film, 4 is a gate electrode film, 5 is a gate hole, and 6 is a cold cathode cone. i8-February 1st month
1 Zumoto Kousou {t20 Shōjii 1's work fL illustration 10 舅 )L
UjJ
Claims (1)
、前記絶縁膜（２）をホトエッチングして、冷陰極コー
ン（６）が形成される部分に所要の大きさのマスクパタ
ーン（２′）を形成する工程と、 前記マスクパターン（２′）を設けた前記シリコン基板
（１）を熱酸化する工程と、 前記熱酸化膜（３）上にゲート電極膜（４）を形成する
工程と、 前記冷陰極コーン（６）の上方の前記ゲート電極膜（４
）にゲート孔（５）を形成する工程と、前記ゲート孔（
５）を通して前記熱酸化膜（３）の一部をエッチング除
去して前記冷陰極コーン（６）を露呈させる工程とを少
なくとも含むことを特徴とした微小冷陰極の製造方法。[Claims] A step of forming an insulating film (2) on a silicon substrate (1), and photo-etching the insulating film (2) to form a desired area where a cold cathode cone (6) is to be formed. a step of thermally oxidizing the silicon substrate (1) provided with the mask pattern (2'); and a step of forming a gate electrode film on the thermal oxide film (3). (4) forming the gate electrode film (4) above the cold cathode cone (6);
) forming a gate hole (5) in the gate hole (
5) A method for manufacturing a minute cold cathode, comprising at least the step of etching away a part of the thermal oxide film (3) to expose the cold cathode cone (6).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1233545A JPH0395829A (en) | 1989-09-08 | 1989-09-08 | Manufacture of micro cold cathode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1233545A JPH0395829A (en) | 1989-09-08 | 1989-09-08 | Manufacture of micro cold cathode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0395829A true JPH0395829A (en) | 1991-04-22 |
Family
ID=16956739
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1233545A Pending JPH0395829A (en) | 1989-09-08 | 1989-09-08 | Manufacture of micro cold cathode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0395829A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06124669A (en) * | 1992-04-29 | 1994-05-06 | Samsung Display Devices Co Ltd | Field emission display and its manufacture |
| US5430292A (en) * | 1991-06-10 | 1995-07-04 | Fujitsu Limited | Pattern inspection apparatus and electron beam apparatus |
| US5557105A (en) * | 1991-06-10 | 1996-09-17 | Fujitsu Limited | Pattern inspection apparatus and electron beam apparatus |
| FR2744565A1 (en) * | 1996-02-07 | 1997-08-08 | Nec Corp | Manufacture of cold cathode with sharp edges on emitter |
-
1989
- 1989-09-08 JP JP1233545A patent/JPH0395829A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5430292A (en) * | 1991-06-10 | 1995-07-04 | Fujitsu Limited | Pattern inspection apparatus and electron beam apparatus |
| US5557105A (en) * | 1991-06-10 | 1996-09-17 | Fujitsu Limited | Pattern inspection apparatus and electron beam apparatus |
| JPH06124669A (en) * | 1992-04-29 | 1994-05-06 | Samsung Display Devices Co Ltd | Field emission display and its manufacture |
| FR2744565A1 (en) * | 1996-02-07 | 1997-08-08 | Nec Corp | Manufacture of cold cathode with sharp edges on emitter |
| US5924903A (en) * | 1996-02-07 | 1999-07-20 | Nec Corporation | Method of fabricating a cold cathode for field emission |
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