JPH0378435A - Testing method of ground circuit of multi-branch switch - Google Patents
Testing method of ground circuit of multi-branch switchInfo
- Publication number
- JPH0378435A JPH0378435A JP21190489A JP21190489A JPH0378435A JP H0378435 A JPH0378435 A JP H0378435A JP 21190489 A JP21190489 A JP 21190489A JP 21190489 A JP21190489 A JP 21190489A JP H0378435 A JPH0378435 A JP H0378435A
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- Prior art keywords
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- zero
- sequence current
- phase
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- 238000012360 testing method Methods 0.000 title claims abstract description 9
- 239000013598 vector Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims description 53
- 238000012795 verification Methods 0.000 claims description 17
- 238000001514 detection method Methods 0.000 claims description 4
- 238000012937 correction Methods 0.000 claims description 3
- 238000011084 recovery Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 12
- 238000012545 processing Methods 0.000 description 9
- 238000005070 sampling Methods 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 4
- 238000004804 winding Methods 0.000 description 4
- 238000004364 calculation method Methods 0.000 description 3
- 230000007935 neutral effect Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 238000013102 re-test Methods 0.000 description 1
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Abstract
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明は多分岐開閉装置に収納された複数の回線から地
絡回線を検出する検定方法に間する。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention is directed to a verification method for detecting a ground fault line from a plurality of lines housed in a multi-branch switchgear.
〈従来の技術〉
非接地系の配電系統用に使用される、複数系統のケーブ
ル回線を集中して収納した多分岐開閉装置として、従来
、第5図、並びに第6図に例示する構成のものがあった
。第5図において、10は多分岐開閉装置、11は多分
岐開閉装置1〇−式を収容する外箱、12は外I11の
扉、13はケーブル回線群A−Fが立ち上がるケーブル
ビット、14は地表面である。幹線から接地形計器用変
圧器GPT(以下、GPTと表示する)とケーブル回線
群A−Fとが分岐しており、以降各回線を区別する必要
が有るときは、回線A、回線Bの如く英大文字A−Fを
付して表記し、零相X流の場合には更にOを何して例え
ばIAOの如く表記することにする。各回線A〜Fには
夫々に開閉器CD(以下、CBと表記する)、零相変流
器ZCT(以下、ZCTと表記する)、保護継電器等が
配設されているが、図の煩雑化を避けるため、第5図に
は回線毎にZCTの記号のみを付して他は省略し、第6
図に1回線分についてその構成の概要を示している。<Prior art> As a multi-branch switchgear that is used for an ungrounded power distribution system and stores cable lines of multiple systems in a concentrated manner, the configurations illustrated in FIGS. 5 and 6 have conventionally been used. was there. In FIG. 5, 10 is a multi-branch switchgear, 11 is an outer box that accommodates the multi-branch switchgear 10-type, 12 is the door of the outside I11, 13 is a cable bit from which cable line groups A to F stand up, and 14 is a It is the ground surface. A grounded instrument transformer GPT (hereinafter referred to as GPT) and a cable line group A-F are branched from the main line, and when it is necessary to distinguish between each line from now on, they will be referred to as line A, line B, etc. It will be written with capital letters A-F, and in the case of zero-phase X flow, what is added to O and written as, for example, IAO. Each line A to F is equipped with a switch CD (hereinafter referred to as CB), a zero-phase current transformer ZCT (hereinafter referred to as ZCT), a protective relay, etc., but the diagram is complicated. In order to avoid confusion, only the ZCT symbol is attached to each line in Figure 5, and the others are omitted.
The figure shows an outline of the configuration for one line.
第6図において、DGRは回線の1線地絡を検出する方
向地絡&I電器(以下DGRと表記する)で、GPTは
1次巻線を星形結線として中性点を直接接地し、中性点
電流Inは線路の静電容量CA−CFに基づく充電電流
を系統に還流させており、GPTの3次巻線を開放デル
タ結線して零相電圧■0の検出に使用している、r 1
1は制限抵抗器(Rnは1次側換算値)、Rgは地絡事
故点G(動作説明における例示的なもの)における地絡
抵抗で、ZCTの2次側出力としての零相電流10と制
限抵抗器rnの両端から取出した零相電圧VOがDGR
を駆動する入力要素として接続されている。In Figure 6, DGR is a directional ground fault & I electric appliance (hereinafter referred to as DGR) that detects a single-wire ground fault in a line, and GPT is a star-shaped connection of the primary winding, with the neutral point directly grounded. The sex point current In is a charging current based on the capacitance CA-CF of the line that is returned to the system, and the tertiary winding of the GPT is connected in an open delta and is used to detect the zero-sequence voltage ■0. r 1
1 is the limiting resistor (Rn is the value converted to the primary side), Rg is the ground fault resistance at the ground fault point G (an example in the operation explanation), and the zero-sequence current 10 as the secondary side output of the ZCT. The zero-sequence voltage VO taken out from both ends of the limiting resistor rn is DGR.
is connected as an input element to drive.
次にこのような構成の1つの回線において1線地絡発生
時のDGRの保護継電動作について説明する。Next, a description will be given of the protective relay operation of the DGR when a one-line ground fault occurs in one line having such a configuration.
因に、2線以上の地絡、及び2以上の回線の異なる相に
同時に地絡が発生した場合には、短絡故障となり、正常
時と比較して充分に大きな短絡電流が事故回線に発生ず
ることから、通常、図示しない過電流継電器等によって
保護されている。従ってここでは、1線地絡事故のみに
ついて説明する。Incidentally, if a ground fault occurs in two or more lines or in different phases of two or more lines at the same time, a short-circuit failure will occur, and a sufficiently large short-circuit current will occur in the faulty line compared to normal conditions. Therefore, it is usually protected by an overcurrent relay (not shown) or the like. Therefore, only the one-line ground fault accident will be explained here.
尚、1線地絡事故時の様相は第7図に示す等価回路、並
びに第8図のベクトル図によって解析することが可能で
あるが、第7図、及び第8図では、煩雑を避けるため3
回線A−Cから成る配電系統で、回線Aに1線地絡事故
が発生した場合について説明している。ここにEは対地
電圧で、系統電圧が6.6kVの場合、約3810[V
コとなる。Although it is possible to analyze the situation at the time of a single-line ground fault by using the equivalent circuit shown in Fig. 7 and the vector diagram shown in Fig. 8, in order to avoid complexity, Figs. 3
A case will be described in which a one-line ground fault occurs in line A in a power distribution system consisting of lines A to C. Here, E is the ground voltage, which is approximately 3810 [V when the grid voltage is 6.6 kV.
It becomes Ko.
地絡電流1gが地絡事故点(1から地絡抵抗Rgを通し
て大地に流入すると、事故回線のZCTの1次側には電
源側から負荷側(地絡事故点G側)に向かう故障電流が
流れ、ZCTの2次側出力it流として零相電流IAO
が得られ、又、健全回線では負荷側から電源側に向かっ
て流れる電流となるので、健全回線のZCTては零相電
流IBO1I COが出力されるが、事故回線の零相電
流IAOと健全回線の零相電流IBO1ICOとでは零
相電流の方向が逆向き、即ち両零相電流ベクトルの位相
が略180°異なるものとなっている。又、地絡電流は
GI’Tの中性点から1次巻線に均等に分流するので、
3次巻線の開放デルタ結線により制限抵抗器r 11の
両端には地絡電流rgの大きさに対応した零相電圧■0
が現われる。When 1 g of ground fault current flows from the ground fault point (1) to the ground through the ground fault resistance Rg, a fault current flows from the power supply side to the load side (earth fault point G side) on the primary side of the ZCT of the fault line. zero-sequence current IAO as the secondary output it flow of ZCT
In addition, in a healthy line, the current flows from the load side to the power supply side, so the ZCT of the healthy line outputs a zero-sequence current IBO1ICO, but the zero-sequence current IAO of the faulty line and the healthy line The direction of the zero-sequence current is opposite to that of the zero-sequence current IBO1ICO, that is, the phases of both zero-sequence current vectors differ by approximately 180°. Also, since the ground fault current is equally divided from the neutral point of GI'T to the primary winding,
Due to the open delta connection of the tertiary winding, a zero-sequence voltage ■0 corresponding to the magnitude of the ground fault current rg is applied to both ends of the limiting resistor r11.
appears.
第8図は零相電圧■0を基準ベクトルとして実軸正方向
にとり、健全回線及び事故回線の電流をベクトルを示す
矢印で示したベクトル図で、健全回線の零相電流は零相
電圧より90°進んだ虚軸上に在り、地絡電流I8は全
回線の充電電流と中性点電流Inのベクトル和として求
められ、事故回線の零相電流は第3象現にあり、健全回
線の零相電流とは略、逆方向であることが判る。Figure 8 is a vector diagram in which the zero-sequence voltage ■0 is taken as a reference vector in the positive direction of the real axis, and the currents in the healthy line and faulty line are shown by arrows indicating the vectors. The ground fault current I8 is found as the vector sum of the charging current of all lines and the neutral point current In, and the zero-sequence current of the failed line is in the third quadrant, and the zero-sequence current of the healthy line is on the advanced imaginary axis. It can be seen that the direction is almost opposite to that of the current.
DGRは零相電圧■0を基準ベクトルとして零相電流■
0の方向を判定して、それらの積によって動作、不動作
を決定する慄護!!電器で、通常第9図で示される動作
域と不動作域で、DGRを使用すると高精度且つ高信頼
度の電力形保護継電方式が達成出来るとされている。DGR is the zero-sequence voltage■ Zero-sequence current with 0 as the reference vector■
Determine the direction of 0 and decide whether to move or not by multiplying them! ! In electrical appliances, it is said that a highly accurate and highly reliable power type protective relay system can be achieved by using DGR in the operating range and non-operating range shown in FIG. 9.
〈発明が解決しようとする課題〉
上述のように、従来の非接地系の配電系統にDGRを使
用することは信頼度の高い保護継電方式ではあるが、電
力形の高精度継電器であるDGRはかなり高価であり、
回線数と同数の高価な高級継電器を多分岐開閉装置毎に
設置するのは極めてコスト高となり、叉、DGRを使用
するとすれば必ず零相電圧VOが必要であるために多分
岐開閉装置毎にGPTを設置し、煩雑な石川電圧■0回
路を11?4器の周辺に用意する必要があり、継電器周
辺の配線類を輻輳させて信頼度を低下させると共に、よ
り大きな外箱と設置面積を用意する必要があり、大幅な
価格上昇を招き、都市配電の近代化に際しての大きな障
害となっていた。<Problems to be Solved by the Invention> As mentioned above, using DGR in conventional ungrounded power distribution systems is a highly reliable protective relay system, but DGR, which is a power-type high-precision relay, is quite expensive;
Installing the same number of expensive, high-grade relays as the number of lines for each multi-branch switchgear would be extremely costly, and if DGR were to be used, zero-phase voltage VO would be required, so each multi-branch switchgear would need It is necessary to install GPT and prepare a complicated Ishikawa Voltage ■0 circuit around the 11~4 relays, congesting the wiring around the relay and reducing reliability, and requiring a larger outer box and installation space. This led to a significant price increase and was a major obstacle to the modernization of urban electricity distribution.
本発明はこのような障害を除去し、零相電圧VOを利用
せず、従ってDGRやGPTを設置すること無く、零相
電流の相対的方向判定のみによって安価で且つ高信頼度
の1線地絡回線検出を行なう方法を提供することを目的
とするもので、デジタルデータ処理が可能なデジタル方
式の継電装置に適用すると有効である。The present invention eliminates such obstacles and provides a low-cost and highly reliable one-line ground system by only determining the relative direction of the zero-sequence current without using the zero-sequence voltage VO and therefore without installing a DGR or GPT. The purpose of this invention is to provide a method for detecting a faulty circuit, and it is effective when applied to a digital relay device capable of digital data processing.
く課題を解決するための手段〉
1、多分岐開閉装置内に収納された複数の回線中01つ
の回線に発生する地絡事故の有無を検出する地絡回線検
定方法において、
第1の発明は、前記複数の回線から任意に抽出した第1
の基準回線の零相変流器が出力する零相電流を基準ベク
トルとして、残余の被測定回線の零相変流器が出力する
零相電流ベクトルとの位相差を順次比較計測し、前記基
準回線と前記残余の被測定回線との零相電流位相の間に
、所定の範囲内の差が検出されれば有意差有りと判定し
、前記所定範囲内の差が無ければ有意差無しと判定する
多分岐開閉器装置の地絡回線検定方法であって、若し、
有意差無しと判定した時、当該多分岐開閉器装置の各回
線には1線地絡事故が発生していないと判定し、初期状
態に復帰する手順を備え、若し、有意差有りと判定され
た時には、その回線を事故回線と判定するもので、若し
、基準回線以外の、残余の被測定回線の総てに有意差が
認められた時には、基準回線に1線地絡が存在し、残余
の被測定回線にはl線地絡は存在しないと判定して所定
の記憶場所に記憶する手順を設けたものである。Means for Solving the Problem> 1. In a ground fault line verification method for detecting the presence or absence of a ground fault occurring in one line among a plurality of lines housed in a multi-branch switchgear, the first invention provides the following: , the first line arbitrarily extracted from the plurality of lines.
Using the zero-sequence current outputted by the zero-sequence current transformer of the reference line as a reference vector, the phase difference with the zero-sequence current vector outputted by the zero-sequence current transformer of the remaining lines to be measured is sequentially compared and measured, and the If a difference within a predetermined range is detected between the zero-sequence current phases of the line and the remaining line under test, it is determined that there is a significant difference, and if there is no difference within the predetermined range, it is determined that there is no significant difference. A ground fault line verification method for a multi-branch switch device, comprising:
When it is determined that there is no significant difference, it is determined that a single line ground fault has not occurred in each line of the multi-branch switch device, and a procedure is provided to return to the initial state, and if it is determined that there is a significant difference. If a significant difference is found in all of the remaining measured lines other than the reference line, it is determined that there is a one-line ground fault in the reference line. , a procedure is provided for determining that there is no l-line ground fault in the remaining lines under test and storing it in a predetermined storage location.
また、第2の発明は、前記各手順を第1の検定手順とし
、これに加えて、基準回線を変更して同一手順を再実行
する第2の検定を実施するもので、前記基準回線を第1
の基準回線とし、この第1の基準回線以外の任、泣の回
線の中から、更に第2の基準回線を選定抽出して零相電
流の第2の基準ベクトルとして設定し、残余の被測定回
線との零相電流の位相に所定の位相差の有無を再度検定
する手順を備え、前記何意差のある回線があれば、その
回線を第2の所定記憶場所に事故回線候補2として記憶
し、前記第1の検定手順で所定の第1の記憶場所に有意
差ありどして記憶された事故回線候補Iと同一の回線で
あることを一致検出手段によって確認して、1線地格事
故の発生した回線の存在を判定し、事故回線と特定する
手順とを設けた。Further, the second invention is to make each of the above-mentioned steps a first verification procedure, and in addition to this, a second verification is carried out in which the same procedure is re-executed by changing the reference line. 1st
The reference line is set as the reference line of A procedure is provided to re-test whether there is a predetermined phase difference in the phase of the zero-sequence current with the line, and if there is a line with the above-mentioned difference, that line is stored in a second predetermined storage location as fault line candidate 2. Then, the coincidence detection means confirms that the line is the same as the accident line candidate I stored in the predetermined first storage location with a significant difference in the first verification procedure, and A procedure has been established to determine the existence of a line where an accident has occurred and identify it as an accident line.
更に、第3の発明は前記第1、第2の発明に対して、各
回線の個々の零相X流の計測値が、各回線毎に予め設定
された補正値によって補正された値を演算に使用するこ
とを特徴とするものである。Furthermore, a third invention, in contrast to the first and second inventions, calculates a value in which the measured value of each zero-phase X flow of each line is corrected by a correction value set in advance for each line. It is characterized by its use in
つまり、多分岐開閉器装置の回線には地中ケーブルが使
用されるが、電線路のこう長の差やZCTの固有差によ
って各回線での零相電流の位相は健全回線であっても電
気角で206乃至306バラつくため、位相の比較演算
を行なう前処理段階で、総ての健全回線のプリセットデ
ータとして同一の位相角が付与されるように、実測値を
各回線毎に予め測定して補正値として保存しておき、各
回線の測定値を保存されている補正値で補正して、零相
tt流の位相の逆転判定の信頼度を高めるものである。In other words, although underground cables are used for the lines of multi-branch switch equipment, the phase of the zero-sequence current in each line may vary due to differences in the length of the electric lines and inherent differences in ZCT, even if the line is in good condition. Since the angle varies by 206 to 306, the actual value is measured for each line in advance so that the same phase angle is given as preset data for all healthy lines in the preprocessing stage when performing phase comparison calculations. The measured value of each line is corrected using the stored correction value, thereby increasing the reliability of determining the phase reversal of the zero-phase tt flow.
く作 用ン
複数(N)の回線を有する配電系統において、任意に1
つの回線を抽出して第1の基準回線とし、基準回線と残
余の被測定回線(N−1)との零相電流の同時刻におけ
る位相を順次比較する検定法では、系統中に事故回線が
無い場合は総ての被測定回線(N−1)について基準回
線と同方向となり、ベクトルとしての位相差0は小さく
、その余弦値CO5θはほぼ1に近いものとなる。又、
1つの回線に地絡が在る場合には、基準回線が健全回線
であれば、地絡の在る1回線を除いて他の全回線(N−
2)の零相電流が同方向となるが、事故回線との比較で
は零相電流の方向が逆転するので、ベクトルの位相差0
0余弦値CO5θは負号となって容易に1つの特定回線
を事故回線として抽出することが出来るが、若し、残余
の全回線(N−1)の零相電流が総て逆方向となって検
出された場合には、基準回線自身が事故回線であると判
定する。本判定法によれば、多分岐開閉装置の回線数(
N)にλ1して(N−1)回の測定結果から判定される
ことになるので、系統の回線数(N)が充分に大であれ
ば検定の(言頼度は極めて高いものとなる。しかし、回
線数(N)が小さい場合には検出の信頼度が低下するこ
とが考えられる。In a power distribution system with multiple (N) circuits, one
In the verification method, one line is extracted and used as the first reference line, and the phase of the zero-sequence current at the same time of the reference line and the remaining line to be measured (N-1) is sequentially compared. If there is no such line, all lines to be measured (N-1) will be in the same direction as the reference line, the phase difference 0 as a vector will be small, and its cosine value CO5θ will be close to 1. or,
If there is a ground fault in one line, if the reference line is a healthy line, all other lines (N-
2), the zero-sequence currents are in the same direction, but when compared with the fault line, the direction of the zero-sequence currents is reversed, so the vector phase difference is 0.
The 0 cosine value CO5θ has a negative sign and one specific line can be easily extracted as a failed line, but if the zero-sequence currents of all remaining lines (N-1) are in the opposite direction. If this is detected, the reference line itself is determined to be the fault line. According to this determination method, the number of lines of a multi-branch switchgear (
Since the determination will be made from the results of (N-1) measurements with λ1 for N), if the number of lines in the system (N) is sufficiently large, the reliability of the test will be extremely high However, if the number of lines (N) is small, the reliability of detection may decrease.
第2の発明では、回線数に依存しないで信頼度を向上さ
せるために、前記の各手順に加えて、基準回線を変更し
て再度同一の検定手順を実行するように構成したもので
、第1の基準回線並びに事故回線(吠補l以外の回線か
ら新たに第2の基準回線を設定して、再度、残余の全回
線(N−1)との零相電流の位相を順次比較する第2の
検定を実行することにより、事故回線候補2が検出され
るので、事故回線候補lと事故回線候補2が同一回線で
あることを確認して事故回線を確定する。In the second invention, in order to improve the reliability independent of the number of lines, in addition to the above-mentioned steps, the reference line is changed and the same verification procedure is executed again. A new second reference line is set from the first reference line and the fault line (other than the fault line), and the phase of the zero-sequence current with all remaining lines (N-1) is sequentially compared again. By executing the test No. 2, faulty line candidate 2 is detected, so it is confirmed that faulty line candidate 1 and faulty line candidate 2 are the same line, and the faulty line is determined.
多分岐開閉装置では一般に地中ケーブルが使用され、ケ
ーブルのこう長、負荷の種類等によっては健全回線であ
っても、各回線の零相電流には同時にサンプリングを行
なって計測しても例えば位相角で20°〜30°の差が
最初から認められることがあるが、第3の発明では夫々
の健全時のデータに基づくプリセットデータに補正され
ているので、期間の位相角は総て揃っていると見なすこ
とが可能となり、基準回線が任意に通訳され、設定され
ても位相差の測定を同相であれば0°、逆相であれば1
80”と判定のアルゴリズムを単純化することが出来、
判定の信頼度が向上する。Underground cables are generally used in multi-branch switchgear, and depending on the length of the cable, type of load, etc., even if the line is sound, the zero-sequence current of each line may be sampled and measured at the same time. A difference of 20° to 30° in angle may be recognized from the beginning, but in the third invention, since it is corrected to the preset data based on the data at each healthy time, the phase angles of the periods are all the same. Even if the reference line is arbitrarily interpreted and set, the phase difference measurement will be 0° if it is in phase and 1 if it is out of phase.
80” and the algorithm for determination can be simplified,
The reliability of judgment is improved.
〈実施例〉
以下、本発明をデジタル処理群?に装置として実施した
その一実施例を示す第1図乃至第3図に基づいて説明す
る。<Example> Hereinafter, the present invention will be referred to as a digital processing group? An embodiment of the present invention implemented as a device will be explained based on FIGS. 1 to 3, which show an embodiment of the present invention.
ここに、第1図は本発明の第1の発明の−実施例に係わ
る多分岐開閉装置の地絡回線検定方法の判定手順を示す
フローチャート、第2図は本発明の第2の発明の一実施
例に係る多分岐開閉装置の地絡回線検定方法の判定手順
を示すフローチャート、第3図は本発明の一実施例に係
わる多分岐開閉装置のデジタル処理継電装置の信号伝達
経路を示すブロック図、第4図は各回線の零相電流を、
夫々の回線に設置されているZCT2次出力電流のベク
トルとして同時計測した時に得られる順方向、逆方向の
概念図で、横行に回線Aから回線Fの中で基準となる回
線上を示し、縦列方向にはどの回線に1線地絡事故が発
生したかを示している。Here, FIG. 1 is a flowchart showing the determination procedure of the ground fault line verification method for a multi-branch switchgear according to the embodiment of the first invention of the present invention, and FIG. A flowchart showing the determination procedure of a ground fault line verification method for a multi-branch switchgear according to an embodiment, and FIG. 3 is a block diagram showing a signal transmission path of a digital processing relay device for a multi-branch switchgear according to an embodiment of the present invention. Figure 4 shows the zero-sequence current of each line,
This is a conceptual diagram of the forward and reverse directions obtained when simultaneously measuring the ZCT secondary output current installed in each line as a vector.The horizontal line shows the reference line from line A to line F, and the vertical line shows the reference line from line A to line F. The direction indicates in which line the single-line ground fault occurred.
以下の説明中、第5図〜第9図に示した従来装置の構成
要素と共通の要素には同一の符号を使用し、重複を避け
るため、詳細な説明を省略し、異なる要素についてのみ
説明する。In the following explanation, the same reference numerals will be used for elements common to those of the conventional device shown in Figs. 5 to 9, detailed explanations will be omitted to avoid duplication, and only different elements will be explained. do.
第3図(イ)はデジタル処理継電装置のA/D変換部の
構成を示すもので、各回線A−FのZCTからの出力信
号へ“〜F゛が補助変成器AXTを経由してA/D変換
部に入力され、フィルターFによって高域成分を除去し
た後、サンプルホールl”SN、マルチプレクサMPX
両回路を経てA/D変換回路によってデジタルデータに
変換されて次段の演算部に処理が移動する。Figure 3 (A) shows the configuration of the A/D conversion section of the digital processing relay device, in which the output signal from the ZCT of each line A-F is sent via the auxiliary transformer AXT. It is input to the A/D converter, and after removing high-frequency components by filter F, it is sent to sample hole l”SN and multiplexer MPX.
After passing through both circuits, the data is converted into digital data by an A/D conversion circuit, and the processing is transferred to the next stage arithmetic unit.
演算部は第3図(0)に示されるようにマイクロプロセ
ッサCI)Uを中心にプログラムを収納する読出し専用
記憶回路ROM、継電器の整定値を設定、記憶する回路
SET、作業用の読み書き可能な記憶回路RAM、次段
の操作部とデジタル信号を送受信するためのインターフ
ェース回路IF、1i報、表示、記録のためのバッファ
ー回路[31,I F等を信号バスBUSで結んだ回路
構成となっている。As shown in Figure 3 (0), the arithmetic unit includes a microprocessor CI)U, a read-only memory circuit ROM that stores programs, a circuit SET that sets and stores the setting values of the relay, and a read/write circuit for working. The circuit has a memory circuit RAM, an interface circuit IF for transmitting and receiving digital signals with the next stage operation section, a buffer circuit for 1i information, display, and recording [31, IF, etc. are connected by a signal bus BUS. There is.
このような構成のデジタル処理装置では一般に入力され
たアナログ頃(正弦波)を一定周期でサンプリングした
値を演算処理しており、多くの演算方式が適用されてい
るが、ここでは、最も代表的な例としてデジタル処理の
継電装置によく適用されている積和方式によって説明す
る。Digital processing devices with this type of configuration generally process values obtained by sampling input analog waves (sine waves) at regular intervals, and many calculation methods are applied, but here we will introduce the most typical one. As an example, the sum-of-products method, which is often applied to digital processing relay devices, will be explained.
今、回線A及び回線Bに装着されている零相変流器ZC
Tの2次出力電流を夫々IAO,IBOとし、IAOと
IBOとは位相角の差がθであるとすると、これらを時
間tでサンプリングした値どうし、及び3サンプリング
前のデータどうしの積を作って加算したものは、
(IAO(+、)) ・(l BO(量、))+(IA
O(t−3h)) ・(180(t−3h))=IAO
・180・CO5θ・・・・・・・・・・・・・・(1
)となる。Zero-phase current transformer ZC currently installed on line A and line B
Assuming that the secondary output currents of T are IAO and IBO, respectively, and the difference in phase angle between IAO and IBO is θ, the products of these values sampled at time t and the data three samplings ago are created. What is added is (IAO(+,)) ・(l BO(amount, ))+(IA
O(t-3h)) ・(180(t-3h))=IAO
・180・CO5θ・・・・・・・・・・・・・(1
).
ここに、IAO(t−3h)はIAO(f、)から3サ
ンプリング前のデータを示し、又、hはサンプリング時
間幅で通常電気角30°になるように設定される。Here, IAO(t-3h) indicates data three samplings ago from IAO(f,), and h is the sampling time width, which is usually set to be an electrical angle of 30 degrees.
具体的には、回線へと回線BのZCT二次出力は各サン
プリング時間毎に瞬時値が計測され、デジタル処理され
て記憶回路RAMの夫々の所定場所に一時記憶され、更
に積演算の結果、3サンプリング時間前のデータとの和
演算結果も記憶回路RAMに記録され、必要に応じて読
出と書込が行なわれている。Specifically, the instantaneous value of the ZCT secondary output of the line B to the line is measured at each sampling time, digitally processed and temporarily stored in each predetermined location of the memory circuit RAM, and as a result of the product operation, The result of the sum operation with the data three sampling times before is also recorded in the storage circuit RAM, and read and written as necessary.
この(1)式の左辺は入力する零相電流の瞬時値からな
るデータであるが、右辺は時間成分を含まない定数で、
θが定まればcos oの値が定まり、θが180°変
化すれば、式の値はその符号の正負が逆転することを示
しており、この積和演算の過程で容易に2つの零相電流
間の位相比較を行な・うことが可能である。このため、
以下、各回線から人力される零相電流の基準回線の零相
電流に対する位相差の比較は総て上記のT、r[i11
方式によるものとして、次に本発明のうち、第1の発明
における地絡回線検定方法の判定手順の実施例について
第1図を参照して説明する。尚、第1図に示すフローチ
ャートの説明中、51.52・・・・・は処理手順(ス
テップ)の番号を示す。The left side of equation (1) is data consisting of the instantaneous value of the input zero-sequence current, but the right side is a constant that does not include a time component.
If θ is determined, the value of cos o is determined, and if θ changes by 180°, the sign of the value of the equation will be reversed, and in the process of this product-sum operation, two zero phases can easily be obtained. It is possible to perform phase comparisons between currents. For this reason,
Below, the comparison of the phase difference of the zero-sequence current manually inputted from each line with respect to the zero-sequence current of the reference line is based on the above T, r[i11
Next, an embodiment of the determination procedure of the ground fault line verification method according to the first aspect of the present invention will be described with reference to FIG. 1. In the description of the flowchart shown in FIG. 1, 51, 52, . . . indicate processing procedure (step) numbers.
零相電流間の位相比較がスタートすると、Slで先ず全
体(N)の回線から1つの基準回線が選択されるため、
第1の基準回線を設定するサブルーチンが実行される。When the phase comparison between zero-sequence currents starts, one reference line is first selected from the total (N) lines in Sl, so
A subroutine for setting a first reference line is executed.
具体的には、A−Fの6回線から例えば入回線が基準回
線として選択される。Slては回線A−Fに装着された
ZCTの2次側出力A゛〜F°からIl[i次零相電流
IAO〜IFOを計測し、IAOを基準とした(1)式
に示した積和演算が実行され、S3ではその値が正数で
あれば有意差無し、負であれば有意差有りとして演算結
果の値を正負の符号別に分類して、S4で夫々の個数1
1が計数される。若し、積和演算結果が負数となった回
線数がn=1ならその1つの回線の零相電流の方向が基
準回線の零相電流に対して逆向きであることを示してお
り、その1つの回線が事故回線であると判定する。Specifically, for example, an incoming line is selected from the six lines A to F as the reference line. Sl is the product obtained by measuring the i-order zero-sequence currents IAO to IFO from the secondary outputs A゛~F° of the ZCT installed in the line A-F, and calculating the product shown in equation (1) with IAO as the reference. The sum operation is executed, and in S3, if the value is a positive number, there is no significant difference, and if the value is negative, there is a significant difference.The values of the operation result are classified according to positive and negative signs, and in S4, each number is 1.
1 is counted. If the number of lines for which the product-sum calculation result is a negative number is n = 1, this indicates that the direction of the zero-sequence current of that one line is opposite to the zero-sequence current of the reference line. One line is determined to be an accident line.
また、積和演算結果が負数となった回線数がn=N −
1即ち5であれば、基準回線となった入回線が事故回線
と判定される。Also, the number of lines for which the sum of products operation result is a negative number is n=N −
If it is 1, that is, 5, the incoming line that has become the reference line is determined to be the faulty line.
第2図は本発明の第2の発明に係わる判定手順の一実施
例を示すフローチャートで、第1の発明で説明した51
〜S6の判定手順を実行した後、例えば8回線のみが零
相電流の位相が有意差が検出されたとするとn=Iであ
るから1次段の57に移行するが、S7で直ちに事故回
線の判定を下す事なく、S7では事故回線候補lとして
の判定が行なわれ、S8で記憶領域の所定番地に回線名
の記号Bが記憶1として書き込まれる。FIG. 2 is a flowchart showing an embodiment of the determination procedure according to the second invention of the present invention.
After executing the determination procedure in ~S6, for example, if a significant difference in the phase of the zero-sequence current is detected in only 8 lines, the process moves to the primary stage 57 because n=I, but immediately in S7, the phase of the faulty line is detected. Without making a determination, in S7 it is determined that the line is the failed line candidate 1, and in S8 the symbol B of the line name is written as memory 1 at a predetermined location in the storage area.
この時、若し、n:N−1=5であれば、B−Fの回線
総てが有意差有りとなったことから、基準回線の入回線
自身が事故回線である可能性が高い。しかし、この段階
では入回線が事故回線と断定せず、S7で回線名の記号
へを事故回線候補1として設定し、S8て所定の記憶領
域に記憶lとして書き込まれる。At this time, if n:N-1=5, all the lines of B-F have significant differences, so there is a high possibility that the incoming line of the reference line itself is the failed line. However, at this stage, the incoming line is not determined to be the faulty line, and the line name symbol is set as faulty line candidate 1 in S7, and is written as memory 1 in a predetermined storage area in S8.
次の59で、基準回線を変更して再設定しているが、こ
の時には最初の基準回線である入回線並びに事故回線候
補lの8回線は対象から除外され、第2の基準回線とは
ならないので、510で位相比較を行なえば、有意差の
ある回線は1つだけ検出される。In the next step 59, the reference line is changed and reconfigured, but at this time, the first reference line, the incoming line, and the 8 fault line candidate lines are excluded from the target and do not become the second reference line. Therefore, if phase comparison is performed in step 510, only one line with a significant difference will be detected.
即ち、8回線が事故回線の場合には、入回線、6回線以
外の4回線から例えば回線Cを第2の基準回線として選
択設定して、残余の回線との位相比較を行なうことにな
り、又、入回線が事故回線であった場合には入回線を除
いた残余の5回線から第2の基準回線が、例えば回線B
が選択され、何れの場合も、事故回線の零相電流の方向
が基準回線のそれと逆転していることが確認される。こ
の結果、512では事故回線候補2が決定され、S13
て所定の記憶場所に記憶2として記憶されるので、次の
514において記憶l、記憶2の読出しを行い、515
で事故回線候補lと事故回線候補2とが同一回線である
ことを確認することによって事故回線の判別が終了する
。That is, if line 8 is the failed line, for example, line C is selected and set as the second reference line from the 4 lines other than the incoming line and line 6, and phase comparison with the remaining lines is performed. In addition, if the incoming line is the faulty line, the second reference line from the remaining five lines excluding the incoming line is, for example, line B.
is selected, and in either case, it is confirmed that the direction of the zero-sequence current of the failed line is reversed from that of the reference line. As a result, fault line candidate 2 is determined in 512, and S13
Since it is stored as memory 2 in a predetermined memory location, the memory 1 and memory 2 are read in the next step 514, and the memory 2 is read out in 515.
By confirming that the failed line candidate 1 and the failed line candidate 2 are the same line, the determination of the failed line is completed.
次に、第3の発明の実施例としては、前記第1、第2の
発明の実施例おいて各回線のZCTの一次側に予め定め
られた試験用電流を同時に通電し、各261間の射そう
特性を演算部(第3図(ロ)参照)のRAMに位相特性
値として格納しておく。そして、実際の事故回線の検定
時には、これらの格納された位相特性値で各ZCTの出
力を補正すれば、各ZCTの先天的な位相特性差を無視
することが可能となる。Next, as an embodiment of the third invention, in the embodiments of the first and second inventions, a predetermined test current is simultaneously applied to the primary side of the ZCT of each line, and the The characteristics that are likely to be projected are stored in the RAM of the arithmetic unit (see FIG. 3 (b)) as phase characteristic values. Then, when actually verifying a faulty line, by correcting the output of each ZCT using these stored phase characteristic values, it becomes possible to ignore the inherent phase characteristic difference of each ZCT.
〈発明の効果〉
本発明を適用した多分岐開閉器装置は、零相変流器の二
次出力電流のベクトル比較を各回線間で実行するだけで
1線地絡事故が発生した事故回線の検出が可能となるの
で、高価な高精度リレーであるDGRを回線毎に設置す
る必要が無く、又、多分岐開閉器装置の箱毎にGPTを
設置する必要も無くなり、従って継電器周辺の煩雑な零
相電圧VO量関係配線も無くなり、すっきりと纒めるこ
とが出来るので、多分岐開閉器装置の占有面積を大幅に
縮小することが可能となり、製品原価の低減に寄与する
と共に、その縮小効果によって、都市配電の近代化に必
要な簡素な構成となり、都市での設置コストの上昇を抑
制するに極めて有効である。<Effects of the Invention> The multi-branch switch device to which the present invention is applied can eliminate faulty lines in which single-line ground faults have occurred by simply performing vector comparison of the secondary output currents of zero-phase current transformers between each line. Since detection becomes possible, there is no need to install DGR, which is an expensive high-precision relay, on each line, and there is no need to install GPT on each box of a multi-branch switch device, thus eliminating the need for complicated areas around relays. Zero-phase voltage VO amount-related wiring is also eliminated and can be summarized clearly, making it possible to significantly reduce the area occupied by the multi-branch switch device, contributing to a reduction in product cost and the reduction effect. This provides a simple configuration necessary for modernizing urban power distribution, and is extremely effective in suppressing increases in installation costs in cities.
第1図は多分岐開閉装置の地絡回線検定方法に係わる第
1の発明の判定手順を示すフローチャート、第2図は多
分岐開閉装置の地絡回線検定装置方法に係わる第2の発
明の判定手順を示すフローチャート、第3図は多分岐開
閉装置の地絡回線検定装置に係わる第3の発明のデジタ
ル処理継電装置の信号伝達経路を示すブロック図、第4
図は多分岐開閉装置の各零相変流器の出力電流ベクトル
の概念図、第5図は多分岐開閉装置の構成概要図、第6
図は、回線1回線分の構成図、第7図は3回線系統の等
価回路図、第8図は零相電流のベクトル図、第9図は方
向地絡継電器DGRの動作特性図。
30・・電源 31・・主変圧器32・・高圧
母線 33・・零相変流器ZCT34・・接地形計
器用変圧器GPT
35・・限流抵抗器Rn36・・地絡抵抗Rg37拳
事故点
方向地絡継電器DGR
2−
・遮断器CB
S l〜S
・フローチャートのステップ番号FIG. 1 is a flowchart showing the determination procedure of the first invention related to the ground fault line verification method for multi-branch switchgear, and FIG. 2 is a flowchart showing the determination procedure of the second invention related to the ground fault line verification method for multi-branch switchgear. Flowchart showing the procedure, FIG. 3 is a block diagram showing the signal transmission path of the digital processing relay device of the third invention related to the ground fault line verification device of the multi-branch switchgear, and FIG.
The figure is a conceptual diagram of the output current vector of each zero-phase current transformer of the multi-branch switchgear, Figure 5 is a schematic diagram of the configuration of the multi-branch switchgear, and Figure 6 is a schematic diagram of the configuration of the multi-branch switchgear.
7 is an equivalent circuit diagram of a three-line system, FIG. 8 is a vector diagram of zero-sequence current, and FIG. 9 is an operating characteristic diagram of a directional ground fault relay DGR. 30...Power supply 31...Main transformer 32...High voltage bus 33...Zero phase current transformer ZCT34...Grounding instrument transformer GPT 35...Current limiting resistor Rn36...Ground fault resistance Rg37 Fault point Directional ground fault relay DGR 2- - Breaker CB S l~S - Flowchart step number
Claims (3)
意に抽出した基準回線の零相変流器が出力する零相電流
を基準ベクトルとする基準回線設定手順と、 前記基準ベクトルと、前記複数の、回線から前記基準回
線を除外した残余の被測定回線の零相変流器が出力する
零相電流のベクトルとの、同時刻における位相差を順次
計測して前記基準ベクトルと比較する位相比較手順と、 前記基準ベクトルと前記残余の被測定回線の零相電流の
ベクトルとの位相に所定範囲内の差があるとき有意差あ
り、所定範囲内の差がないとき有意差なしと判定する有
意差判定手順と、 有意差なしと判定したとき初期状態に復帰する復帰手順
と、 有意差ありと判定したとき、その有意差を示す回線数が
、1つの回線か、残余の被測定回線の全回線かを判定し
、1つの回線のときは当該回線を、残余の全回線のとき
は前記基準回線を、夫々に事故回線として所定の記憶場
所に記憶する、事故回線判定手順、 を具備したことを特徴とする多分岐閉閉装置の地絡回線
検定方法。(1) A reference line setting procedure in which a zero-sequence current output by a zero-sequence current transformer of a reference line arbitrarily extracted from a plurality of lines housed in a multi-branch switchgear is used as a reference vector, and the reference vector; Sequentially measuring the phase difference at the same time with a zero-sequence current vector output from a zero-sequence current transformer of the remaining lines to be measured after excluding the reference line from the plurality of lines, and comparing the phase differences with the reference vector. Phase comparison procedure; When there is a difference in phase between the reference vector and the zero-sequence current vector of the remaining line to be measured within a predetermined range, it is determined that there is a significant difference, and when there is no difference within a predetermined range, it is determined that there is no significant difference. A recovery procedure that returns to the initial state when it is determined that there is no significant difference, and a return procedure that returns to the initial state when it is determined that there is no significant difference. A failure line determination procedure is provided, which determines whether all of the remaining lines are the same, and stores that line in a predetermined storage location as a failure line, and stores the reference line in a predetermined storage location if it is one line, and if all the remaining lines are the failure lines. A ground fault line verification method for a multi-branch closure device.
意に抽出した第1の基準回線の零相変流器が出力する零
相電流を第1の基準ベクトルとする基準回線設定手順と
、 前記第1の基準ベクトルと、前記複数の回線から前記第
1の基準回線を除外した残余の被測定回線の零相変流器
が出力する零相電流のベクトルの位相差を順次計測して
前記第1の基準ベクトルと比較する第1の位相比較手順
と、 前記第1の基準ベクトルと前記残余の被測定回線の零相
電流のベクトルとの位相に、所定範囲内の差があるとき
有意差あり、所定範囲内の差がないとき有意差なしと判
定する第1の有意差判定手順と、 有意差なしと判定したとき初期状態に復帰する第1の復
帰手順と、 有意差ありと判定したとき、それが1つの回線か残余の
被測定回線の全回線かを判定し、1つの回線のときは当
該回線を、残余の全回線のときは前記第1の基準回線を
事故回線候補1として所定の記憶場所に記憶する第1の
事故回線候補判定手順と、 前記第1の基準回線以外の、任意の回線から抽出した第
2の基準回線の零相変流器が出力する零相電流を第2の
基準ベクトルとする第2の基準回線設定手順と、 前記第2の基準ベクトルと前記残余の被測定回線の零相
電流のベクトルとの位相に所定範囲内の差があるとき有
意差あり、所定範囲内の差がないとき有意差なしと判定
する第2の有意差判定手順と、 有意差なしと判定したときには初期状態に復帰する第2
の復帰手順と、 有意差ありと判定したときは、その回線を事故回線候補
2として所定の記憶場所に記憶する第2の事故回線候補
判定手順と、 前記第1の事故回線候補判定手順で事故回線候補1とし
て記憶された回線と、前記第2の事故回線候補判定手順
で記憶された事故回線候補2が同一回線か、否かを判定
する一致検出手順と、同一回線のとき当該回線を事故回
線と決定する手順と、 同一回線でないと判定したとき初期状態に復帰する第3
の復帰手順と、 を具備したことを特徴とする多分岐開閉装置の地絡回線
検定方法。(2) A reference line setting procedure in which the zero-sequence current output by the zero-sequence current transformer of the first reference line arbitrarily extracted from the plurality of lines housed in the multi-branch switchgear is used as the first reference vector; , Sequentially measuring the phase difference between the first reference vector and the zero-sequence current vector output by the zero-sequence current transformer of the remaining measured line after excluding the first reference line from the plurality of lines; a first phase comparison procedure for comparing with the first reference vector; and significant when there is a difference within a predetermined range in phase between the first reference vector and the vector of the zero-sequence current of the remaining line under test. A first significant difference determination procedure that determines that there is a difference and that there is no significant difference when there is no difference within a predetermined range; A first restoration procedure that returns to the initial state when it is determined that there is no significant difference; When this happens, it is determined whether it is one line or all of the remaining lines under test, and if it is one line, the line is selected, and if it is all the remaining lines, the first reference line is selected as fault line candidate 1. a first fault line candidate determination procedure for storing in a predetermined storage location as a zero-sequence current output by a zero-sequence current transformer of a second reference line extracted from an arbitrary line other than the first reference line; a second reference line setting procedure in which the second reference vector is a second reference vector; and a significant difference when there is a difference within a predetermined range in phase between the second reference vector and the zero-sequence current vector of the remaining measured line. A second significant difference determination procedure that determines that there is no significant difference when there is no difference within a predetermined range, and a second significant difference determination procedure that returns to the initial state when it is determined that there is no significant difference.
A second fault line candidate determination procedure that stores the line as fault line candidate 2 in a predetermined storage location when it is determined that there is a significant difference; A match detection procedure for determining whether or not the line stored as line candidate 1 and the fault line candidate 2 stored in the second fault line candidate determination procedure are the same line; The procedure for determining that the lines are the same, and the third step that returns to the initial state when it is determined that they are not the same line.
A ground fault line verification method for a multi-branch switchgear, characterized by comprising a recovery procedure and the following.
角の値が各回線毎に、予め設定された補正値によって補
正された値で置換されることを特徴とする請求項第1項
または請求項第2項記載の多分岐開閉装置の地絡回線検
定方法。(3) Claim 1, characterized in that the value of the phase angle used to determine the phase of the zero-sequence current for each line is replaced with a value corrected by a preset correction value for each line. A ground fault line verification method for a multi-branch switchgear according to claim 2 or claim 2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21190489A JPH0378435A (en) | 1989-08-17 | 1989-08-17 | Testing method of ground circuit of multi-branch switch |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21190489A JPH0378435A (en) | 1989-08-17 | 1989-08-17 | Testing method of ground circuit of multi-branch switch |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0378435A true JPH0378435A (en) | 1991-04-03 |
Family
ID=16613576
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21190489A Pending JPH0378435A (en) | 1989-08-17 | 1989-08-17 | Testing method of ground circuit of multi-branch switch |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0378435A (en) |
-
1989
- 1989-08-17 JP JP21190489A patent/JPH0378435A/en active Pending
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