JPH0364869B2 - - Google Patents

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Publication number
JPH0364869B2
JPH0364869B2 JP57078857A JP7885782A JPH0364869B2 JP H0364869 B2 JPH0364869 B2 JP H0364869B2 JP 57078857 A JP57078857 A JP 57078857A JP 7885782 A JP7885782 A JP 7885782A JP H0364869 B2 JPH0364869 B2 JP H0364869B2
Authority
JP
Japan
Prior art keywords
plating
nickel
transparent conductive
conductive film
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57078857A
Other languages
Japanese (ja)
Other versions
JPS58194084A (en
Inventor
Kaname Myazawa
Yoshihiro Oono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP7885782A priority Critical patent/JPS58194084A/en
Publication of JPS58194084A publication Critical patent/JPS58194084A/en
Publication of JPH0364869B2 publication Critical patent/JPH0364869B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は液晶パネル用電極基板の製造方法に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing an electrode substrate for a liquid crystal panel.

液晶パネルには透明導電膜が用いられているが
パターンの微細化にともない抵抗が問題になり必
要とする画素以外は金属配線で抵抗の大きなとこ
ろを補つていこうとする動向がある。特に多重マ
トリクスパネルではパターンピツチ10μ程度が必
要とされるため画素以外は金属配線の必要性が生
ずる。そこで、従来このような金属配線を有する
電極構造は、例えばガラス基板上に透明導電膜を
全面形成する工程→これをパターニングする工程
(画素部とリード部を残して)→全面にCr−Auを
真空蒸着する工程→画素部とリード部以下のCr
−Auをエツチング除去する工程によつて得るか
全面に透明導電膜を全面に形成する工程→全面に
Cr−Auを形成する工程→リード部のCr−Au部を
残してCr−Auをエツチングする工程→リード部
及び画素部を残して透明導電膜をエツチングする
工程によつて得ていた。いずれの方法も透明導電
膜と金属リード部(Cr−Au)のパターンの位置
合わせが非常に困難であることや、透明導電膜・
Cr・Auとそれぞれ独立してエツチングするエツ
チング液の必要性(アンダーエツチングの問題)、
さらにはCr・Au被膜工程が真空蒸着法によるた
め高価である等の欠点を有していた。
Transparent conductive films are used in liquid crystal panels, but as patterns become finer, resistance becomes a problem, and there is a trend to use metal wiring to compensate for areas with high resistance, except for pixels where they are needed. In particular, in a multi-matrix panel, a pattern pitch of about 10 microns is required, which necessitates metal wiring for areas other than pixels. Conventionally, an electrode structure with such metal wiring was created by, for example, a process of forming a transparent conductive film on the entire surface of a glass substrate → a process of patterning it (leaving only the pixel area and lead area) → coating Cr-Au on the entire surface. Vacuum deposition process → Cr below the pixel area and lead area
-A process of forming a transparent conductive film on the entire surface by etching away Au →
It was obtained by the steps of forming Cr-Au → etching the Cr-Au leaving the Cr-Au part of the lead part → etching the transparent conductive film leaving the lead part and pixel part. In either method, it is extremely difficult to align the pattern of the transparent conductive film and the metal lead part (Cr-Au), and
The need for an etching solution that etches Cr and Au independently (under-etching problem);
Furthermore, since the Cr/Au coating process is based on a vacuum evaporation method, it has drawbacks such as being expensive.

そこで、本発明は上記欠点に鑑みなされたもの
であり、その目的とするところは安価で量産性が
よく、なおかつ透明導電膜の抵抗を下げることが
できる液晶パネル用電極基板の製造方法を提供す
ることにある。
Therefore, the present invention was made in view of the above-mentioned drawbacks, and its purpose is to provide a method for manufacturing an electrode substrate for a liquid crystal panel that is inexpensive, easy to mass-produce, and can reduce the resistance of a transparent conductive film. There is a particular thing.

本発明の液晶パネル用電極基板の製造方法は、
絶縁基板上にパターニングされた金属酸化物から
なる透明導電膜の一部の表面上にニツケル−リン
系又はニツケル−ホウ素系の無電解ニツケルメツ
キにより金属被膜を形成する工程と、該金属被膜
上に無電解貴金属メツキにより貴金属被膜を形成
する工程とを少なくとも具備することを特徴とす
る。
The method for manufacturing an electrode substrate for a liquid crystal panel of the present invention includes:
A step of forming a metal film on a part of the surface of a transparent conductive film made of a metal oxide patterned on an insulating substrate by electroless nickel plating of nickel-phosphorus or nickel-boron, and The method is characterized by comprising at least a step of forming a noble metal coating by electrolytic noble metal plating.

上記金属被膜のエツチングは、例えば非エツチ
ング部をレジスト後次のエツチング液(常温)に
30秒程度(被膜厚に応じて変動)浸漬して行な
う。
For etching the metal film mentioned above, for example, after resisting the non-etched area, apply the next etching solution (at room temperature).
Dip for about 30 seconds (varies depending on coating thickness).

エツチング液(容量比) リン酸 35% 硝 酸 35% 酢 酸 5% 硫 酸 5% 水 20% 又、前記貴金属(特に金、銀)被膜のエツチン
グは、非エツチング部へレジストを塗布後、王水
に浸漬することにより行なう。この後レジストを
剥離する。本発明によれば前記方法にようなパタ
ーン位置合せ(透明導電膜と金属リード部)の問
題がほとんどなく(大きなパターンである画素部
の合わせだけであり多少ずれても実用上問題とな
らない)、安価に金属リード付き液晶パネル用電
極基板が得られる。
Etching solution (volume ratio) Phosphoric acid 35% Nitric acid 35% Acetic acid 5% Sulfuric acid 5% Water 20% Also, when etching the noble metal (especially gold and silver) coating, after applying the resist to the non-etched area, This is done by immersing it in water. After this, the resist is peeled off. According to the present invention, there is almost no problem with pattern alignment (transparent conductive film and metal lead part) as in the above method (it only involves alignment of the pixel part, which is a large pattern, so even if there is some misalignment, there is no practical problem). An electrode substrate for a liquid crystal panel with metal leads can be obtained at low cost.

本発明に用いられる透明な絶縁基板としてはソ
ーダガラス、石英ガラス、ホウケイ酸ガラス等の
無機ガラス、ポリエステル、エポキシ、酢酸セル
ロース等のプラスチツクフイルムが考えられる。
液晶のモードによつては片側基板は不透明でも良
く、セラミツク上に透明導電膜を形成しても良
い。また、用いられる透明導電膜としては酸化ス
ズ系(酸化スズ又は酸化スズにアンチモン、ホウ
素、フツ素等をドーピングしたもの)でも良いし
酸化インジウム系(酸化インジウム又は酸化スズ
をドープしたもの等)でも良い。これらはCVD
法、真空蒸着法、スパツタ法、イオンプレイテイ
ング法、印刷焼成法、浸漬焼付け法、スプレー
法、パイロゾルCVD法等により得られる。
As the transparent insulating substrate used in the present invention, inorganic glasses such as soda glass, quartz glass, and borosilicate glass, and plastic films such as polyester, epoxy, and cellulose acetate can be considered.
Depending on the mode of the liquid crystal, one side of the substrate may be opaque, or a transparent conductive film may be formed on ceramic. The transparent conductive film used may be tin oxide-based (tin oxide or tin oxide doped with antimony, boron, fluorine, etc.) or indium oxide-based (indium oxide or tin oxide doped). good. These are CVD
method, vacuum evaporation method, sputtering method, ion plating method, print baking method, immersion baking method, spray method, pyrosol CVD method, etc.

これらの透明導電膜は所定のフオト工程を経て
HCl、HCl.Zn、Cr2+/Cr3+レドツクス系等を用
いてエツチングパターニングされる。次に透明電
極上にのみニツケルメツキ又はその合金メツキす
る方法としては、通常のSnCl2→PdCl2→NiPメ
ツキ工程のPdCl2工程後に触媒毒であるPb、Sb
を含んだ溶液に浸漬する。又は一液タイプの時は
ニツケルメツキ又はその合金メツキ前に前記触媒
毒に浸漬することにより選択的なメツキが得られ
る。ニツケルメツキ又はニツケル合金メツキの膜
厚は500Å〜10000Åが適当であり密着性からして
1000Å〜6000Åが適当である。ニツケル又はニツ
ケル合金としてはニツケル基をベースにNi−P、
Ni−B、Ni−Co−P、Ni−Cu−P、Ni−Co−
Cr−P等が用いられるが特にNi−P、Ni−Bは
密着性、メツキ液の安定度等が優れている。P、
Bの含有量は1wt%〜20wt%である。これらを無
電解メツキした後、密着性を向上させるため常温
に1週間以上放置するか、50℃〜500℃で熱処理
を行なつても良い。
These transparent conductive films undergo a prescribed photo process.
Etching patterning is performed using HCl, HCl.Zn, Cr 2+ /Cr 3+ redox system, etc. Next, as a method of plating nickel or its alloy only on the transparent electrode, the usual SnCl 2 → PdCl 2 → PdCl 2 step of the NiP plating process is followed by removing Pb and Sb, which are catalyst poisons.
Immerse in a solution containing Alternatively, in the case of a one-component type, selective plating can be obtained by immersing it in the catalyst poison before plating with nickel plating or its alloy. The appropriate film thickness for nickel plating or nickel alloy plating is 500 Å to 10,000 Å, considering its adhesion.
A suitable thickness is 1000 Å to 6000 Å. Nickel or nickel alloys include Ni-P, Ni-P, based on nickel,
Ni-B, Ni-Co-P, Ni-Cu-P, Ni-Co-
Although Cr-P and the like are used, Ni-P and Ni-B are particularly excellent in adhesion and stability of the plating solution. P,
The content of B is 1wt% to 20wt%. After electroless plating, these may be left at room temperature for one week or more to improve adhesion, or may be heat treated at 50°C to 500°C.

前記ニツケル又はニツケル合金被膜を形成後熱
処理する場合は、下層との密着性等が向上するも
ののその表面に導通性がやや劣る酸化ニツケルが
形成されるが、この酸化ニツケルを除去するため
塩化第二鉄の浴中に浸漬させるようにしてもよ
い。貴金属メツキはニツケル又はその合金メツキ
の抵抗をさらに低下させる(ニツケル又はその合
金メツキを厚くして抵抗を下げると基板との密着
性の問題が生ずる)ためであり、安定性、メツキ
の容易さ、比抵抗からして金、銀、Pd、Pt、
Rh、Ru等が、これらの合金又はその他の卑金属
との合金が良い。使い方からして無電解メツキが
良い。又無電解メツキでも置換型メツキ液が使い
易い。これらの貴金属メツキの厚みは50Å〜4000
Åであり、さらに望ましくは500Å〜3000Åであ
る。あまり厚くするとコストが高くなり、又透明
導電膜との密着性も劣る。薄すぎると抵抗が十分
低下しないのでおのずから適当な膜厚は貴金属の
固有比抵抗によつて決まつてくる。この貴金属無
電解メツキを施してから下層金属層等との密着性
向上のため、常温に1週間以上放置するか、80℃
〜500℃で熱処理を行なつてもよいがこの熱処理
のみを行なう他、前記熱処理と併用してもよい。
When the nickel or nickel alloy film is heat-treated after formation, nickel oxide with slightly poor conductivity is formed on the surface although adhesion with the underlying layer is improved. It may also be immersed in an iron bath. This is because precious metal plating further reduces the resistance of nickel or its alloy plating (if the resistance is lowered by making the nickel or its alloy plating thicker, problems with adhesion to the substrate will occur), and it improves stability, ease of plating, Gold, silver, Pd, Pt, based on specific resistance.
Rh, Ru, etc. are preferably alloyed with these or other base metals. Electroless plating is good considering how to use it. Also, displacement type plating liquid is easy to use for electroless plating. The thickness of these precious metal platings is 50Å to 4000
Å, more preferably 500 Å to 3000 Å. If it is too thick, the cost will increase and the adhesion to the transparent conductive film will also be poor. If it is too thin, the resistance will not be reduced sufficiently, so the appropriate film thickness is naturally determined by the specific resistivity of the noble metal. After applying this precious metal electroless plating, in order to improve the adhesion with the underlying metal layer, leave it at room temperature for at least one week, or leave it at 80℃.
Heat treatment may be performed at ~500° C., but this heat treatment may be performed alone or in combination with the heat treatment described above.

以下実施例によつて本発明を詳細に説明する。 The present invention will be explained in detail below with reference to Examples.

実施例 1 第1図のように、上パネル基板の走査電極(鎖
線)に対し下パネル基板に四重マトリクスパネル
用に信号電極である透明導電膜(5%の酸化スズ
をドープした酸化インジウム)をエツチング形成
した。リード部1のピツチは10μ画素部2のサイ
ズは70μである。次に無電解メツキプロセスとし
て1液性の増感剤である日立化成社製HS101Bで
5分間処理し、触媒毒を含んだ日立化成社製
HS201で10分間処理し、水洗後、カニゼン社製
S680無電解ニツケルリンメツキ液を用いて60℃
で3分間処理し、透明導電膜上のみに(第2図斜
線部)ニツケルリンメツキを2000Å施した。次に
フオト工程を経て画素上のニツケルリンメツキを
第3図のように前述の方法によりエツチング除去
した。A−B間の抵抗測定をしたところ第1図で
は10KΩ、第3図では500Ωであつた。次に日本エ
ンゲルハルト社製置換無電解金メツキ液で60℃、
30分間置換型メツキした。A−B間の抵抗は10Ω
であつた。第1図で走査電極と組み合わせ16行×
80桁(5×7ドツト)1/32dutyで四重マトリク
スの液晶パネルを作成したところ端子から遠い所
はON状態でもハーフトーンになり表示むらが生
じた。しかし同様のパネルを第3図の構成で作成
したところ表示むらを生じなかつた。又前述の従
来方法で作成したパネルは電極の切れ、シヨー
ト、ズレ等の不良が90%あつたが、本実施例によ
つて得たものは30%の不良(全て10μ部の透明導
電膜のエツチング切れ)のみであつた。本発明に
よつて得られた金属リード部は前述の無電解ニツ
ケルリンメツキより、又は前記無電解金メツキ後
に80℃〜500℃で熱処理して、基板への密着性の
向上耐摩耗性の向上をはかつても良い。
Example 1 As shown in Figure 1, a transparent conductive film (indium oxide doped with 5% tin oxide), which is a signal electrode for a quadruple matrix panel, is placed on the lower panel substrate in contrast to the scanning electrode (dashed line) on the upper panel substrate. was formed by etching. The pitch of the lead portion 1 is 10μ, and the size of the pixel portion 2 is 70μ. Next, as an electroless plating process, it was treated with Hitachi Chemical's HS101B, a one-component sensitizer, for 5 minutes.
After treatment with HS201 for 10 minutes and washing with water,
60℃ using S680 electroless nickel phosphor plating solution
was treated for 3 minutes, and 2000 Å of nickel phosphor plating was applied only on the transparent conductive film (shaded area in Figure 2). Next, after a photo process, the nickel plating on the pixels was removed by etching as shown in FIG. 3 by the method described above. When I measured the resistance between A and B, it was 10KΩ in Figure 1 and 500Ω in Figure 3. Next, the plate was heated at 60°C using a substituted electroless gold plating solution manufactured by Nippon Engelhardt Co., Ltd.
Displacement plating was performed for 30 minutes. The resistance between A and B is 10Ω
It was hot. In Figure 1, 16 rows in combination with scanning electrodes
When I created a quadruple matrix LCD panel with 80 digits (5 x 7 dots) and 1/32 duty, the areas far from the terminals showed halftones and uneven display even in the ON state. However, when a similar panel was made with the configuration shown in FIG. 3, no display unevenness occurred. In addition, 90% of the panels produced by the conventional method described above had defects such as cut, short, and misalignment of the electrodes, but the panel obtained by this example had 30% defects (all of the defects were due to a 10 μm portion of the transparent conductive film). Only the etching was broken. The metal lead portion obtained by the present invention is heat-treated at 80°C to 500°C after the electroless nickel plating described above or after the electroless gold plating to improve adhesion to the substrate and improve wear resistance. The is as good as ever.

実施例 2 実施例1において無電解ニツケルリンメツキ後
に置換型無電解銀メツキ液である高純度化学社製
S−900を用い80℃で30分間施した。次に画素部
を残して、銀及びニツケルリン被膜を前述のエツ
チング方法を用いて次々にエツチングして第3図
のような信号電極基板を作成した。A−B間の抵
抗は40Ωであつた。効果は実施例1と同様であつ
た。
Example 2 After the electroless nickel plating in Example 1, a substitution type electroless silver plating solution, S-900 manufactured by Kojundo Kagaku Co., Ltd., was used at 80° C. for 30 minutes. Next, the silver and nickel phosphorus coatings were sequentially etched using the above-described etching method, leaving the pixel portion, to produce a signal electrode substrate as shown in FIG. 3. The resistance between A and B was 40Ω. The effect was the same as in Example 1.

実施例 3 実施例1で無電解ニツケルリンメツキの代わり
に上村工業製(ベルニツケル)の無電解ニツケル
ボロンメツキ液を用い3500Åメツキした。後は同
様の処理でパネルとしたところ効果は同じであつ
た。
Example 3 In Example 1, 3500 Å plating was performed using electroless nickel boron plating solution manufactured by Uemura Kogyo (Bernickel) instead of electroless nickel plating. After that, the panel was made into a panel using the same treatment, and the effect was the same.

実施例 4 実施例1で酸化インジウム系透明導電膜の代わ
りに5wt%の酸化アンチモンをドープした酸化ス
ズを用いた。A−B間の抵抗は100KΩであつた。
次に無電解ニツケルリンメツキ、無電解金メツキ
後のA−B間の抵抗は実施例1と同様であつた。
パネルとしての効果は同様であつた。
Example 4 In Example 1, tin oxide doped with 5 wt% antimony oxide was used instead of the indium oxide-based transparent conductive film. The resistance between A and B was 100KΩ.
Next, the resistance between A and B after electroless nickel plating and electroless gold plating was the same as in Example 1.
The effect as a panel was similar.

実施例 5 実施例1のプロセスで金メツキの代わりに無電
解Pdメツキ(高純度化学社Pd−5)を1500Å施
した。A−B間の抵抗は80Ωであつた。パネルと
しての特性は実施例1と同様であつた。
Example 5 In the process of Example 1, electroless Pd plating (Kojundo Kagaku Co., Ltd. Pd-5) of 1500 Å was applied instead of gold plating. The resistance between A and B was 80Ω. The characteristics as a panel were the same as in Example 1.

上述の如く、本発明によれば、特にニツケル−
リン系又はニツケル−ホウ素系の無電解ニツケル
メツキにより金属被膜を形成したので、透明導電
膜との密着性が良好となる。さらに、透明導電膜
上に直接貴金属被膜を形成したのでは良好な密着
性が得られないが、無電解ニツケルメツキによる
金属被膜を介在させることにより充分な密着力を
確保できる。また、この金属被膜上に貴金属被膜
を形成したので、金属被膜の抵抗値をより低下さ
せることができる、したがつて透明導電膜からな
る電極の抵抗値を下げることになる。また、金属
被膜、貴金属被膜ともに無電解メツキにより形成
したので、(イ)絶縁基板の被メツキ面の全てにおい
て均一な膜厚の被膜が得られる。(ロ)かなり細密化
された透明導電膜パターンであつても容易に均一
な膜厚の被膜が得られる。したがつて、液晶パネ
ルにとつて極めて重要な電極基板内のセル厚を均
一なものとすることができる。
As mentioned above, according to the present invention, especially nickel-
Since the metal coating is formed by electroless nickel plating using phosphorus or nickel-boron, it has good adhesion to the transparent conductive film. Furthermore, if a noble metal coating is formed directly on a transparent conductive film, good adhesion cannot be obtained, but by interposing a metal coating formed by electroless nickel plating, sufficient adhesion can be ensured. Furthermore, since the noble metal film is formed on this metal film, the resistance value of the metal film can be further reduced, and therefore the resistance value of the electrode made of the transparent conductive film can be reduced. Furthermore, since both the metal coating and the noble metal coating are formed by electroless plating, (a) a coating with a uniform thickness can be obtained on the entire plated surface of the insulating substrate. (b) Even with a highly detailed transparent conductive film pattern, a film of uniform thickness can be easily obtained. Therefore, the cell thickness within the electrode substrate, which is extremely important for liquid crystal panels, can be made uniform.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の四重マトリクスパネルの透明導
電膜の構造を示す図。第2図は本発明の一実施例
において透明導電膜上の全面にニツケル−リンメ
ツキした電極基板を示す図。第3図は本発明の一
実施例による電極基板を示す図。
FIG. 1 is a diagram showing the structure of a transparent conductive film of a conventional quadruple matrix panel. FIG. 2 is a diagram showing an electrode substrate in which the entire surface of a transparent conductive film is plated with nickel-phosphorus in one embodiment of the present invention. FIG. 3 is a diagram showing an electrode substrate according to an embodiment of the present invention.

Claims (1)

【特許請求の範囲】 1 絶縁基板上にパターニングされた金属酸化物
からなる透明導電膜の一部の表面上にニツケル−
リン系又はニツケル−ホウ素系の無電解ニツケル
メツキにより金属被膜を形成する工程と、該金属
被膜上に無電解貴金属メツキにより貴金属被膜を
形成する工程とを少なくとも具備することを特徴
とする液晶パネル用電極基板の製造方法。 2 少なくとも1方が透明な絶縁基板上に形成さ
れた透明導電膜をパターニングする工程、パター
ニングされた透明導電膜上にのみ選択的に無電解
ニツケル又はその合金メツキする工程、必要な画
素上のニツケル又はその合金メツキ被膜をエツチ
ングする工程、残された該ニツケル又はその合金
メツキ被膜上に貴金属メツキを施す工程を含むこ
とを特徴とする表示パネルの製造方法。
[Scope of Claims] 1. Nickel on a part of the surface of a transparent conductive film made of a metal oxide patterned on an insulating substrate.
An electrode for a liquid crystal panel, comprising at least the steps of forming a metal film by electroless nickel plating using phosphorus or nickel-boron, and forming a noble metal film on the metal film by electroless noble metal plating. Substrate manufacturing method. 2. A process of patterning a transparent conductive film formed on an insulating substrate, at least one of which is transparent, a process of selectively plating electroless nickel or its alloy only on the patterned transparent conductive film, and plating nickel on necessary pixels. A method for producing a display panel, comprising the steps of etching the nickel or alloy plating film, and plating the remaining nickel or alloy plating film with a precious metal.
JP7885782A 1982-05-10 1982-05-10 Manufacture of display panel Granted JPS58194084A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7885782A JPS58194084A (en) 1982-05-10 1982-05-10 Manufacture of display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7885782A JPS58194084A (en) 1982-05-10 1982-05-10 Manufacture of display panel

Publications (2)

Publication Number Publication Date
JPS58194084A JPS58194084A (en) 1983-11-11
JPH0364869B2 true JPH0364869B2 (en) 1991-10-08

Family

ID=13673492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7885782A Granted JPS58194084A (en) 1982-05-10 1982-05-10 Manufacture of display panel

Country Status (1)

Country Link
JP (1) JPS58194084A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017057484A (en) * 2015-09-18 2017-03-23 石原ケミカル株式会社 Method for forming conductive coating on transparent conductive film

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5463770A (en) * 1977-10-14 1979-05-22 Nippon Telegr & Teleph Corp <Ntt> Electrochromic display plate
JPS556346A (en) * 1978-06-27 1980-01-17 Sharp Kk Electrode pattern and method of forming same
JPS5548935A (en) * 1978-10-03 1980-04-08 Sharp Corp Forming of electrode pattern

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5938068Y2 (en) * 1980-03-27 1984-10-22 株式会社日立製作所 Pattern structure on the board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5463770A (en) * 1977-10-14 1979-05-22 Nippon Telegr & Teleph Corp <Ntt> Electrochromic display plate
JPS556346A (en) * 1978-06-27 1980-01-17 Sharp Kk Electrode pattern and method of forming same
JPS5548935A (en) * 1978-10-03 1980-04-08 Sharp Corp Forming of electrode pattern

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017057484A (en) * 2015-09-18 2017-03-23 石原ケミカル株式会社 Method for forming conductive coating on transparent conductive film

Also Published As

Publication number Publication date
JPS58194084A (en) 1983-11-11

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