JPH0356025A - Ground fault detector - Google Patents
Ground fault detectorInfo
- Publication number
- JPH0356025A JPH0356025A JP18965989A JP18965989A JPH0356025A JP H0356025 A JPH0356025 A JP H0356025A JP 18965989 A JP18965989 A JP 18965989A JP 18965989 A JP18965989 A JP 18965989A JP H0356025 A JPH0356025 A JP H0356025A
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- level
- rectangular wave
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007493 shaping process Methods 0.000 claims abstract description 27
- 238000001514 detection method Methods 0.000 claims description 22
- 230000001934 delay Effects 0.000 claims 1
- 230000001788 irregular Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 15
- 230000003111 delayed effect Effects 0.000 description 3
- 230000010354 integration Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
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- Emergency Protection Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
この発明は交流電路に設けられる地絡検出装置の改良に
関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an improvement of a ground fault detection device provided in an AC power line.
［従来の技術］
従来の地絡検出装置のブロックダイヤグラムを第７図に
、またその動作を示す波形図を第８図（ａ）〜第８図（
ｊ）に示す。地絡により三相電路に第８図（ａ）に示す
波形の電流が流れると、電路Ｐに設けられた零相変流器
２がその電流を検出し、第８図（ｂ）に示す波形の検出
信号が出力される。その出力は波形整形回路４に入力さ
れ、そのレベルが所定の正の閾値Ｔｌｌｌｌｌを越える
と、第６図（ｃ）に示すように、そのレベルが閾値ＴＩ
Ｉ＋ｏを越えている期間に対応する時間幅を有するパル
ス信号が出力される。このパルス信号は積分回路５にお
いて積分され第８図（ｄ）に示す三角波となり、レベル
判別回路６に入力される。そしてこの三角波のレベルが
レベル判別回路６の正の閾値ＴＩＩ＋２を越えると第８
図（ｅ）に示す所定の時間幅の台形の出力が生じる。[Prior Art] A block diagram of a conventional ground fault detection device is shown in FIG. 7, and waveform diagrams showing its operation are shown in FIGS. 8(a) to 8(a).
Shown in j). When a current with the waveform shown in FIG. 8(a) flows through the three-phase electric line due to a ground fault, the zero-phase current transformer 2 installed in the electric line P detects the current, and the waveform shown in FIG. 8(b) is generated. A detection signal is output. The output is input to the waveform shaping circuit 4, and when the level exceeds a predetermined positive threshold Tllllll, as shown in FIG.
A pulse signal having a time width corresponding to the period exceeding I+o is output. This pulse signal is integrated in the integrating circuit 5 to become a triangular wave shown in FIG. 8(d), which is input to the level determining circuit 6. When the level of this triangular wave exceeds the positive threshold TII+2 of the level discrimination circuit 6, the 8th
A trapezoidal output with a predetermined time width as shown in FIG. 3(e) is generated.
この出力はサイリスタ７のゲートに印加されてサイリス
タ７をオンにし、電磁装置８に通電して図示を省略した
機構によりサイリスタに連結された開閉部ｌを作動させ
電路Ｐを遮断する。This output is applied to the gate of the thyristor 7 to turn on the thyristor 7, energizes the electromagnetic device 8, and operates the opening/closing part l connected to the thyristor by a mechanism (not shown) to cut off the electric circuit P.
一方波高値は高いが持続時間の矩いサージ電流等のイン
パルス状の電流が電路に流れたときは、零相変流器２の
両出力端子間に接続されたコンデンサ３によって電流が
吸収されるが、その値が正の閾値ＴＩＩ＋ａを越える場
合にはその期間に対応する時間幅の矩形波出力が生じる
。しかし波形整形回路９の出力波形の時間幅が矩いとき
は積分されたときの彼高値が低くなる。従ってレベル判
別回路６の閾値を適当に設定することによってレベル判
別回路の出力として生じることがなく、サイリスタ７は
オンにならない。On the other hand, when an impulse current such as a surge current with a high peak value but a rectangular duration flows in the electrical circuit, the current is absorbed by the capacitor 3 connected between both output terminals of the zero-phase current transformer 2. However, if the value exceeds the positive threshold value TII+a, a rectangular wave output with a time width corresponding to that period is generated. However, when the time width of the output waveform of the waveform shaping circuit 9 is rectangular, the peak value when integrated becomes low. Therefore, by appropriately setting the threshold value of the level discrimination circuit 6, this will not occur as an output of the level discrimination circuit, and the thyristor 7 will not be turned on.
［発明が解決しようとする課題］
電路にサージ又はノイズ等により、例えば第８図（ｆ）
に示す負の接続時間の長い電流が流れたときは、零相変
流藩２の出力波形はそのインダクタンスにより第８図（
ｇ）に示すように正のレベルの出力が生じる。そして正
の閾値ＴＩＩＩＯを超えた波形の部分において波形成形
回路４の出力は第８図（ｈ）に示す矩形波を生じる。こ
の矩形波は積分回路５において積分されて第８図（＋）
に示す三角波となり、レベル判別回路６の正の閾値ＴＩ
ｌ１２を越えたとき、第８図（ｊ）に示す所定の時間幅
の矩形波出力を生じる。その結果この出力によって前記
地絡電流の場合と同様にサイリスタ７及び電磁装．置が
作動じて開閉部ｌが駆動される。[Problems to be Solved by the Invention] For example, as shown in FIG.
When the negative current with a long connection time shown in Fig.
A positive level output is produced as shown in g). In the portion of the waveform exceeding the positive threshold TIIIO, the output of the waveform shaping circuit 4 produces a rectangular wave as shown in FIG. 8(h). This rectangular wave is integrated in the integrating circuit 5 and is shown in Fig. 8 (+).
The result is a triangular wave as shown in , and the positive threshold TI of the level discrimination circuit 6 is
When it exceeds l12, a rectangular wave output with a predetermined time width shown in FIG. 8(j) is generated. As a result, this output activates the thyristor 7 and the electromagnetic equipment as in the case of the ground fault current. The position is activated and the opening/closing part 1 is driven.
地絡検出装置は地絡が生じたときのみ作動するのが好ま
しく、サージやノイズなどにより不要な動作を生じない
ものでなければならない。It is preferable that the ground fault detection device is activated only when a ground fault occurs, and must not cause unnecessary operation due to surges or noise.
［課題を解決するための手段］
この発明の第１の発明の地絡検出装置は、電路の地絡電
流を零相変流器によって検出し、検出出力の正のレベル
が所定の正の閾値を越えたとき第１の出力端に矩形波出
力を発生し、またその出力の負のレベルが所定の負の閾
値を越えているとき第２の出力端に矩形波出力を発生す
る波形整形回路を備え、第１の出力端の出力を第１の積
分回路により積分し、また第２の出力端の出力を第２の
積分回路により積分し、第１の積分回路の出力レベルが
所定の閾値を越えているとき電路を流れる電流の周期の
２分の１を越える接続時間を有するパルス信号を出力す
る第１のパルス発生回路及び第２の積分回路の出力レベ
ルが所定の閾値を越えたとき電路を流れる電流の周期の
２分の１を越える持続時間を有するパルス信号を出力す
る第２のパルス発生回路を有し、第１のパルス発生器及
び第２のパルス発生回路の出力の論理積を得るアンドゲ
ートを備えている。[Means for Solving the Problems] A ground fault detection device according to a first aspect of the present invention detects a ground fault current in an electrical circuit using a zero-phase current transformer, and the positive level of the detection output is set to a predetermined positive threshold. a waveform shaping circuit that generates a rectangular wave output at a first output terminal when the negative level exceeds a predetermined negative threshold, and generates a rectangular wave output at a second output terminal when the negative level of the output exceeds a predetermined negative threshold. The output of the first output terminal is integrated by the first integrating circuit, the output of the second output terminal is integrated by the second integrating circuit, and the output level of the first integrating circuit is set to a predetermined threshold. When the output level of the first pulse generating circuit and the second integrating circuit, which output a pulse signal having a connection time exceeding one half of the period of the current flowing through the electric circuit, exceeds a predetermined threshold. a second pulse generating circuit that outputs a pulse signal having a duration exceeding one half of the period of the current flowing through the electric circuit, and the logical product of the outputs of the first pulse generator and the second pulse generating circuit It has a gate and a gate.
またこの発明の第２の発明の地絡検出装置は、電路の地
絡電流を零相変流器によって検出し、検出出力の正のレ
ベルが所定の正の閾値を越えているとき第１の出力端に
矩形波出力を発生し、またその出力の負のレベルが所定
の負の閾値を越えたとき第２の出力端に矩形波出力を発
生する波形整形回路を備え、第１の出力端の出力を第１
の積分回路により積分し、また第２の出力端の出力を第
２の積分回路により積分し、第１の積分回路の出力レベ
ルが所定の閾値を越えたとき所定の持続時間を有するパ
ルス信号を出力する第１のバルス発生回路及び第２の積
分回路の出力レベルが所定の閾値を越えているとき所定
の持続時間のパルス信号を出力する第２のパルス発生回
路を備え、第ｌのパルス発生回路の出力パルスを電路を
流れる電流の周期の２分のｌを越える時間遅延回路によ
って遅延させ、第２のパルス発生回路及び遅延回路の出
力の論理積を得るゲートを備えている。In addition, the ground fault detection device according to the second aspect of the present invention detects the ground fault current in the electrical circuit using a zero-phase current transformer, and when the positive level of the detection output exceeds a predetermined positive threshold, the first a waveform shaping circuit that generates a rectangular wave output at an output terminal and generates a rectangular wave output at a second output terminal when the negative level of the output exceeds a predetermined negative threshold; The output of the first
The second integrating circuit integrates the output of the second output terminal, and when the output level of the first integrating circuit exceeds a predetermined threshold, a pulse signal having a predetermined duration is generated. a second pulse generating circuit that outputs a pulse signal of a predetermined duration when the output level of the first pulse generating circuit and the second integrating circuit exceeds a predetermined threshold; The output pulse of the circuit is delayed by a time delay circuit exceeding 1/2 of the period of the current flowing through the electric path, and a gate is provided for obtaining the AND of the outputs of the second pulse generation circuit and the delay circuit.
［作用］
この発明においては、零相変流器の検出信号を正及び負
の成分に分離し、それぞれの戊分を積分した信号がそれ
ぞれの所定の閾値を越えたとき所定持続時間のそれぞれ
のパルス信号を発生させて両信号を同期させ両パルス信
号の論理積をとるので、両成分がともに所定の閾値を越
えかつ所定の時間差を有しているときのみ地籍検出装置
が作動する。[Operation] In this invention, the detection signal of the zero-phase current transformer is separated into positive and negative components, and when the signal obtained by integrating the respective components exceeds the respective predetermined threshold, the respective Since a pulse signal is generated, the two signals are synchronized, and the two pulse signals are ANDed, the cadastral detection device operates only when both components exceed a predetermined threshold and have a predetermined time difference.
［実施例］
本発明の第１の発明の地絡検出装置のブロックダイヤグ
ラムを第１図にまたその動作を示す波形図を第２図（ａ
）〜第２図（ｒ）に示す。地絡により三相電路中に第２
図（ａ＞に示す波形の電流が流れると、電路Ｐに設けら
れた零相変流器２がその電流を検出し、第２図（ｂ）に
示す波形の検出信号が出力される。この検出信号は波形
整形回路９に入力される。波形整形回路９は入力信号の
レベルに対して正の閾値Ｔｉｌｌ及び負の閾値ＴＩ＋２
が設定されており、人力信号の正又は負のレベルがこれ
らの閾値を越えたとき、その閾値を越えている期間に等
しい時間幅のパルス出力を正又は負の端子に涸別に出力
するようになされている。波形整形回路９の正の端子の
出力波形を第２図（ｃ）に、負の端子の出力波形を第２
図（ｒ）に示す。[Example] A block diagram of the ground fault detection device according to the first aspect of the present invention is shown in FIG. 1, and a waveform diagram showing its operation is shown in FIG.
) to FIG. 2(r). Due to a ground fault, a second
When a current with the waveform shown in Fig. 2(a) flows, the zero-phase current transformer 2 provided in the electric circuit P detects the current, and a detection signal with the waveform shown in Fig. 2(b) is output. The detection signal is input to the waveform shaping circuit 9. The waveform shaping circuit 9 sets a positive threshold Till and a negative threshold TI+2 to the level of the input signal.
is set, and when the positive or negative level of the human input signal exceeds these thresholds, a pulse output with a time width equal to the period over which the threshold is exceeded is output to the positive or negative terminal. being done. The output waveform of the positive terminal of the waveform shaping circuit 9 is shown in FIG. 2(c), and the output waveform of the negative terminal is shown in FIG.
Shown in Figure (r).
波形整形回路９の正の端子９ａ及び負の端子９ｂの出力
はそれぞれ積分回路５ａ及び５ｂに入力され積分される
。第２図（ｄ）に積分回路５ａの出力波形を、第２図（
ｇ）に積分回路５の出力波形を示す。The outputs of the positive terminal 9a and negative terminal 9b of the waveform shaping circuit 9 are inputted to integration circuits 5a and 5b, respectively, and integrated. The output waveform of the integrating circuit 5a is shown in FIG. 2(d).
g) shows the output waveform of the integrating circuit 5.
次に積分回路５ａ及び５ｂの出力はそれぞれパルス発生
回路１０ａ及びＩＱｂに入力される。パルス発生回路１
０ａ及び１０ｂは入力レベルに対してそれぞれ所定の閾
値ＴＨ３、Ｔ１１４が設定されており、各入力レベルが
それぞれの閾値を越えると出力を生じるようになされて
いる。パルス発生回路１０ａ及び１０ｂの出力の持続時
間は地絡検出装置を適用する電路の地絡電流の周朋の２
分の１よりも長い時間に設定される。その波形をそれぞ
れ第２図（ａ）及び第２図（ｈ）に示す。Next, the outputs of integrating circuits 5a and 5b are input to pulse generating circuits 10a and IQb, respectively. Pulse generation circuit 1
For 0a and 10b, predetermined threshold values TH3 and T114 are respectively set for the input level, and an output is generated when each input level exceeds the respective threshold value. The duration of the output of the pulse generation circuits 10a and 10b is 2 times the frequency of the ground fault current of the electrical circuit to which the ground fault detection device is applied.
It is set to a time longer than one minute. The waveforms are shown in FIG. 2(a) and FIG. 2(h), respectively.
これらの出力はアンド回路１２に入力されるが、第２図
（ｅ）及び（ｈ）に示すように時間ｔの期間中は両者と
も出力されているのでアンド回路１２は出力を生ずる。These outputs are input to the AND circuit 12, but as shown in FIGS. 2(e) and 2(h), since both are output during the time period t, the AND circuit 12 produces an output.
この出力はサイリスタ７のゲートに印加され、サイリス
タ７をオンにする。その結果電磁装置８に図示を省略し
た電源から電力が与えられ図示を省略した機構を介して
遮断機開閉装置ｌを開離する。This output is applied to the gate of thyristor 7, turning it on. As a result, electric power is applied to the electromagnetic device 8 from a power source (not shown), and the circuit breaker switching device 1 is opened via a mechanism (not shown).
一方電路に例えば第２図（ｊ）に示すような雷サージ電
流が流れた場合には、零相変流器２は第２図（ｋ）に示
す波形の出力を生じる。この出力は波形整形回路９によ
り前記地絡電流の場合と同様に整形され、正の端子には
第２図（．１）、負の端子には第２図（ｏ＞に示す波形
の信号がそれぞれ出力される。On the other hand, when a lightning surge current as shown in FIG. 2(j) flows in the electrical path, the zero-phase current transformer 2 produces an output with a waveform shown in FIG. 2(k). This output is shaped by the waveform shaping circuit 9 in the same way as the ground fault current, and the positive terminal receives a signal with the waveform shown in Figure 2 (.1) and the negative terminal receives a signal with the waveform shown in Figure 2 (o>). Each is output.
両信号はそれぞれの積分回路５ａ又は５ｂにより積分さ
れ、それぞれ第２図（ｍ）及び第２図（ｐ＞に示す波形
の出力が得られる。これらの出力はそれぞれのパルス発
生回路１０ａ， ＩＯｂに入力されるが、パルス発生回
路１０ａの入力レベルはその閾値ＴＩ＋３に達していな
いのでパルス発生回路１０ａは第２図（ｎ）に示すよう
に出力を生じない。一方パルス発生回路１０ｂは第２図
（ｑ）に示す出力を生じる。これらの出力力を生じず、
従ってサイリスタ７はオンにならない。Both signals are integrated by the respective integrating circuits 5a and 5b, and outputs having the waveforms shown in FIG. 2(m) and FIG. 2(p>) are obtained respectively. However, since the input level of the pulse generating circuit 10a has not reached its threshold value TI+3, the pulse generating circuit 10a does not produce an output as shown in FIG. Produces the output shown in (q).Does not produce these output forces,
Therefore, thyristor 7 does not turn on.
すなわち第２図（ｊ）に示すような波形の雷サージ等に
よっては本発明の地絡検出装置は動作しない。That is, the ground fault detection device of the present invention does not operate due to a lightning surge or the like having a waveform as shown in FIG. 2(j).
第３図に波形整形回路４の実際の回路例を示す。FIG. 3 shows an actual circuit example of the waveform shaping circuit 4.
図において、トランジスタ１２−１． １２−２及び定
電流源１２−３によって一般的な差動増幅器を構威し、
両トランジスタ１２−１． １２−２のベース間に零相
変流器２の両端が接続されている。トランジスタ１２−
１． １２−２のそれぞれのコレクタはレベル判別回路
１３． １４のそれぞれの入力端子に接続されている。In the figure, transistors 12-1. 12-2 and constant current source 12-3 constitute a general differential amplifier,
Both transistors 12-1. Both ends of the zero-phase current transformer 2 are connected between the bases of the transformer 12-2. Transistor 12-
1. Each collector of 12-2 is connected to a level discrimination circuit 13. 14 input terminals.
レベル判別回路１３．１４は例えば所定のエミッタバイ
アス重圧を与えた増幅回路等が用いられる。The level determination circuits 13 and 14 are, for example, amplifier circuits that apply a predetermined emitter bias pressure.
第４図（ａ）は波形整形回路９の池の具体例を示す回路
図である。図において、零相変流器２の正のレベルの出
力は、トランジスタ２１−１． ２１−２及び２ｌ−３
．ダイオード２ｌ−４及び定電流ａ；ｉ２ｘ−ｓにより
構成される高利得のＪ曽幅２ｘ２１により均幅整形され
、トランジスタ２ｌ−２のコレクタから第２図（Ｃ）に
示す波形の出力が得られる。FIG. 4(a) is a circuit diagram showing a specific example of the waveform shaping circuit 9. In FIG. In the figure, the positive level output of zero-phase current transformer 2 is connected to transistors 21-1. 21-2 and 2l-3
．． The width is uniformly shaped by the high gain J width 2x21 composed of the diode 2l-4 and the constant current a; i2x-s, and the output of the waveform shown in FIG. .
また零相変流器の負のレベルの出力は、トランジスタ２
２−１． ２２−２，及び２２−３，ダイオード２２−
４及び定電流源２２−５により構或される高利得の増幅
器２２によって増幅整形され、トランジスタ２２−２の
コレクタから第２図Ｕ＞に示す波形の出力が得られる。In addition, the negative level output of the zero-phase current transformer is connected to transistor 2.
2-1. 22-2, and 22-3, diode 22-
The signal is amplified and shaped by a high gain amplifier 22 constituted by a constant current source 22-5 and a constant current source 22-5, and an output having a waveform shown in FIG. 2 is obtained from the collector of the transistor 22-2.
第４図に示す波形整形回路９においては、トランジスタ
２１−１のベースのバイアスを設定する抵抗２３及び２
４と入力オフセット電圧を利用した１戊抗２５により閾
値Ｔｌｌｌ及びＴＩ＋２が設定される。In the waveform shaping circuit 9 shown in FIG.
4 and 1 resistor 25 using the input offset voltage, the threshold values Tllll and TI+2 are set.
本発明の第２の発明の地絡検出装置のブロックダイヤグ
ラムを第５図に、またその動作を示す波形図を第６図（
ａ）〜第６図（０に示す。図において、波形整形回路９
、積分回路５ａ及び５ｂ、及びアンド４ｇ
ｌ２に関しては第１の発明と同等である。この発明にお
いては、パルス発生回路１０ａ及び１０ｂはその人力レ
ベルがそれぞれ閾値ＴＩ１３，ＴＨ４を越えたとき入力
レベルの大きさに無関係に電路の電流の周期の約４分の
１の持続時間の矩形波信号を出力する。この波形を第６
図（ｅ）及び第６図（＋）に示す。A block diagram of the ground fault detection device according to the second aspect of the present invention is shown in FIG. 5, and a waveform diagram showing its operation is shown in FIG.
a) to FIG. 6 (shown in 0. In the figure, the waveform shaping circuit 9
, integrating circuits 5a and 5b, and AND4g l2 are equivalent to the first invention. In this invention, the pulse generating circuits 10a and 10b generate a rectangular wave with a duration of about one-quarter of the period of the current in the electric circuit, regardless of the magnitude of the input level, when the human power level exceeds the threshold value TI13, TH4, respectively. Output a signal. This waveform is the 6th
It is shown in Figure (e) and Figure 6 (+).
次にパルス発生回路１０ａの出力は遅延回路ｌ１に入力
される。遅延回路１１において、第６図ｍに示すように
、パルス発生回路１０ａの出力（第６図（ｅ））は前記
電路の電流の周期の２分の１の時間遅延される。その結
果遅延回路１１の出力（第６図《ｆ〉）とパルス発生回
路１０ｂの出力（第６図（ｉ））のタイミングが一致し
、アンド回路１２に印加されてアンド出力が生じる。以
後の動作は第１の発明と同等である。Next, the output of the pulse generating circuit 10a is input to the delay circuit l1. In the delay circuit 11, as shown in FIG. 6m, the output of the pulse generating circuit 10a (FIG. 6(e)) is delayed by one half of the period of the current in the electric circuit. As a result, the timings of the output of the delay circuit 11 (FIG. 6(f)) and the output of the pulse generating circuit 10b (FIG. 6(i)) match, and are applied to the AND circuit 12 to produce an AND output. The subsequent operation is equivalent to the first invention.
第２の発明の地絡検出装置において、第６図（ｋ）に示
す雷サージによるインパルスが入力されると、零相変流
器２は第６図（１〉に示す波形の出力を生じる。この出
力が波形或形回路９に入力されて、第６図（ｍ）及び第
６図（ｑ）に示す波形の出力が得られる。これらの出力
はそれぞれの積分回路Ｓａ， ５ｂにより積分されて第
６図（ｎ）及び第６図（ｒ）に示す波形の出力を生じる
。積分回路５ａ， ５ｂの出力はそれぞれのパルス発生
回路１０ａ，Ｊｏｂに入力され前記約４分の１周期の持
続時間の第６図（ｏ）及び第６図（ｓ）に示す波形の出
力を生じる。In the ground fault detection device of the second invention, when an impulse due to a lightning surge shown in FIG. 6(k) is input, the zero-phase current transformer 2 produces an output with a waveform shown in FIG. 6(1). This output is input to the waveform shaping circuit 9, and outputs having the waveforms shown in FIG. 6(m) and FIG. 6(q) are obtained.These outputs are integrated by the respective integrating circuits Sa and 5b. Outputs having the waveforms shown in FIG. 6(n) and FIG. 6(r) are generated.The outputs of the integrating circuits 5a and 5b are inputted to the respective pulse generating circuits 10a and Job, and the duration of the approximately one-fourth cycle is The output waveforms shown in FIGS. 6(o) and 6(s) are produced.
次にパルス発生回路１０ａの出力は遅延回路ｌ１によっ
て約２分の１週期遅延される。遅延回路１１の出力波形
を第６図（ｐ）に示す。図から明らかなように遅延回路
ｌ１の出力（第６図（ｐ））とパルス発生回路Ｊｏｂの
出力（第６図（Ｓ））はタイミングが一致していないの
で、両出力がアンド回路ｌ２に印加されてもアンド出力
は生じない。以上説明の通りこの発明においても第６図
（ｋ）に示すような不規則なインパルス入力によっては
地絡検出装置は動作しない。Next, the output of the pulse generating circuit 10a is delayed by about 1/2 week by the delay circuit l1. The output waveform of the delay circuit 11 is shown in FIG. 6(p). As is clear from the figure, the timings of the output of the delay circuit l1 (Fig. 6 (p)) and the output of the pulse generation circuit Job (Fig. 6 (S)) do not match, so both outputs are sent to the AND circuit l2. Even if this voltage is applied, an AND output will not occur. As explained above, in this invention as well, the ground fault detection device does not operate due to irregular impulse inputs as shown in FIG. 6(k).
［発明の効果］
この発明の第１及び第２の発明においては、零相変流器
（２）によって検出された信号の正及び負の成分に基づ
く信号を所定の閾値を有する波形整形回路で個別に検出
し、両信号の積分された出力が所定のレベル以上でかつ
タイミングが一致する場合のみ地絡が生じたと判定する
ので、雷サージによるインパルスなど正負のレベルが著
しく先なる場合には地絡であると１′１１足せず遮断２
ｇを作動させない。[Effects of the Invention] In the first and second aspects of the present invention, a waveform shaping circuit having a predetermined threshold is used to generate a signal based on the positive and negative components of the signal detected by the zero-phase current transformer (2). They are detected individually, and it is determined that a ground fault has occurred only when the integrated output of both signals is above a predetermined level and the timing matches, so if the positive and negative levels are significantly ahead of each other, such as an impulse caused by a lightning surge, the ground fault is detected. If there is a connection, 1'11 is not added and the interruption is 2
g is not activated.
第１図は第１の発明のブロノクダイヤグラム、第２図（
ａ）〜第２図（ｒ）は第１の発明の動作を示す皐
波形図、第３図は波形整形回路の具体的な回路桝、０
第４図は波形整形回路の他の具体的な回路例、第５図は
第２の発明のブロノクダイヤグラム、第６図（ａ）〜第
６図（１）は第２の発明の動作を示す波形図、第７図は
従来の地絡検出装置のブロノクダイヤグラム、第８図（
ａ）〜第８図（ｊ）は従来の地絡検出装置の動作を示す
波形図である。
図中、２は零相変流器、９は波形整形回路、５ａ及び５
ｂは積分回路、１０ａ及びＩＯｂはパルス発生回路、Ｉ
Ｉは遅延回路である。Figure 1 is the Bronok diagram of the first invention, Figure 2 (
Figures a) to 2(r) are waveform diagrams showing the operation of the first invention, Figure 3 is a concrete circuit diagram of the waveform shaping circuit, and Figure 4 is another concrete diagram of the waveform shaping circuit. Circuit example: Figure 5 is a Bronnoch diagram of the second invention, Figures 6(a) to 6(1) are waveform diagrams showing the operation of the second invention, and Figure 7 is conventional ground fault detection. Bronok diagram of the device, Figure 8 (
a) to FIG. 8(j) are waveform diagrams showing the operation of a conventional ground fault detection device. In the figure, 2 is a zero-phase current transformer, 9 is a waveform shaping circuit, 5a and 5
b is an integration circuit, 10a and IOb are pulse generation circuits, I
I is a delay circuit.
Claims (2)
器の出力が入力され、その出力の正のレベルが所定の正
の閾値を越えているとき、その越えている期間に対応す
る時間幅の矩形波出力を第１の出力端に出力し、またそ
の出力の負のレベルが所定の負の閾値を越えているとき
、その越えている期間に対応する時間幅の矩形波出力を
第２の出力端に出力する波形整形回路、 第１の出力端に接続されその矩形波出力を積分する第１
の積分回路、 第２の出力端に接続されその矩形波出力を積分する第２
の積分回路、 第１の積分回路の出力が入力され、その出力レベルが所
定の閾値を越えたとき電路を流れる電流の周期の２分の
１を越える持続時間を有するパルス信号を出力する第１
のパルス発生回路、 第２の積分回路の出力が入力され、その出力レベルが所
定の閾値を越えたとき電路を流れる電流の周期の２分の
１を越える持続時間を有するパルス信号を出力する第２
のパルス発生回路、及び第１のパルス発生回路器及び第
２のパルス発生回路の出力の論理積を得るアンドゲート
、 を備える地絡検出回路。(1) When the output of a zero-phase current transformer or zero-phase current transformer that detects a ground fault current in an electrical circuit is input, and the positive level of the output exceeds a predetermined positive threshold, the A rectangular wave output with a time width corresponding to the period is output to the first output terminal, and when the negative level of the output exceeds a predetermined negative threshold, a rectangular wave output with a time width corresponding to the exceeding period is output. a waveform shaping circuit that outputs a rectangular wave output to a second output terminal; a first waveform shaping circuit that is connected to the first output terminal and integrates the rectangular wave output;
a second integrating circuit connected to the second output terminal and integrating the rectangular wave output.
a first integrating circuit which receives the output of the first integrating circuit and outputs a pulse signal having a duration exceeding one half of the period of the current flowing through the electric circuit when the output level thereof exceeds a predetermined threshold;
a pulse generating circuit, which receives the output of the second integrating circuit and outputs a pulse signal having a duration exceeding one half of the period of the current flowing through the electric circuit when the output level thereof exceeds a predetermined threshold; 2
A ground fault detection circuit comprising: a pulse generating circuit; and an AND gate for obtaining a logical product of the outputs of the first pulse generating circuit and the second pulse generating circuit.
器の出力が入力され、その出力の正のレベルが所定の正
の閾値を越えているとき、その越えている期間に対応す
る時間幅の矩形波出力を第１の出力端に出力し、またそ
の出力の負のレベルが所定の負の閾値を越えているとき
、その越えている期間に対応する時間幅の矩形波出力を
第２の出力端に出力する波形整形回路、 第１の出力端に接続されその矩形波出力を積分する第１
の積分回路、 第２の出力端に接続されその矩形波出力を積分する第２
の積分回路、 第１の積分回路の出力が入力され、その出力レベルが所
定の閾値を越えたとき所定の接続時間のパルス信号を出
力する第１のパルス発生回路、第２の積分回路の出力が
入力され、その出力レベルが所定の閾値を越えたとき所
定の持続時間のパルス信号を出力する第２のパルス発生
回路、第１のパルス発生回路の出力パルスを電路を流れ
る電流の周期の２分の１を越える時間遅延させる遅延回
路、及び 第２のパルス発生器及び遅延回路の出力の論理積を得る
アンドゲート、 を備える地絡検出回路。(2) When the output of a zero-phase current transformer or zero-phase current transformer that detects a ground fault current in an electrical circuit is input, and the positive level of the output exceeds a predetermined positive threshold, the A rectangular wave output with a time width corresponding to the period is output to the first output terminal, and when the negative level of the output exceeds a predetermined negative threshold, a rectangular wave output with a time width corresponding to the exceeding period is output. a waveform shaping circuit that outputs a rectangular wave output to a second output terminal; a first waveform shaping circuit that is connected to the first output terminal and integrates the rectangular wave output;
a second integrating circuit connected to the second output terminal and integrating the rectangular wave output.
an integrator circuit, a first pulse generation circuit that receives the output of the first integrator circuit, outputs a pulse signal with a predetermined connection time when the output level exceeds a predetermined threshold value, and an output of the second integrator circuit. is input, and when the output level exceeds a predetermined threshold, a second pulse generating circuit outputs a pulse signal of a predetermined duration. A ground fault detection circuit comprising: a delay circuit that delays the time by more than a factor of 1; and an AND gate that obtains a logical product of the outputs of the second pulse generator and the delay circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18965989A JPH07108055B2 (en) | 1989-07-21 | 1989-07-21 | Ground fault detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18965989A JPH07108055B2 (en) | 1989-07-21 | 1989-07-21 | Ground fault detector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0356025A true JPH0356025A (en) | 1991-03-11 |
| JPH07108055B2 JPH07108055B2 (en) | 1995-11-15 |
Family
ID=16245023
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18965989A Expired - Lifetime JPH07108055B2 (en) | 1989-07-21 | 1989-07-21 | Ground fault detector |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07108055B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1446675A2 (en) * | 2001-10-24 | 2004-08-18 | Schweitzer Engineering Laboratories, Inc. | Determining electrical faults on undergrounded power systems using directional element |
| JP2012200052A (en) * | 2011-03-18 | 2012-10-18 | Panasonic Corp | Leak determination device |
-
1989
- 1989-07-21 JP JP18965989A patent/JPH07108055B2/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1446675A2 (en) * | 2001-10-24 | 2004-08-18 | Schweitzer Engineering Laboratories, Inc. | Determining electrical faults on undergrounded power systems using directional element |
| EP1446675A4 (en) * | 2001-10-24 | 2005-07-20 | Schweitzer Engineering Lab Inc | Determining electrical faults on undergrounded power systems using directional element |
| JP2012200052A (en) * | 2011-03-18 | 2012-10-18 | Panasonic Corp | Leak determination device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07108055B2 (en) | 1995-11-15 |
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