JPH0350338U - - Google Patents
Info
- Publication number
- JPH0350338U JPH0350338U JP1989110098U JP11009889U JPH0350338U JP H0350338 U JPH0350338 U JP H0350338U JP 1989110098 U JP1989110098 U JP 1989110098U JP 11009889 U JP11009889 U JP 11009889U JP H0350338 U JPH0350338 U JP H0350338U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- substrate
- mounted semiconductor
- view
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図は本考案による表面実装型半導体装置の
一実施例を示し、Aは平面図、Bは側面図、Cは
背面図である。第2図は従来の表面実装型半導体
装置の一例を示し、Aは平面図、Bは側面図、C
は背面図である。 10……表面実装型半導体装置、11……基板
、11a,11b……スルーホール、12……導
電パターン、13……LEDチツプ、14……樹
脂モールド部、15……アノード、16……カソ
ード、17……フオトレジスト被覆部。
一実施例を示し、Aは平面図、Bは側面図、Cは
背面図である。第2図は従来の表面実装型半導体
装置の一例を示し、Aは平面図、Bは側面図、C
は背面図である。 10……表面実装型半導体装置、11……基板
、11a,11b……スルーホール、12……導
電パターン、13……LEDチツプ、14……樹
脂モールド部、15……アノード、16……カソ
ード、17……フオトレジスト被覆部。
Claims (1)
- 【実用新案登録請求の範囲】 両端にスルーホールが形成された基板上に半導
体素子のチツプを取り付けた表面実装型半導体装
置において、 上記基板両端部のいずれかが、上記スルーホー
ル周辺の接点部を除いた領域において、フオトレ
ジストにより被覆されていることを特徴とする表
面実装型半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989110098U JPH0350338U (ja) | 1989-09-20 | 1989-09-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989110098U JPH0350338U (ja) | 1989-09-20 | 1989-09-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0350338U true JPH0350338U (ja) | 1991-05-16 |
Family
ID=31658650
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1989110098U Pending JPH0350338U (ja) | 1989-09-20 | 1989-09-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0350338U (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11163409A (ja) * | 1997-12-01 | 1999-06-18 | Matsushita Electron Corp | 発光装置 |
JP2004014857A (ja) * | 2002-06-07 | 2004-01-15 | Stanley Electric Co Ltd | チップタイプ光半導体素子 |
JP2016015356A (ja) * | 2014-06-30 | 2016-01-28 | 日亜化学工業株式会社 | 発光装置及びその製造方法 |
JP2016086047A (ja) * | 2014-10-24 | 2016-05-19 | 日亜化学工業株式会社 | 発光装置の製造方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61134040A (ja) * | 1984-12-04 | 1986-06-21 | Fuji Dengiyou Kk | 半導体素子の製法 |
-
1989
- 1989-09-20 JP JP1989110098U patent/JPH0350338U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61134040A (ja) * | 1984-12-04 | 1986-06-21 | Fuji Dengiyou Kk | 半導体素子の製法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11163409A (ja) * | 1997-12-01 | 1999-06-18 | Matsushita Electron Corp | 発光装置 |
JP2004014857A (ja) * | 2002-06-07 | 2004-01-15 | Stanley Electric Co Ltd | チップタイプ光半導体素子 |
JP2016015356A (ja) * | 2014-06-30 | 2016-01-28 | 日亜化学工業株式会社 | 発光装置及びその製造方法 |
JP2016086047A (ja) * | 2014-10-24 | 2016-05-19 | 日亜化学工業株式会社 | 発光装置の製造方法 |