JPH034473A - Terminal device for measuring property of semiconductor device - Google Patents

Terminal device for measuring property of semiconductor device

Info

Publication number
JPH034473A
JPH034473A JP1138707A JP13870789A JPH034473A JP H034473 A JPH034473 A JP H034473A JP 1138707 A JP1138707 A JP 1138707A JP 13870789 A JP13870789 A JP 13870789A JP H034473 A JPH034473 A JP H034473A
Authority
JP
Japan
Prior art keywords
terminal
semiconductor device
metal plate
strip line
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1138707A
Other languages
Japanese (ja)
Inventor
Tetsuya Onuma
哲也 大沼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamagata Ltd
Original Assignee
NEC Yamagata Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamagata Ltd filed Critical NEC Yamagata Ltd
Priority to JP1138707A priority Critical patent/JPH034473A/en
Publication of JPH034473A publication Critical patent/JPH034473A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Connecting Device With Holders (AREA)

Abstract

PURPOSE:To measure properties of a semiconductor device at high frequency band by forming a terminal using a metal plate, and passing a connecting pin through a through hole provided at a property measuring base and electrically connecting the pin to a strip line provided on the reverse face of the base, the pin protruding from the reverse face of the metal plate. CONSTITUTION:A metal plate which makes electrical contact with the outside lead of a semiconductor device is disposed on a property measuring base 1, and a through hole 2 is provided through that portion of the base 1 where a terminal is formed, and also a strip line 3 is formed on the reverse face in such a manner that it faces the through hole 2. The terminal 4 is formed of a metal plate of low resistance, and a connecting pin 5 is integrally and protrusively formed on the reverse face, and the connecting pin 5 is passed through the through hole 2 of the property measuring base 1 and is soldered to the strip line 3 provided on the reverse face with solder 6. The outside lead of the semiconductor device to be measured is brought into contact with the terminal 4 and the strip line 3 is passed and then electricity is transmitted. Measuring of properties can thus be carried out.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の電気的特性を測定する際に半導体
装置の外部リードに電気的接続を行うために用いる測定
用ターミナル装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a measuring terminal device used for electrically connecting external leads of a semiconductor device when measuring the electrical characteristics of the semiconductor device.

〔従来の技術〕[Conventional technology]

一般に、半導体装置の電気的特性を測定する際には、半
導体装置の外部リードを測定用基板に設けたターミナル
に電気的に接続し、この測定用基板を通して半導体装置
に通電を行っている。従来、この種の測定用ターミナル
装置としては、例えば第2図(a)及び(b)にその平
面図及びB−B線断面図を示すように、測定用基板11
の上にICソケット12を取付け、このICソケット1
2のリードピン12aを基板の裏面に設けたストリップ
ライン13に半田付けする等して接続したものが用いて
られている。
Generally, when measuring the electrical characteristics of a semiconductor device, external leads of the semiconductor device are electrically connected to terminals provided on a measurement substrate, and current is applied to the semiconductor device through the measurement substrate. Conventionally, this type of measuring terminal device has a measuring board 11, as shown in FIGS.
Attach the IC socket 12 on top of this IC socket 1.
Two lead pins 12a are connected to a strip line 13 provided on the back surface of the board by soldering or the like.

このターミナル装置では、測定する半導体装置の外部リ
ードをICソケット12に挿入させることで、電気的接
続が実現できる。
In this terminal device, electrical connection can be achieved by inserting the external leads of the semiconductor device to be measured into the IC socket 12.

また、他の例として、第3図(a)及び(b)にその平
面図及びC−C線断面図を示すように、測定用基板11
の表面に薄膜導体で電極パターン14をエツチング加工
し、この電極パターン14をスルーホール15を通して
裏面のストリップライン13に接続したものがある。
In addition, as another example, as shown in FIGS. 3(a) and 3(b), a plan view and a sectional view taken along the line C--C, the measurement substrate 11
There is one in which an electrode pattern 14 is etched with a thin film conductor on the front surface, and this electrode pattern 14 is connected to the strip line 13 on the back surface through a through hole 15.

このターミナル装置では、半導体装置の外部す−ドを電
極パターン14に接触させて電気的接続を行っている。
In this terminal device, the external board of the semiconductor device is brought into contact with the electrode pattern 14 for electrical connection.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のターミナル装置において、第2図に示し
たICソケット12を用いる構成では、高周波帯域での
使用に際して、ICソケット12自体の高周波における
容量やインダクタンスが問題となり、正確な特性測定を
行うためには上限周波数に限界があり、かつ特性測定系
とのインピーダンス整合を取るのが難しいという問題が
ある。
In the conventional terminal device described above, in the configuration using the IC socket 12 shown in FIG. 2, when used in a high frequency band, the capacitance and inductance of the IC socket 12 itself at high frequencies becomes a problem, so it is necessary to measure the characteristics accurately. There is a problem that there is a limit to the upper limit frequency and that it is difficult to match the impedance with the characteristic measurement system.

また、第3図に示したエツチング加工された電極パター
ン14を用いる構成では、電極パターン14の接触衝撃
に対する耐久性が低いために、使用頻度の増加に伴って
電極パターン14の摩耗が進行し、電気的接続の不良を
まねき易い、このため、頻繁に新しい特性測定用基板を
作成交換しなければならないという問題がある。
In addition, in the configuration using the etched electrode pattern 14 shown in FIG. 3, since the electrode pattern 14 has low durability against contact impact, the electrode pattern 14 wears out as the frequency of use increases. There is a problem in that it is easy to cause electrical connection defects, and therefore new characteristic measurement boards must be frequently created and replaced.

本発明は高周波帯での使用を可能にし、がっ耐久性に優
れた特性測定用ターミナル装置を提供することを目的と
する。
An object of the present invention is to provide a terminal device for measuring characteristics that can be used in a high frequency band and has excellent durability.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の特性測定用ターミナル装置は、半導体装置の外
部リードに電気的に接触される金属板を特性測定用基板
に配設し、この金属板の裏面に突出した接続ピンを特性
測定用基板に設けた透孔を貫通させ、かつ該基板裏面に
設けたストリップラインに電気的に接続した構成として
いる。
In the characteristic measuring terminal device of the present invention, a metal plate that is electrically contacted with an external lead of a semiconductor device is arranged on a characteristic measuring board, and a connecting pin protruding from the back side of this metal plate is attached to the characteristic measuring board. The structure is such that it is passed through a provided through hole and electrically connected to a strip line provided on the back surface of the substrate.

〔作用〕[Effect]

この構成では、ターミナルを金属板で構成するために容
量やインダクタンスを少なくでき、高周波帯での特性測
定を可能とする。また、ターミナルの摩耗を低減して耐
久性を向上させ、かつ特性測定用基板の作成交換を不要
にする。
With this configuration, since the terminal is made of a metal plate, the capacitance and inductance can be reduced, making it possible to measure characteristics in a high frequency band. It also reduces terminal wear, improves durability, and eliminates the need to create and replace characteristic measurement boards.

〔実施例〕〔Example〕

次に、本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例であり、同図(a)は平面図
、同図(b)はそのA−A線に沿う断面図、同図(C)
はターミナルの斜視図である。これらの図において、1
は特性測定用基板であり、ターミナル形成箇所には透孔
2を開設するとともに、裏面にはこの透孔2に臨んでス
トリップライン3を形成している。一方、ターミル4は
、低抵抗の金属板で構成し、その裏面には1本以上、こ
こでは2本の接続ピン5を一体に突出形成している。こ
のターミナル4は、例えば真鍮、ニッケル等の金属板を
所要形状に形成し、かつ表面に金めつきを施しである。
FIG. 1 shows an embodiment of the present invention; FIG. 1(a) is a plan view, FIG. 1(b) is a sectional view taken along the line A-A, and FIG.
is a perspective view of the terminal. In these figures, 1
1 is a substrate for measuring characteristics, in which a through hole 2 is opened at the terminal formation location, and a strip line 3 is formed on the back surface facing the through hole 2. On the other hand, the terminal 4 is made of a low-resistance metal plate, and one or more, in this case two, connecting pins 5 are integrally formed on the back surface of the terminal 4 to protrude. This terminal 4 is made of a metal plate made of, for example, brass or nickel, formed into a desired shape, and the surface is plated with gold.

或いは、銅板を用いて表面に錫めっきを施しである。そ
して、板厚は1.01程度とし、1.2閣以下の長さに
形成している。
Alternatively, a copper plate is used and the surface is tin-plated. The thickness of the plate is approximately 1.01 mm, and the length is 1.2 mm or less.

そして、ターミナル4に設けた接続ピン5を、特性測定
用基板lの透孔2を貫通させ、裏面のストリップライン
3に半田6で半田付けしている。
Then, a connecting pin 5 provided on the terminal 4 is passed through the through hole 2 of the characteristic measurement board l, and is soldered to the strip line 3 on the back surface with solder 6.

このように構成した上で、測定を行う半導体装置の外部
リードをターミナル4に接触させ、ストリップライン3
を通して通電することで、特性の測定を実行する。
With this configuration, the external lead of the semiconductor device to be measured is brought into contact with the terminal 4, and the strip line 3 is connected.
Measurement of characteristics is carried out by applying current through the capacitor.

したがって、このターミナル4では、ICソケットに比
較してターミナル自身の容量やインダクタンスは少なく
でき、優れた高周波特性での特性測定が可能となる。ま
た、電極パターン等に比較してターミナル4の耐摩耗性
が増大でき、長時間連続の特性測定においても電気的接
続不良が生じることはなく、しかもターミナルの交換が
必要とされる場合でも、ターミナル4のみを交換すれば
よく、新たに特性測定用基板を作成交換する必要がない
Therefore, in this terminal 4, the capacitance and inductance of the terminal itself can be reduced compared to an IC socket, and it is possible to measure characteristics with excellent high frequency characteristics. In addition, the wear resistance of the terminal 4 can be increased compared to electrode patterns, etc., and electrical connection failures will not occur even during long-term continuous characteristic measurements.Furthermore, even if the terminal needs to be replaced, the terminal 4 only needs to be replaced, and there is no need to create and replace a new board for characteristic measurement.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ターミナルを金属板で構
成し、この金属板の裏面に突出した接続ピンを特性測定
用基板に設けた透孔を貫通させて裏面のストリップライ
ンに電気的に接続しているので、ターミナル自身の容量
やインダクタンスを少なくでき、高周波帯での特性測定
を可能にする。
As explained above, in the present invention, a terminal is constructed of a metal plate, and a connecting pin protruding from the back side of this metal plate is passed through a through hole provided in a characteristic measurement board to be electrically connected to a strip line on the back side. This allows the capacitance and inductance of the terminal itself to be reduced, making it possible to measure characteristics in a high frequency band.

また、ターミナルの摩耗を低減して耐久性を向上させ、
かつ長時間連続測定に際しての特性測定用基板の作成交
換を不要にできる効果がある。
It also reduces terminal wear and improves durability.
Moreover, there is an effect that it is not necessary to create and replace the substrate for characteristic measurement during long-term continuous measurement.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示しており、同図(a)は
平面図、同図(b)はそのA−A線に沿う断面図、同図
(c)はターミナルの斜視図、第2図は従来のターミナ
ルの一例を示しており、同図(a)は平面図、同図(b
)はそのB−B線に沿う断面図、第3図は従来のターミ
ナルの他の例を示しており、同図(a)は平面図、同図
(b)はそのC−C線に沿う断面図である。 1・・・測定用基板、2・・・透孔、3・・・ストリッ
プライン、4・・・ターミナル、5・・・接続ピン、6
・・・半田、11・・・測定用基板、12・・・ソケッ
ト、13・・・ストリップライン、14・・・電極パッ
ド、■5・・・スルーホール。 (a) 第 第3 (1))
FIG. 1 shows an embodiment of the present invention; FIG. 1(a) is a plan view, FIG. 1(b) is a sectional view taken along line A-A, and FIG. 1(c) is a perspective view of the terminal. , Figure 2 shows an example of a conventional terminal, where (a) is a plan view and (b) is a plan view.
) is a sectional view taken along the line B-B, and Figure 3 shows another example of the conventional terminal, where (a) is a plan view and (b) is a cross-sectional view taken along the line C-C. FIG. 1...Measurement board, 2...Through hole, 3...Strip line, 4...Terminal, 5...Connection pin, 6
...Solder, 11...Measurement board, 12...Socket, 13...Strip line, 14...Electrode pad, ■5...Through hole. (a) Section 3 (1))

Claims (1)

【特許請求の範囲】[Claims] 1、特性測定が行われる半導体装置の外部リードに電気
的に接触して該半導体装置に通電を行うための特性測定
用基板に、前記半導体装置の外部リードに電気的に接触
される金属板を配設し、この金属板の裏面に突出した接
続ピンを前記特性測定用基板に設けた透孔を貫通させ、
かつ該基板裏面に設けたストリップラインに電気的に接
続したことを特徴とする半導体装置の特性測定用ターミ
ナル装置。
1. A metal plate that is in electrical contact with the external leads of the semiconductor device is attached to a characteristic measurement substrate for electrically contacting the external leads of the semiconductor device whose characteristics are to be measured and energizing the semiconductor device. A connection pin protruding from the back surface of the metal plate is passed through a through hole provided in the characteristic measurement substrate,
A terminal device for measuring characteristics of a semiconductor device, characterized in that the terminal device is electrically connected to a strip line provided on the back surface of the substrate.
JP1138707A 1989-05-31 1989-05-31 Terminal device for measuring property of semiconductor device Pending JPH034473A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1138707A JPH034473A (en) 1989-05-31 1989-05-31 Terminal device for measuring property of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1138707A JPH034473A (en) 1989-05-31 1989-05-31 Terminal device for measuring property of semiconductor device

Publications (1)

Publication Number Publication Date
JPH034473A true JPH034473A (en) 1991-01-10

Family

ID=15228249

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1138707A Pending JPH034473A (en) 1989-05-31 1989-05-31 Terminal device for measuring property of semiconductor device

Country Status (1)

Country Link
JP (1) JPH034473A (en)

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