JPH0343728Y2 - - Google Patents
Info
- Publication number
- JPH0343728Y2 JPH0343728Y2 JP1985168300U JP16830085U JPH0343728Y2 JP H0343728 Y2 JPH0343728 Y2 JP H0343728Y2 JP 1985168300 U JP1985168300 U JP 1985168300U JP 16830085 U JP16830085 U JP 16830085U JP H0343728 Y2 JPH0343728 Y2 JP H0343728Y2
- Authority
- JP
- Japan
- Prior art keywords
- board
- sub
- basic
- terminal block
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Landscapes
- Multi-Conductor Connections (AREA)
- Combinations Of Printed Boards (AREA)
Description
【考案の詳細な説明】
〔考案の属する技術分野〕
この考案は、例えばパワートランジスタ、ダイ
オードを組合せてなるインバータ等の半導体装置
モジユールを対象とした混成集積回路の構成に関
する。[Detailed Description of the Invention] [Technical Field to Which the Invention Pertains] This invention relates to the configuration of a hybrid integrated circuit intended for semiconductor device modules such as inverters that are formed by combining power transistors and diodes.
まずこの種の混成集積回路の従来構成を第４図
ないし第７図に示す。各図において、１はその基
板上に膜回路パターン２および各種の実装部品３
を組合せてなる所定の混成集積回路が構成された
回路基板、４は前記回路基板１上の回路端子部か
ら引き出す接続リード５およびその入、出力端子
部６を保持した端子板、７は、パツケージであ
り、第５図のように回路基板１の回路パターン２
の端子部と端子板４に装備された接続リード５と
の間をハンダ付けして相互接続した組立体を第６
図のようにパツケージ７内に収容し、かつ第７図
に明示されているように端子板４、接続リード５
およびパツケージ７との相互間を符号８で示す樹
脂層で封止して混成集積回路を構成している。
First, conventional configurations of this type of hybrid integrated circuit are shown in FIGS. 4 to 7. In each figure, 1 indicates a film circuit pattern 2 and various mounted components 3 on the board.
4 is a terminal board holding connection leads 5 drawn out from the circuit terminals on the circuit board 1 and their input and output terminals 6; 7 is a package; As shown in FIG. 5, the circuit pattern 2 of the circuit board 1 is
The sixth assembly is an assembly in which the terminal part of the terminal board 4 and the connection lead 5 provided on the terminal board 4 are interconnected by soldering.
The terminal board 4 and the connection lead 5 are housed in the package cage 7 as shown in the figure, and the terminal board 4 and the connection lead 5 are shown clearly in FIG.
and the package 7 are sealed with a resin layer 8, thereby forming a hybrid integrated circuit.
ところで上記した従来の構成では、回路基板１
上での回路パターン２および実装部品３の配列等
の制約から、この端子部に対応してその上方の端
子板４に配列する入、出力端子６の位置も板上で
広く分散した配列となるために、外部との配線接
続を個別に行わねばならず厄介であるし、また特
に大規模な集積回路を基板１上に構成したもので
は、入、出力端子部に対応して配備される接続リ
ード５の引出し位置を集中的に整えるように回路
パターンを構成しようとすれば、それだけ回路パ
ターンが複雑化して多くのスペースを占有するこ
とになるために基板１が放熱に要する必要面積以
上のサイズとなり、この結果として回路の小形
化、回路の高密度化を図ることが難しくなる等の
問題が派生する。 By the way, in the conventional configuration described above, the circuit board 1
Due to constraints such as the arrangement of the circuit pattern 2 and the mounted components 3 above, the positions of the input and output terminals 6 arranged on the terminal board 4 above in correspondence with this terminal section are also arranged widely dispersed on the board. Therefore, wiring connections to the outside must be made individually, which is cumbersome. In addition, especially when a large-scale integrated circuit is configured on the board 1, the connections provided corresponding to the input and output terminals are difficult. If you try to configure a circuit pattern so that the lead-out positions of the leads 5 are arranged in a concentrated manner, the circuit pattern becomes more complicated and occupies more space. As a result, problems arise such as it becomes difficult to miniaturize the circuit and increase the density of the circuit.
この考案は上記の点にかんがみなされたもので
あり、回路基板上での回路パターンを接続リード
引出し位置の制約を受けることなしに自由に選定
できるようにして面積効率を高めるとともに、一
方では外部への入、出力端子を一箇所にまとめて
集中的に配列してコネクタが直結できるように
し、基板を二段構成として実装密度の向上を図
り、コネクタの入、出力端子を除いて外部に露出
する部分に樹脂層を形成して簡単な構造で混成集
積回路の一体化を図り、回路の小形、コンパクト
化および外部との接続の簡易化が図れるようにし
た混成集積回路の構成を提供することを目的とす
る。
This idea was developed in consideration of the above points, and it allows the circuit pattern on the circuit board to be freely selected without being constrained by the position of connecting leads, increasing the area efficiency. The input and output terminals of the connector are arranged centrally in one place so that the connector can be directly connected, and the board is configured in two stages to improve the mounting density, and all but the input and output terminals of the connector are exposed to the outside. It is an object of the present invention to provide a configuration of a hybrid integrated circuit in which a resin layer is formed on the parts to integrate the hybrid integrated circuit with a simple structure, and the circuit can be made smaller and more compact, and connections with the outside can be simplified. purpose.
上記目的を達成するために、この考案は基板上
に所定の回路を構成した基本基板と、該基本基板
の上方に配備され、かつその基板上に前記基本基
板の回路端子部に接続して上方へ引き出す接続リ
ードと接続し合う配線パターンが形成されさらに
所定の回路を構成したサブ基板と、一側に入、出
力端子が集中的に配列するコネクタを構成し他側
上面に前記サブ基板を収納する凹部を有する端子
ブロツクとを基本基板、端子ブロツクおよびサブ
基板の順に上下に組合せ、さらに基本基板に接続
され基本基板とサブ基板との間の周囲を囲むパツ
ケージとにより組立体としてなり、前記基本基板
上の回路とサブ基板上の配線パターンとの間およ
び端子ブロツクの入、出力端子とサブ基板上との
配線パターンとの間がそれぞれ接続リード、引出
しリードで相互接続され、かつ接続リードがサブ
基板および端子ブロツクの支持ポストを兼ねた剛
性のある導体からなり、前記組立体の端子ブロツ
クとパツケージとの間およびサブ基板の上面が樹
脂によつて封止され、これにより基本基板の小
形、コンパクト化とともに外部との配線接続が簡
易に行えるようにしたものである。
In order to achieve the above object, this invention includes a basic board on which a predetermined circuit is configured, and a circuit board arranged above the basic board and connected to the circuit terminal section of the basic board on the board. A sub-board is formed with a wiring pattern that connects with connection leads pulled out to the board, and further forms a predetermined circuit, and a connector is formed on one side and has output terminals arranged in a concentrated manner, and the sub-board is housed on the upper surface of the other side. A terminal block having a concave portion for forming the terminal block is assembled vertically in the order of the basic board, the terminal block, and the sub-board, and a package is connected to the basic board and surrounds the area between the basic board and the sub-board to form an assembly. The circuits on the board and the wiring patterns on the sub-board and the input/output terminals of the terminal block and the wiring patterns on the sub-board are interconnected by connection leads and pull-out leads, respectively, and the connection leads are connected to the sub-board. It consists of a rigid conductor that also serves as a support post for the board and terminal block, and the space between the terminal block and package of the assembly and the top surface of the sub-board are sealed with resin, which allows the basic board to be small and compact. It is designed to allow for easy wiring connections to the outside.
第１図ないし第３図はこの考案の実施例を示す
ものであり、第４図ないし第７図に対応する同一
部材には同じ符号が付してある。すなわちこの考
案により混成集積回路は大別して基本基板１０、
サブ基板１１、および端子ブロツク１２との組立
体をパツケージ７に収容して構成されている。こ
こで前記の基本基板１０は第４図に示した従来の
回路基板と基本的に同一のものでありその説明は
省略する。一方、サブ基板１１は基本基板１０の
上方に配備されており、かつその基板上には第２
図に示すように基本基板１０上の回路パターンの
端子部に接続して上方に引出した接続リード１３
と接続し合う膜導体の配線パターン１４が形成さ
れており、かつこの配線パターン１４はその終端
が基板の一側に一列に並んで配列するようなパタ
ーンに形成されている。また端子ブロツク１２は
第３図に示すように前記したサブ基板１１と重な
り合う底板部１５と、その一側に入、出力端子１
６を並べて集中的に配列してなるコネクタ部１７
が構成された樹脂成型品としてなり、かつここに
は基本基板１０とサブ基板１１との間を相互接続
する接続リード１３、入、出力端子１６とサブ基
板１１の配線パターン１４の終端との間を相互接
続する引出しリード１８、および一部基本基板１
０の回路パターンからサブ基板１１を経由せずに
直接引出した引出しリード１９等が一体にモール
ド成型されている。
1 to 3 show an embodiment of this invention, and the same members corresponding to FIGS. 4 to 7 are given the same reference numerals. That is, according to this invention, hybrid integrated circuits can be roughly divided into basic substrates 10,
The assembly of the sub-board 11 and the terminal block 12 is housed in a package 7. Here, the aforementioned basic board 10 is basically the same as the conventional circuit board shown in FIG. 4, and its explanation will be omitted. On the other hand, the sub-board 11 is arranged above the basic board 10, and a second
As shown in the figure, the connection lead 13 is connected to the terminal part of the circuit pattern on the basic board 10 and pulled out upward.
A wiring pattern 14 of a film conductor is formed to connect to each other, and the wiring pattern 14 is formed in a pattern such that its terminal ends are arranged in a line on one side of the substrate. Further, as shown in FIG. 3, the terminal block 12 has a bottom plate portion 15 that overlaps with the sub-board 11 described above, and an output terminal 1 that is inserted into one side of the bottom plate portion 15.
Connector part 17 formed by arranging 6 side by side in a concentrated manner
It is a resin molded product composed of a connection lead 13 that interconnects the basic board 10 and the sub-board 11, and a connection lead 13 between the input and output terminals 16 and the termination of the wiring pattern 14 of the sub-board 11. 18, and a part of the basic board 1
A lead 19 and the like drawn directly from the circuit pattern of No. 0 without passing through the sub-board 11 are integrally molded.
かかる構成で、その組立は次記のように行われ
る。すなわち基本基板１０の上に端子ブロツク１
２を組合せた状態で端子ブロツク側の接続リード
１３および引出しリード１９と基本基板１１側の
回路パターンの端子部の間をハンダ付けする。続
いて端子ブロツク１２の上にサブ基板１１を乗
せ、この状態で接続リード１３と配線パターン１
４との間および該配線パターン１４と引出しリー
ド１８との間をハンダ付けする。ここで接続リー
ド１３はサブ基板１１および端子ブロツク１２を
機械的に支持する支持ポストを兼ねるように剛性
のある導体材料で作られており、この組立状態で
はサブ基板１１および端子ブロツク１２が接続リ
ード１３を介して基本基板１０の上方に担持され
ている。次に基本基板１０にパツケージ７を被
せ、さらに回路部品の保護および端子ブロツク１
２の固定を行うようにサブ基板１１の上面および
端子ブロツク１２とパツケージ７との間が樹脂層
８で封止される。なお第２図における符号３ａは
必要によりサブ基板１１の配線パターン１４に実
装されたチツプ部品であり、このように混成集積
回路の一部の実装部品をサブ基板１１側へ移して
実装配備することにより、その分だけ基本基板１
０側での実装部品の部品数を減らしてより一層の
小形コンパクト化が促進できることになる。 With this configuration, the assembly is performed as follows. That is, the terminal block 1 is placed on the basic board 10.
2 are combined, the connecting leads 13 and drawer leads 19 on the terminal block side and the terminal portions of the circuit pattern on the basic board 11 side are soldered. Next, place the sub-board 11 on top of the terminal block 12, and in this state connect the connection leads 13 and wiring pattern 1.
4 and between the wiring pattern 14 and the lead lead 18. Here, the connection lead 13 is made of a rigid conductive material so as to serve as a support post that mechanically supports the sub-board 11 and the terminal block 12. In this assembled state, the sub-board 11 and the terminal block 12 are connected to the connection lead. It is supported above the basic substrate 10 via 13. Next, the basic board 10 is covered with the package 7, and the circuit components are further protected and the terminal block 1 is covered.
The upper surface of the sub-board 11 and the space between the terminal block 12 and the package 7 are sealed with a resin layer 8 so as to fix the terminal block 2. Note that the reference numeral 3a in FIG. 2 is a chip component mounted on the wiring pattern 14 of the sub-board 11 as necessary, and in this way, some of the mounted components of the hybrid integrated circuit can be moved to the sub-board 11 side and mounted. Therefore, the basic board 1 is
By reducing the number of components mounted on the 0 side, further downsizing can be promoted.
以上述べたようにこの考案によれば、基板上に
所定の回路を構成した基本基板と、該基本基板の
上方に配備され、かつその基板上に前記基本基板
の回路端子部に接続して上方へ引き出す接続リー
ドと接続し合う配線パターンが形成されさらに所
定の回路を構成したサブ基板と、一側に入、出力
端子が集中的に配列するコネクタを構成し他側上
面に前記サブ基板を収納する凹部を有する端子ブ
ロツクとを基本基板、端子ブロツクおよびサブ基
板の順に上下に組合せ、さらに基本基板に接続さ
れ基本基板とサブ基板との間の周囲を囲むパツケ
ージとにより組立体としてなり、前記基本基板上
の回路とサブ基板上の配線パターンとの間および
端子ブロツクの入、出力端子とサブ基板上との配
線パターンとの間がそれぞれ接続リード、引出し
リードで相互接続され、かつ接続リードがサブ基
板および端子ブロツクの支持ポストを兼ねた剛性
のある導体からなり、前記組立体の端子ブロツク
とパツケージとの間およびサブ基板の上面が樹脂
によつて封止されることにより、簡単な構成で多
層構造の集積回路が構成され、さらに基本基板側
の回路パターンを接続リードの引出し位置に制約
されることなく自由に選定することが可能とな
り、それだけ回路パターン特にその膜導体の配線
パターンを単純化して基板の面積効率の向上、小
形コンパクト化が図れるとともに、さらにサブ基
板および端子ブロツクを介して外部へ引き出す
入、出力端子を一箇所にまとめて集中的に配列す
ることができる等の利点が得られる。
As described above, according to this invention, there is provided a basic board on which a predetermined circuit is formed, and a circuit board arranged above the basic board and connected to the circuit terminal section of the basic board on the board. A sub-board is formed with a wiring pattern that connects with connection leads pulled out to the board, and further forms a predetermined circuit, and a connector is formed on one side and has output terminals arranged in a concentrated manner, and the sub-board is housed on the upper surface of the other side. A terminal block having a concave portion for forming the terminal block is assembled vertically in the order of the basic board, the terminal block, and the sub-board, and a package is connected to the basic board and surrounds the area between the basic board and the sub-board to form an assembly. The circuits on the board and the wiring patterns on the sub-board and the input/output terminals of the terminal block and the wiring patterns on the sub-board are interconnected by connection leads and pull-out leads, respectively, and the connection leads are connected to the sub-board. It is made of a rigid conductor that also serves as a support post for the board and terminal block, and the space between the terminal block and package of the assembly and the top surface of the sub-board are sealed with resin, making it possible to create a multilayer structure with a simple structure. In addition, the circuit pattern on the basic board side can be freely selected without being restricted by the pull-out position of the connection lead, and the circuit pattern, especially the wiring pattern of the film conductor, can be simplified accordingly. In addition to improving the area efficiency of the board and making it more compact, it also has the advantage of being able to centrally arrange input and output terminals that can be brought out to the outside via sub-boards and terminal blocks. .
第１図ないし第３図はこの考案の実施例を示す
もので、第１図は混成集積回路全体の組立状態の
構成断面図、第２図はサブ基板の斜視図、第３図
は端子ブロツクの斜視図、第４図ないし第７図は
それぞれ従来構成による混成集積回路の回路基板
の斜視図、回路基板と端子板との組立状態図、パ
ツケージに収容した組立状態の外観斜視図および
その断面図である。図において、
１０……基本基板、１１……サブ基板、１２…
…端子ブロツク、１３……接続リード、１４……
サブ基板上に形成された配線パターン、１６……
入、出力端子、１７……コネクタ部、１８，１９
……引出しリード。
Figures 1 to 3 show an embodiment of this invention. Figure 1 is a cross-sectional view of the assembled hybrid integrated circuit, Figure 2 is a perspective view of the sub-board, and Figure 3 is a terminal block. , and FIGS. 4 to 7 are a perspective view of a circuit board of a conventional hybrid integrated circuit, an assembled state diagram of a circuit board and a terminal board, an external perspective view of an assembled state housed in a package, and a cross section thereof. It is a diagram. In the figure, 10... basic board, 11... sub board, 12...
...Terminal block, 13... Connection lead, 14...
Wiring pattern formed on the sub-board, 16...
Input, output terminal, 17... Connector section, 18, 19
...Drawer lead.
Claims (1)
基本基板の上方に配備され、かつその基板上に前
記基本基板の回路端子部に接続して上方へ引き出
す接続リードと接続し合う配線パターンが形成さ
れさらに所定の回路を構成したサブ基板と、一側
に入、出力端子が集中的に配列するコネクタを構
成し他側上面に前記サブ基板を収納する凹部を有
する端子ブロツクとを基本基板、端子ブロツクお
よびサブ基板の順に上下に組合せ、さらに基本基
板に接続され基本基板とサブ基板との間の周囲を
囲むパツケージとにより組立体としてなり、前記
基本基板上の回路とサブ基板上の配線パターンと
の間および端子ブロツクの入、出力端子とサブ基
板上との配線パターンとの間がそれぞれ接続リー
ド、引出しリードで相互接続され、かつ接続リー
ドがサブ基板および端子ブロツクの支持ポストを
兼ねた剛性のある導体からなり、前記組立体の端
子ブロツクとパツケージとの間およびサブ基板の
上面が樹脂によつて封止されてなることを特徴と
する混成集積回路。 A basic board with a predetermined circuit configured on the board, and a wiring pattern arranged above the basic board and connected to a connecting lead connected to a circuit terminal part of the basic board and drawn upward on the board. A basic board includes a sub-board formed thereon and further configuring a predetermined circuit, and a terminal block that enters on one side and constitutes a connector in which output terminals are arranged in a concentrated manner, and has a concave portion on the upper surface of the other side that accommodates the sub-board, A terminal block and a sub-board are assembled vertically in this order, and a package is connected to the basic board and surrounds the area between the basic board and the sub-board to form an assembly, and the circuit on the basic board and the wiring pattern on the sub-board are assembled. The wiring pattern on the input terminal block and the output terminal and the sub-board are interconnected by connection leads and pull-out leads, respectively, and the connection lead also serves as a support post for the sub-board and terminal block. 1. A hybrid integrated circuit, comprising a certain conductor, and a space between a terminal block and a package of said assembly and an upper surface of a sub-board are sealed with resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985168300U JPH0343728Y2 (en) | 1985-10-31 | 1985-10-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985168300U JPH0343728Y2 (en) | 1985-10-31 | 1985-10-31 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6276563U JPS6276563U (en) | 1987-05-16 |
| JPH0343728Y2 true JPH0343728Y2 (en) | 1991-09-12 |
Family
ID=31101050
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985168300U Expired JPH0343728Y2 (en) | 1985-10-31 | 1985-10-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0343728Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5698615B2 (en) * | 2011-06-28 | 2015-04-08 | 矢崎総業株式会社 | Hybrid circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6022764B2 (en) * | 1977-02-18 | 1985-06-04 | 豊田工機株式会社 | Sequence control device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6022764U (en) * | 1983-07-25 | 1985-02-16 | 日本電気株式会社 | Connector for printed circuit board mounting |
-
1985
- 1985-10-31 JP JP1985168300U patent/JPH0343728Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6022764B2 (en) * | 1977-02-18 | 1985-06-04 | 豊田工機株式会社 | Sequence control device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6276563U (en) | 1987-05-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3206717B2 (en) | Power semiconductor module | |
| US5949135A (en) | Module mounted with semiconductor device | |
| EP0304263A2 (en) | Semiconductor chip assembly | |
| JP2002506289A (en) | Semiconductor device having a large number of semiconductor chips | |
| US5399904A (en) | Array type semiconductor device having insulating circuit board | |
| US5353194A (en) | Modular power circuit assembly | |
| US20030042591A1 (en) | Electronic component with at least two stacked semiconductor chips, and fabrication method | |
| JPH0343728Y2 (en) | ||
| JPS62104056A (en) | Mounting structure for semiconductor part | |
| KR910019222A (en) | Highly Integrated Semiconductor Device and Semiconductor Module Using Same | |
| JP2780424B2 (en) | Hybrid integrated circuit | |
| US20030047760A1 (en) | Electronic component with at least two semiconductor chips, and process for its production | |
| JP2541532B2 (en) | Semiconductor module | |
| JPS63182845A (en) | Semiconductor device | |
| JPH069520Y2 (en) | Semiconductor device | |
| KR100373149B1 (en) | Semiconductor package | |
| JPS59175150A (en) | Mounting structure of electronic component | |
| JPH0473298B2 (en) | ||
| US20030043555A1 (en) | Electronic component with at least two stacked semiconductor chips and process for producing the electronic component | |
| JPH0636593Y2 (en) | Complex integrated circuit device | |
| KR100206975B1 (en) | Semiconductor package | |
| JPS59163842A (en) | Integrated circuit socket stackedly mounting construction | |
| JP2559891Y2 (en) | Composite semiconductor device | |
| JPS6025755Y2 (en) | mixed memory device | |
| JPH0297050A (en) | Semiconductor integrated circuit |