JPH0336305B2 - - Google Patents

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Publication number
JPH0336305B2
JPH0336305B2 JP58017141A JP1714183A JPH0336305B2 JP H0336305 B2 JPH0336305 B2 JP H0336305B2 JP 58017141 A JP58017141 A JP 58017141A JP 1714183 A JP1714183 A JP 1714183A JP H0336305 B2 JPH0336305 B2 JP H0336305B2
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JP
Japan
Prior art keywords
powder
organic binder
substrate material
semiconductor substrate
oxidizing atmosphere
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58017141A
Other languages
Japanese (ja)
Other versions
JPS59143347A (en
Inventor
Mitsuo Osada
Sogo Hase
Akira Ootsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP58017141A priority Critical patent/JPS59143347A/en
Publication of JPS59143347A publication Critical patent/JPS59143347A/en
Publication of JPH0336305B2 publication Critical patent/JPH0336305B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Powder Metallurgy (AREA)
  • Die Bonding (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

近年、ICの演算速度の向上、トランジスタの
電気容量の増大、Ga−As、FETの出現等により
半導体素子の駆動時に半導体素子に発生する熱を
いかに放熱させるかという点が大きな問題となつ
ている。半導体素子内に発生する熱は半導体素子
が塔載され、半導体素子裏面と接合された基板を
通してパツケージ外へ排出される。従つてこの基
板材料には熱伝導度が高い材料を用いることが好
ましい。 ところで、近年前記パツケージとしてセラミツ
クを用いたセラミツクパツケージが多用されてい
る。このパツケージの場合、前記基板が電極取出
し用のセラミツク枠(又は板)と一体化されてい
る。従つて基板材料としてAl2O3を主成分とする
磁器を使用する場合には、電極取出し用のセラミ
ツク枠(又は板)と一体焼成されるため問題ない
が、熱伝導性を向上させる為、WやMo等、電極
取出し用のセラミツク枠(又は板)と異種の材料
を基板材料として用いる場合、以下の如き問題が
生ずる。 即ち、WやMo等を基板材料として用いた場
合、電極取出し用のセラミツク枠(又は板)との
接合は通常銀鑞による鑞付方法が用いられる。こ
の場合、WやMo等はセラミツクとの熱膨張率の
差が大きい為、鑞付工程における加熱後の冷却時
に熱歪によりセラミツク枠(又は板)が破損する
という問題が生ずる。 この為、熱膨張率がセラミツクと近いFe−Ni
合金又はFe−Ni−Co合金の薄板を基板とセラミ
ツク枠(又は板)の間に介在させることが行なわ
れているがかかる方法は熱伝導上好ましくない。 一方、熱伝導性が良く、熱膨張率もセラミツク
枠(又は板)に近いBeOを用いることが考えら
れているがBeOは毒性を有する為、取扱いや製
造が困難であり、さらに入手することも困難で実
用的でない。そこで発明者らは熱膨張率、熱伝導
率共に満足し、かつ、毒性や入手困難性などの問
題のない半導体基板材料として、「平均粒度1〜
40μのW粉末又はMo粉末又はW−Mo合金粉末を
加圧成形した後、1300℃〜1600℃の非酸化雰囲気
にて焼結した焼結多孔体に重量比5〜25%のCu
を含浸したことを特徴とする半導体基板材料」な
る発明をした。(昭和58年1月31日特許出願)(以
下第1発明という) しかるに半導体基板材料はその厚さを0.2〜2
mm程度にする必要があり、通常の粉末冶金法、即
ちCu、W、Mo等の粉末に有機粘結剤を小量加
え、これを型押出の金型に充填し上下より杵で加
圧型押した成形体を非酸化性雰囲気で焼成して製
造する方法では下記のごとき問題点がある。 金型への粉末充填を均一にすることが困難で
あり、成形体中に密度ムラを生ずる。このため
焼成時、収縮の局部的ムラが生じ形が歪む。 成形体の強度が弱く薄板の取扱いがむつかし
い。金型への粉末充填を容易かつ均一に行なう
為には金属粉末に加える有機粘結剤の量を一定
範囲内に押さえる必要があり、かつ有機粘結剤
混合後の金属粉末の型への流動性を確保する必
要があり有機粘結剤の量及び種類に制約を受け
る。このため成形体に強度を持たせることが困
難となり、その取扱中に欠け、割れ等が生じ易
く工業生産上各種の問題が生ずる。 この為、発明者らはこれらの問題を解決する発
明として、「W粉末又はMo粉末又はW−Mo合金
粉末に有機粘結剤と溶媒を加え混練した後、押出
機にて押出した成型体を、非酸化性雰囲気中にて
有機粘結剤と溶剤とが蒸発分解するまで加熱した
後、非酸化性雰囲気中で焼結した焼結多孔体に体
積比5〜25%のCuを含浸することを特徴とする
半導体基板材料の製造方法。」及び「W粉末又は
Mo粉末又はW−Mo合金粉末に有機粘結剤と溶
媒を加え混練した後、押出機にて押出した成型体
を積層した積層体を、非酸化性雰囲気中にて有機
粘結剤と溶剤とが蒸発分解するまで加熱した後、
非酸化性雰囲気中で焼結した焼結多孔積層体に体
積比5〜25%のCuを含浸することを特徴とする
半導体基板材料の製造方法。」なる発明をした。
(以下第2発明という。本願と同日付で特許出願
した) 第2発明について簡単に説明すると、まずW、
Mo又はW−Mo粉末に有機粘結剤と溶媒を加え
混練し、押出機にて押し出し得る程度の柔軟性を
もつた混合物を作る。有機粘結剤・溶剤は何を用
いてもよいが、例えば前者としてはポリビニール
ブチラール、後者としてはメタノールがある。 次に混合物を押出機により押し出し厚さ0.1〜
2mm程度の成型体を作る。押出装置としては混合
物中の気体を取除き得る真空混練装置を内蔵した
装置が望ましい。 次に成型体を非酸化性雰囲気、例えばH2ガス
中にて有機粘結剤と溶媒とが蒸発乾燥するまで加
熱し、これらを蒸発させる。その後、非酸化雰囲
気中で、所定の温度にて焼結し、所定の空孔率を
有する焼結多孔体を得る。焼結温度としては、
1350〜1600℃が好ましい。 次に焼結多孔体にCuの融点以上の温度にて5
〜25vol%のCuを含浸し半導体基板材料を得る。
Cuの量を5〜25vol%とした理由は、前記第1発
明と同様であり、5%より少ない場合はCu含浸
の効果がなく、25%を越えると熱膨張率が過大と
なり、接合するセラミツク枠(又は板)を破損す
るからである。 以上の製法の利点は以下の通りである。 従来の粉末冶金法の場合にうける型押時の粉
末特性に係わる制約を考慮する必要がない為、
有機粘結剤の量を成形体の必要強度に応じて任
意に選択出きる。 成形体の密度バラツキを少なくすることが出
き、焼結後の形歪を小さくすることができる。
即ち、混練し、流体化した金属粉末と有機粘結
剤溶媒との混合物を押出機にて高圧をかけられ
て押し出される為密度バラツキが少なくなる。 セラミツク製品等に用いられているドクター
ブレード法に比し、押出材の上下面の粒度片寄
りがなく成形密度を高くすることが出来、焼結
が容易になる。又、多量の有機溶媒を用いる等
の難点がない。又、第2発明の積層構造の半導
体基板材料の特徴は以下の点にある。 即ち、第1図の如き、積層構造を有する半導体
基板材料を製造する場合、押出機にて押出した成
型体を積層し、積層体を非酸化性雰囲気中にて有
機粘結剤と溶解とが蒸発分解するまで加熱した
後、非酸化性雰囲気中で焼結した焼結多孔体に
Cuを含浸することにより上下一体化することが
出来、精度の良い材料を製造することが出きる。 さらに第2図に示すごとき複雑な形状を持つ材
料も積層して熱処理することにより容易に製造す
ることが出来る。このような形状の材料を通常の
粉末冶金法である粉末プレス法で製造する場合、
各部の密度均一化がむつかしく製造には非常な困
難をともなうものである。 ところで、この第2発明に用いるW、Mo、W
−Mo粉末としては粒度0.5〜5μの粉末を用いるこ
とが好ましい。 即ち、第2発明の製法は本質的に通常の粉末冶
金法におけるプレス法に比し有機粘結剤を多量に
含むため有機粘結剤を蒸発分解除却した焼結前の
密度は低い。よつてこれより所定の空孔率を持つ
焼結多孔体を製造しようとすると通常粉末冶金法
による場合に比しより焼結性の優れた粉末を使用
する必要がある。この場合、平均粒度が0.5μより
小さい場合、焼結時に閉空孔(クローズドポア
ー)を生じ後工程におけるCu含浸時Cuが含浸せ
ず含浸体中に空孔が残り熱伝導度を低下させる。
一方、5μを越える場合、所定の空孔率を持つ多
孔体を得るには工業生産に用いられる経済温度
1600℃を越えた焼結温度が必要となり、そこで粒
度0.5〜5μの金属粉末を用いることが好ましいこ
とになる。 又、第2発明における焼結多孔体の好ましい焼
結温度は比較的高く1350〜1600℃である。 本発明は、前記第2発明の金属粉末の許容粒径
範囲を拡大すると共に焼結温度を下げることを目
的とした発明であり、その要旨はW粉末又はMo
粉末又はW−Mo合金粉末に前記粉末との合計量
に対して0.02〜2wt%の鉄族元素と有機粘結剤及
び溶媒を加え混練した後、押出機にて押出した成
型体を、非酸化性雰囲気中にて有機粘結剤と溶剤
とが蒸発分解するまで加熱した後、非酸化性雰囲
気中で焼結した焼結多孔体に体積比5〜25%の
Cuを含浸することを特徴とする半導体基板材料
の製造方法。」及び「W粉末又はMo粉末又はW
−Mo合金粉末に前記粉末との合計量に対して
0.02〜2wt%の鉄族元素と有機粘結剤及び溶媒を
加え混練した後、押出機にて押出した成型体を積
層した積層体を、非酸化性雰囲気中にて有機粘結
剤と溶剤とが蒸発分解するまで加熱した後、非酸
化性雰囲気中で焼結した焼結多孔積層体に体積比
5〜25%のCuを含浸することを特徴とする半導
体基板材料の製造方法。」にある。 本発明と第2発明との相違点はW、Mo、W−
Mo粉末に微量の鉄族元素(Fe、Ni、Co)を加
えたことである。 鉄族元素はW、Mo等に固溶する為、これらを
W、Mo等の粉末に加え、この成型体を焼結する
とW、Mo等の粒子間に存在するFe族元素がW、
Mo等の粒子と固溶し、焼結が推進され無添加の
場合に比し低温で等しい空孔率を有する多孔体を
得ることが出来る。又、この結果、粒度の大きい
W、Mo、W−Mo粉末を用いることが出来る。
具体的には無添加の場合、好ましい金属粉末とし
て平均粒度0.5〜5μのW、Mo粉末を用いるのに対
し鉄族元素を0.02〜2%添加した場合0.5〜10μま
で拡大することが出来、又焼結温度も1350℃〜
1600℃から1200℃〜1450℃に低下させることがで
きる。 鉄族元素の添加量が0.02wt%より少ない場合、
添加効果がなく、一方、2%を越えた場合、Cu
含浸工程においてCu中に鉄族元素が多量に固溶
し熱伝導度を極端に低下させるとともに閉空孔が
出来る為好ましくない。 又、平均粒度が0.5μより小さい場合、焼結時に
閉空孔(クローズドポアー)を生じ、後工程にお
けるCu含浸時Cuが含浸せず、含浸体中に空孔が
残り熱伝導度を低下させる。一方10μを越える場
合、所定の空孔率を持つ多孔体を得るには1500℃
以上の高温を要し本発明の目的に反する。 尚、この鉄族添加法は第2発明の積層構造の半
導体基板材料の製法においても適用でき、上下一
体化した精度のよい材料を粒度の荒い金属粉末を
用いて、低温で容易に製造することが出来る。 以下実施例に基づいて説明する。 実施例 1 第1表に示すような金属粉末にそれぞれ第1表
に記載した粘結剤、可塑性向上剤、溶媒を加えて
1.3mm厚さの押出成形体を得て、H2ガス雰囲気下
で700℃×2H加熱してバインダーを除去した後第
1表に記載した条件で焼結あるいはCuを含浸ま
たは焼結−含浸を行つてそれぞれ第1表に示す合
金を得た。なおこれらの焼結、含浸は全てH2
ス雰囲気中で行つた。 第1表に於いて本発明の方法を従来法と比較す
ると以下の点が明らかである。 (1) W系合金に於いては鉄族元素の添加により焼
結性が著しく向上する為、同じ粒度(1.6μm)
のW粉末を用いた場合、同一合金組成で焼結温
度を約100℃低下させることが出来る。 又、焼結性が向上する為7.2μmという従来法
では使用することが出来なかつた粒度の粗い粉
末の使用が可能となる(これは経済性向上につ
ながる)。 (2) Mo系合金に於いても、鉄族元素の添加によ
り焼結性が改善され、焼結時間を従来の1/2に
することが出来る。(経済性向上)
In recent years, due to improvements in the calculation speed of ICs, increases in the capacitance of transistors, and the emergence of Ga-As and FETs, the issue of how to dissipate the heat generated in semiconductor devices when they are driven has become a major issue. . Heat generated within the semiconductor element is discharged to the outside of the package through the substrate on which the semiconductor element is mounted and bonded to the back surface of the semiconductor element. Therefore, it is preferable to use a material with high thermal conductivity as the substrate material. Incidentally, in recent years, ceramic packages using ceramic have been frequently used as the packages. In the case of this package, the substrate is integrated with a ceramic frame (or plate) for taking out the electrodes. Therefore, when using porcelain whose main component is Al 2 O 3 as the substrate material, there is no problem since it is fired integrally with the ceramic frame (or plate) for taking out the electrode, but in order to improve thermal conductivity, When a material different from the ceramic frame (or plate) for taking out the electrodes, such as W or Mo, is used as the substrate material, the following problems occur. That is, when W, Mo, or the like is used as the substrate material, a brazing method using silver solder is usually used for joining to a ceramic frame (or plate) for taking out the electrodes. In this case, since W, Mo, etc. have a large difference in coefficient of thermal expansion from ceramic, a problem arises in that the ceramic frame (or plate) is damaged due to thermal strain during cooling after heating in the brazing process. For this reason, Fe-Ni has a thermal expansion coefficient close to that of ceramics.
Although it has been attempted to interpose a thin plate of alloy or Fe--Ni--Co alloy between the substrate and the ceramic frame (or plate), such a method is unfavorable in terms of heat conduction. On the other hand, it has been considered to use BeO, which has good thermal conductivity and a coefficient of thermal expansion close to that of ceramic frames (or plates), but BeO is toxic and difficult to handle and manufacture, and it is also difficult to obtain. difficult and impractical. Therefore, the inventors developed a semiconductor substrate material with an average particle size of 1 to
After pressure-molding 40 μ of W powder, Mo powder, or W-Mo alloy powder, 5 to 25% Cu by weight is added to a sintered porous body that is sintered in a non-oxidizing atmosphere at 1300 to 1600 °C.
He has invented a semiconductor substrate material characterized by being impregnated with (Patent application filed on January 31, 1988) (hereinafter referred to as the first invention) However, the thickness of the semiconductor substrate material is 0.2 to 2.
The size needs to be about mm, so it is necessary to use the usual powder metallurgy method, that is, add a small amount of organic binder to powder such as Cu, W, Mo, etc., fill it into an extrusion mold, and pressurize it with a pestle from above and below. The method of producing a molded article by firing it in a non-oxidizing atmosphere has the following problems. It is difficult to uniformly fill the powder into the mold, resulting in uneven density in the molded product. Therefore, during firing, local unevenness of shrinkage occurs and the shape becomes distorted. The strength of the molded product is weak, making it difficult to handle the thin plate. In order to easily and uniformly fill the powder into the mold, it is necessary to control the amount of organic binder added to the metal powder within a certain range, and to control the flow of the metal powder into the mold after mixing the organic binder. There are restrictions on the amount and type of organic binder. For this reason, it is difficult to impart strength to the molded body, and chips and cracks are likely to occur during handling, resulting in various problems in industrial production. For this reason, the inventors have developed an invention to solve these problems by adding an organic binder and a solvent to W powder, Mo powder, or W-Mo alloy powder, kneading the mixture, and then extruding the molded body using an extruder. After heating in a non-oxidizing atmosphere until the organic binder and solvent are evaporated and decomposed, the sintered porous body is sintered in a non-oxidizing atmosphere and impregnated with Cu at a volume ratio of 5 to 25%. A method for producing a semiconductor substrate material characterized by
After adding and kneading an organic binder and a solvent to Mo powder or W-Mo alloy powder, a laminate of molded bodies extruded using an extruder is mixed with an organic binder and a solvent in a non-oxidizing atmosphere. After heating until it evaporates and decomposes,
A method for producing a semiconductor substrate material, comprising impregnating a sintered porous laminate sintered in a non-oxidizing atmosphere with Cu at a volume ratio of 5 to 25%. ” was invented.
(Hereinafter referred to as the second invention. A patent application was filed on the same date as the present application.) To briefly explain the second invention, first, W,
An organic binder and a solvent are added to Mo or W-Mo powder and kneaded to form a mixture that is flexible enough to be extruded using an extruder. Any organic binder/solvent may be used; for example, the former is polyvinyl butyral, and the latter is methanol. Next, extrude the mixture using an extruder to a thickness of 0.1~
Make a molded body of about 2 mm. As the extrusion device, a device having a built-in vacuum kneading device capable of removing gas from the mixture is desirable. Next, the molded body is heated in a non-oxidizing atmosphere, for example, H 2 gas, until the organic binder and solvent are evaporated to dryness. Thereafter, the material is sintered at a predetermined temperature in a non-oxidizing atmosphere to obtain a sintered porous body having a predetermined porosity. The sintering temperature is
1350-1600°C is preferred. Next, the sintered porous body was heated to a temperature higher than the melting point of Cu.
Obtain a semiconductor substrate material by impregnating ~25 vol% Cu.
The reason for setting the amount of Cu to 5 to 25 vol% is the same as in the first invention. If it is less than 5%, the Cu impregnation has no effect, and if it exceeds 25%, the coefficient of thermal expansion becomes excessive, and the ceramic to be bonded is This is because it will damage the frame (or board). The advantages of the above manufacturing method are as follows. Because there is no need to consider restrictions related to powder properties during embossing that occur in the case of conventional powder metallurgy,
The amount of organic binder can be arbitrarily selected depending on the required strength of the molded article. Density variations in the molded body can be reduced, and shape distortion after sintering can be reduced.
That is, since the mixture of kneaded and fluidized metal powder and organic binder solvent is extruded by applying high pressure in an extruder, density variations are reduced. Compared to the doctor blade method used for ceramic products, etc., there is no uneven grain size on the top and bottom surfaces of the extruded material, making it possible to increase the compacting density and making sintering easier. Further, there is no problem such as the use of a large amount of organic solvent. Further, the characteristics of the semiconductor substrate material having a laminated structure according to the second invention are as follows. That is, when manufacturing a semiconductor substrate material having a laminated structure as shown in FIG. After heating until evaporation and decomposition, the sintered porous body is sintered in a non-oxidizing atmosphere.
By impregnating it with Cu, the top and bottom can be integrated, making it possible to manufacture a material with high precision. Furthermore, materials having a complicated shape as shown in FIG. 2 can be easily manufactured by laminating and heat-treating. When manufacturing materials with this shape using the powder pressing method, which is a normal powder metallurgy method,
It is difficult to make the density uniform in each part, and manufacturing is extremely difficult. By the way, W, Mo, W used in this second invention
- It is preferable to use a powder with a particle size of 0.5 to 5 μm as the Mo powder. That is, the manufacturing method of the second invention essentially contains a larger amount of organic binder than the pressing method in the normal powder metallurgy method, so the density before sintering after the evaporation of the organic binder is removed is lower. Therefore, in order to manufacture a sintered porous body having a predetermined porosity, it is necessary to use a powder that has better sinterability than when using a normal powder metallurgy method. In this case, if the average particle size is smaller than 0.5μ, closed pores are formed during sintering, and Cu is not impregnated during Cu impregnation in the subsequent step, leaving pores in the impregnated body and reducing thermal conductivity.
On the other hand, if it exceeds 5μ, the economic temperature used for industrial production is required to obtain a porous material with a specified porosity.
Sintering temperatures in excess of 1600°C are required, so it is preferable to use metal powder with a particle size of 0.5 to 5μ. Further, the preferable sintering temperature of the sintered porous body in the second invention is relatively high, and is 1350 to 1600°C. The present invention aims to expand the permissible particle size range of the metal powder of the second invention and lower the sintering temperature, and its gist is to
After adding and kneading 0.02 to 2 wt% of iron group elements, an organic binder, and a solvent based on the total amount of the powder or W-Mo alloy powder, the molded body extruded with an extruder is After heating the organic binder and solvent in a non-oxidizing atmosphere until they evaporate and decompose, a sintered porous body sintered in a non-oxidizing atmosphere is heated with a volume ratio of 5 to 25%.
A method for manufacturing a semiconductor substrate material, characterized by impregnating it with Cu. ” and “W powder or Mo powder or W
−For the total amount of Mo alloy powder and the above powder
After adding and kneading 0.02 to 2wt% of iron group elements, an organic binder, and a solvent, a laminate of molded bodies extruded using an extruder is mixed with an organic binder and a solvent in a non-oxidizing atmosphere. 1. A method for producing a semiconductor substrate material, which comprises impregnating a sintered porous laminate sintered in a non-oxidizing atmosphere with Cu at a volume ratio of 5 to 25% after heating the material until it evaporates and decomposes. "It is in. The difference between the present invention and the second invention is W, Mo, W-
This is because trace amounts of iron group elements (Fe, Ni, Co) are added to Mo powder. Iron group elements are dissolved in W, Mo, etc., so when these are added to powders of W, Mo, etc. and this molded body is sintered, the Fe group elements present between the particles of W, Mo, etc. become W,
It forms a solid solution with particles such as Mo and promotes sintering, making it possible to obtain a porous body with the same porosity at a lower temperature than when no additive is used. Moreover, as a result, W, Mo, and W-Mo powders with large particle sizes can be used.
Specifically, in the case of no additives, W and Mo powders with an average particle size of 0.5 to 5μ are used as the preferred metal powder, but when 0.02 to 2% of iron group elements are added, the average particle size can be expanded to 0.5 to 10μ. Sintering temperature is also 1350℃ ~
It can be lowered from 1600℃ to 1200℃~1450℃. When the amount of iron group elements added is less than 0.02wt%,
On the other hand, if the amount exceeds 2%, Cu
In the impregnation process, a large amount of iron group elements become solid solution in Cu, which is not preferable because the thermal conductivity is extremely reduced and closed pores are formed. Furthermore, if the average particle size is smaller than 0.5μ, closed pores are generated during sintering, and Cu is not impregnated during Cu impregnation in the subsequent step, and pores remain in the impregnated body, reducing thermal conductivity. On the other hand, if it exceeds 10μ, the temperature is 1500℃ to obtain a porous material with the specified porosity.
This requires higher temperatures, which is contrary to the purpose of the present invention. Incidentally, this iron group addition method can also be applied to the manufacturing method of the laminated structure semiconductor substrate material of the second invention, and it is possible to easily manufacture a material with high precision in which the upper and lower parts are integrated at a low temperature using coarse-grained metal powder. I can do it. The following description will be made based on examples. Example 1 The binder, plasticity improver, and solvent listed in Table 1 were added to the metal powders shown in Table 1.
An extruded body with a thickness of 1.3 mm was obtained, and after removing the binder by heating at 700°C for 2 hours in an H2 gas atmosphere, it was sintered, impregnated with Cu, or sintered-impregnated under the conditions listed in Table 1. The alloys shown in Table 1 were obtained. Note that all of these sintering and impregnation were performed in an H 2 gas atmosphere. When the method of the present invention is compared with the conventional method in Table 1, the following points become clear. (1) In W-based alloys, the sinterability is significantly improved by the addition of iron group elements, so the same grain size (1.6 μm)
When using W powder, the sintering temperature can be lowered by about 100°C with the same alloy composition. In addition, since the sinterability is improved, it becomes possible to use powder with a coarse particle size of 7.2 μm, which could not be used in the conventional method (this leads to improved economic efficiency). (2) Even in Mo-based alloys, the sinterability is improved by adding iron group elements, and the sintering time can be halved compared to conventional ones. (Improved economic efficiency)

【表】 以上の如く本発明法により所望の特性を満足す
る材料を経済的に得ることが可能となつた。 又、上記実施例と同一条件で積層構造の半導体
基板材料を製造した結果、精度のよい材料が得ら
れた。
[Table] As described above, by the method of the present invention, it has become possible to economically obtain a material that satisfies the desired properties. Further, as a result of manufacturing a semiconductor substrate material having a laminated structure under the same conditions as in the above example, a highly accurate material was obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図は積層構造の半導体基板材料の
斜視図。
1 and 2 are perspective views of a semiconductor substrate material having a laminated structure.

Claims (1)

【特許請求の範囲】 1 W粉末又はMo粉末又はW−Mo合金粉末に
前記粉末との合計量に対して0.02〜2wt%の鉄族
元素と有機粘結剤及び溶媒を加え混練した後、押
出機にて押出した成型体を、非酸化性雰囲気中に
て有機粘結剤と溶剤とが蒸発分解するまで加熱し
た後、非酸化性雰囲気中で焼結した焼結多孔体に
体積比5〜25%のCuを含浸することを特徴とす
る半導体基板材料の製造方法。 2 W粉末又はMo粉末又はW−Mo合金粉末の
平均粒度が0.5〜10μであることを特徴とする特許
請求の範囲第1項記載の半導体基板材料の製造方
法。 3 W粉末又はMo粉末又はW−Mo合金粉末に
前記粉末との合計量に対して0.02〜2wt%の鉄族
元素と有機粘結剤及び溶媒を加え混練した後、押
出機にて押出した成型体を積層した積層体を、非
酸化性雰囲気中にて有機粘結剤と溶剤とが蒸発分
解するまで加熱した後、非酸化性雰囲気中で焼結
した焼結多孔積層体に体積比5〜25%のCuを含
浸することを特徴とする半導体基板材料の製造方
法。 4 W粉末又はMo粉末又はW−Mo合金粉末の
平均粒度が0.5〜10μであることを特徴とする特許
請求の範囲第3項記載の半導体基板材料の製造方
法。
[Claims] 1. After adding and kneading 0.02 to 2 wt% of an iron group element, an organic binder, and a solvent based on the total amount of the W powder, Mo powder, or W-Mo alloy powder, extrusion is performed. The molded body extruded by a machine is heated in a non-oxidizing atmosphere until the organic binder and solvent are evaporated and decomposed, and then the sintered porous body is sintered in a non-oxidizing atmosphere at a volume ratio of 5 to 50. A method for producing a semiconductor substrate material, characterized by impregnating it with 25% Cu. 2. The method for manufacturing a semiconductor substrate material according to claim 1, wherein the average particle size of the W powder, Mo powder, or W-Mo alloy powder is 0.5 to 10 μ. 3. After adding and kneading 0.02 to 2 wt% of iron group elements, an organic binder, and a solvent based on the total amount of the above powder to W powder, Mo powder, or W-Mo alloy powder, molding is extruded using an extruder. After heating the laminate in a non-oxidizing atmosphere until the organic binder and solvent are evaporated and decomposed, the sintered porous laminate is sintered in a non-oxidizing atmosphere at a volume ratio of 5 to 5. A method for producing a semiconductor substrate material, characterized by impregnating it with 25% Cu. 4. The method for manufacturing a semiconductor substrate material according to claim 3, wherein the average particle size of the W powder, Mo powder, or W-Mo alloy powder is 0.5 to 10 μ.
JP58017141A 1983-02-03 1983-02-03 Manufacture of material for semiconductor substrate Granted JPS59143347A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58017141A JPS59143347A (en) 1983-02-03 1983-02-03 Manufacture of material for semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58017141A JPS59143347A (en) 1983-02-03 1983-02-03 Manufacture of material for semiconductor substrate

Publications (2)

Publication Number Publication Date
JPS59143347A JPS59143347A (en) 1984-08-16
JPH0336305B2 true JPH0336305B2 (en) 1991-05-31

Family

ID=11935723

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58017141A Granted JPS59143347A (en) 1983-02-03 1983-02-03 Manufacture of material for semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS59143347A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3535081A1 (en) * 1985-10-02 1987-04-09 Vacuumschmelze Gmbh COMPOSITE AND METHOD FOR THE PRODUCTION THEREOF
JP2632886B2 (en) * 1987-12-22 1997-07-23 川崎製鉄株式会社 Manufacturing method of multi-phase structure sintered body
JP2746279B2 (en) * 1990-06-18 1998-05-06 日本タングステン 株式会社 Substrate material for semiconductor device and method of manufacturing the same
JP2591855B2 (en) * 1990-09-12 1997-03-19 日本タングステン株式会社 High-precision weight parts and their manufacturing method
DE69432546T2 (en) * 1993-09-16 2003-11-20 Sumitomo Electric Industries Metal housing for semiconductor device and method for its production
JP3336370B2 (en) * 1995-06-23 2002-10-21 東邦金属株式会社 Method of manufacturing semiconductor substrate material, semiconductor substrate material and semiconductor package

Also Published As

Publication number Publication date
JPS59143347A (en) 1984-08-16

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