JPH0328741U - - Google Patents
Info
- Publication number
- JPH0328741U JPH0328741U JP1989089692U JP8969289U JPH0328741U JP H0328741 U JPH0328741 U JP H0328741U JP 1989089692 U JP1989089692 U JP 1989089692U JP 8969289 U JP8969289 U JP 8969289U JP H0328741 U JPH0328741 U JP H0328741U
- Authority
- JP
- Japan
- Prior art keywords
- cavity
- semiconductor device
- provided around
- grid array
- plastic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図は本考案の一実施例の樹脂枠接着後の要
部平面図、第2図は第1図の部分拡大断面図、第
3図は従来のPPGAパツケージの一例の要部断
面図である。 1……枠位置決め用凸部、2……樹脂枠、3…
…半導体素子、4……ボンデイングワイヤ、5…
…キヤビテイ、6……プラスチツク基板。
部平面図、第2図は第1図の部分拡大断面図、第
3図は従来のPPGAパツケージの一例の要部断
面図である。 1……枠位置決め用凸部、2……樹脂枠、3…
…半導体素子、4……ボンデイングワイヤ、5…
…キヤビテイ、6……プラスチツク基板。
Claims (1)
- プラスチツク基板と、該プラスチツク基板上に
形成されたキヤビテイと、該キヤビテイ上に搭載
された半導体素子と、前記キヤビテイの周囲に設
けられた樹脂枠とを有する半導体装置用プラスチ
ツクピングリツドアレイパツケージにおいて、前
記樹脂枠の周囲に複数の鉤状の枠位置決め用凸部
を設けたことを特徴とする半導体装置用プラスチ
ツクピングリツドアレイパツケージ。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989089692U JPH0328741U (ja) | 1989-07-28 | 1989-07-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989089692U JPH0328741U (ja) | 1989-07-28 | 1989-07-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0328741U true JPH0328741U (ja) | 1991-03-22 |
Family
ID=31639261
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1989089692U Pending JPH0328741U (ja) | 1989-07-28 | 1989-07-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0328741U (ja) |
-
1989
- 1989-07-28 JP JP1989089692U patent/JPH0328741U/ja active Pending